* add patternstart command for CTB, block end of execution udp packets if pattern was started by patternstart command
* update docs
* Dhanya's comments
* more Dhanya comments
* refactored
* fixed tests for startpatttern, also clkfrequency not properly used in server
* xilinx: fixed setfrequency, tick clock (with sync clock), clkfrequency set from getfrequency to get the exact value
* xilinx freq in kHz, updated default values and prints
---------
Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* update ctb regDefs, included fill level of adc, transceiver and DBit fifos, added enable registers for cont. readout
* fix fifo fill level range bug
* updated ctb RegDefs, increased size of fifo fill level register
* added register to read the firmware git hash
* ctb: added altchip_id read register
* start with unification of pattern machinery for xctb, ctb, mythen
* udate addrs for d-server internal matterhorn startup
* update xctb reg defs
* move pattern loopdef start
* added zero trimbits to matterhorn config
* Revert "added zero trimbits to matterhorn config"
This reverts commit 7c347badd5.
* added adjustable clocks on Xilinx-CTB
* added support for fractional dividers of runclk
* XCTB: make frequencies adjustable from python gui
* update docs
* added support for patternstart command to XCTB
* XCTB: map pattern_ram directly into memory, removed rw strobe
* refactor Mythen pattern control addresses
* test altera ctb with common addresses, removed ifdefs
* change ordering of regdefs
* updated python help for dbitclk, adcclk and runclk (khz)
* xilinx: moved the wait for firmware to measure the actual frequency to the server side and removed it in the pyctbgui side
* will not be anymore in developer branch
* make format (exception RegisterDefs.h), rewrite XILINX PLL to have less consstants in the code
* bug: mixing && for &
---------
Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
* added check if reciever is running
* added some tests
* uups dummy test - deleted test file
* changed test
* stopped receiver
* some tests dont run
* added some more tests as they also affect fifo structure
* fixed tests to work with test_simualtor for all cmdcall tests
* minor
---------
Co-authored-by: mazzol_a <mazzol_a@pc17378.psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
- fix acquire fail in tests (adcreg test)
- roi tests fail after overlapping invalid test and acquire after
- print udp dest mac in server properly
- fixed udp dst list get (server was not sending entry proper size to match proper struct size in client)
- updated server binaries and updated hard links in serverBin
- added documentation regarding gui: zmqport and zmqip in terms of gui, rx_zmqstream
- removed print - probably ended there for debuggung
---------
Co-authored-by: Alice <alice.mazzoleni@psi.ch>
* one doesnt need to open shared memory to call removesharedmemory, and calling hasMemoryvalid without opening will cause segfault (not used now, but could in the future)
* fix test on shm
* removed verify, update, fixed getUser to be a free function, generated commands, python bindings yet to do
* python bindings
* fixed tests
* minor
* minor
* format
* freeing obsolete shm withoua a 'isValid' should access raw pointers. Need to move this all into the shm class
* fixed obsolete shm free issue
* minor
* ensuring the test works platform independent for size of int
* updated c++11 to c++17
* more about c++11 and updating readme
* updated documentation for receiver arguments and also making receiver constructor explicit
* minor fix for rxr err message
* fixed doc about gcc version
