maliakal_d
dea8cba985
changes from 4.2.0-rc: eiger check for max trimbits; end of eigerserver: if detector ip, set activate; update both control and stop server for activate
2020-03-10 16:49:08 +01:00
maliakal_d
2cb09a590a
gotthard2, mythen3: firmware type check added, others: minor print
2020-03-10 16:25:07 +01:00
maliakal_d
df2512fb1c
all servers: eiger, jungfrau, gotthard, ctb, moench, mythen3, gotthard2 updated
2020-03-10 15:57:27 +01:00
758afad02c
ctb, moench, eiger, gotthard: get number of channels for moench and ctb, others removed unnecessary variables in shm, added moench virtual sever ( #86 )
2020-03-10 09:08:08 +01:00
maliakal_d
f255becffe
jungfrau: adcphase values nad dbit values done for new boards
2020-03-06 17:49:22 +01:00
maliakal_d
a2e019ff36
moench: updated adcpipeline from 14 to 15
2020-03-06 10:47:21 +01:00
maliakal_d
aeb9ddfe62
moench:dbit clock updated to 40
2020-03-05 17:10:37 +01:00
maliakal_d
4a802bd2e4
gotthard2: switching between continuous to burst mode (burstperiod got reset: fixed)
2020-03-05 16:35:52 +01:00
maliakal_d
e3f9ef0b25
moench and eiger updated as well
2020-03-05 10:24:59 +01:00
maliakal_d
9ca86c2edb
ctb, gotthard, gotthard2, jungfrau, mythen updated
2020-03-05 10:21:24 +01:00
c64b09ee79
Jungfraufix ( #84 )
...
* jungfrau: added dbitphase, different pll clkindex 0 with different wr bit
2020-03-04 17:06:18 +01:00
maliakal_d
4e2f685b76
gotthard2: gain plot fix with clones
2020-03-04 14:39:44 +01:00
maliakal_d
7859cf78e9
moench: allow power chip
2020-03-04 10:41:10 +01:00
maliakal_d
1b996d1703
revised gain plot; updated version api
2020-03-04 10:25:38 +01:00
maliakal_d
032475fc14
gainplot clone revised
2020-03-04 10:17:51 +01:00
maliakal_d
5430288ce8
merge fix
2020-03-03 17:57:55 +01:00
maliakal_d
134611c638
gotthard2: switching between period and burst period (not delay and burst period), internal frequency depending on timing source (for all except actualtime and measurement time)
2020-03-03 17:49:28 +01:00
maliakal_d
8abc32e7f1
moench: default pattern file in server, settings, tests
2020-03-03 16:00:01 +01:00
maliakal_d
6bbcf6173d
moench: first version
2020-03-02 18:34:10 +01:00
11e7737a2f
gotthard2: timingsource and currentsource features, (timing source external yet to be implemented in fpga to test ( #80 )
2020-02-28 12:45:02 +01:00
maliakal_d
2e2e91b219
ctb adc: get in uV and print in client in mV to get decimals
2020-02-27 15:43:42 +01:00
maliakal_d
10ba16a9dc
updating versions
2020-02-27 14:26:18 +01:00
maliakal_d
8c8032dc69
ctb bug fix: slow adcs incorrect mv read out, needed clk down and usleep before reading
2020-02-27 09:16:22 +01:00
maliakal_d
90acd51389
server api changes: for mythen3, jungfrau, eiger as well
2020-02-26 17:52:35 +01:00
maliakal_d
fe3a7b0faf
gotthard2: removed unnecessary casting
2020-02-26 11:02:28 +01:00
maliakal_d
6a0a931e3e
gotthard2: bursts and burst period, written to same register as triggers and delay (kept in server as variables) and set if conditions meet. bursts and burst period only in auto timing and burst mode. Also updating theses registers when switching between timing modes or burst modes
2020-02-25 15:45:40 +01:00
maliakal_d
02b367ffe8
mythen3 and gotthard2: updated clocks
2020-02-24 16:50:47 +01:00
maliakal_d
21a1b872bf
bugfix:mythen3 date change
2020-02-24 11:00:16 +01:00
maliakal_d
3a74ca8fc2
bugfix: mythen3 git date incorrect
2020-02-24 10:53:06 +01:00
3ea9b86bf5
date fix
2020-02-13 14:50:23 +01:00
maliakal_d
36bd91daa3
gotthard2: sleep before configuring on chip dacs, default exptime 0 and default period to 1ms
2020-02-04 10:50:01 +01:00
maliakal_d
f0cccf9de8
initialchecks can be bypassed (version compatibility and oher tests at server start up)
2020-01-31 16:46:33 +01:00
maliakal_d
89c774dbf7
nios programming: check file size first
2020-01-31 11:24:48 +01:00
5ca3a1b685
gotthard2 and mythen3: programming fpga, reboot; jungfrau, ctb: modified programming ( #74 )
2020-01-30 19:52:35 -08:00
maliakal_d
2314fdabd1
merge from mythen3, and jungfrau fix
2020-01-23 16:44:01 +01:00
maliakal_d
abe63acc79
jungfrau fix: wait for acquisition to be done before sending stop receiver
2020-01-23 16:41:09 +01:00
maliakal_d
a9e375ed34
gotthard2: bursttype to burstmode
2020-01-23 11:03:14 +01:00
maliakal_d
f881133795
get/set timing, generate data for gotthard2, vref_rstore instead of restore for gotthard2
2020-01-22 18:18:56 +01:00
maliakal_d
8cbf3c62a9
merge from developer
2020-01-22 17:30:13 +01:00
maliakal_d
3ea2520615
PR minor changes
2020-01-22 13:55:10 +01:00
d8fccdcefa
Merge branch 'developer' into gotthard2
2020-01-21 18:18:57 +01:00
maliakal_d
981b13494c
mythen3: virtual server, connected timing mode, row and col in header, included pattern bit and mask
2020-01-21 18:16:27 +01:00
maliakal_d
7131f77a3a
eiger: vcal set to 0
2020-01-21 16:10:15 +01:00
maliakal_d
2e78484b61
gotthard2 virtual server sends data
2020-01-21 14:50:31 +01:00
maliakal_d
6cfd0f8962
gotthard2: first edit
2020-01-20 12:13:23 +01:00
maliakal_d
6e47f0b7f7
merge resolved
2020-01-20 11:36:35 +01:00
maliakal_d
3c891495db
mythen3: bug fix detector type
2020-01-20 11:32:02 +01:00
maliakal_d
e8bdf5a505
gotthard2: updated register map; powerchip checking detector type; internal and external period, frames, exptime; set/get delay, get actualtime, measurement, framesfromstart enabled; which detector comment updated in cmdproxy, detector and slsdetector
2020-01-16 15:33:35 +01:00
de53747ddd
Counters ( #71 )
...
* mythen3: adding counters mask, firmware still takes only number of counters for now
* mythen3: checking if module attached before powering on chip
* bug fix: loop inital declaration not allowed in c
* fix scope eiger test
* mythen3: renamed setCounters to setCounterMask and getCounterMask in API
* mythen3 replacing counting bits with popcount
Co-authored-by: Erik Fröjdh <erik.frojdh@gmail.com >
2020-01-14 17:40:46 +01:00
maliakal_d
28f8a76dcc
updated binaries
2020-01-10 09:05:26 +01:00
maliakal_d
Dhanya Thattil