Commit Graph

365 Commits

Author SHA1 Message Date
Martin Mueller
2d8f93a426 ctb: add patternstart command, xilinx: fix frequency (#1307)
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* add patternstart command for CTB, block end of execution udp packets if pattern was started by patternstart command

* update docs

* Dhanya's comments

* more Dhanya comments

* refactored

* fixed tests for startpatttern, also clkfrequency not properly used in server

* xilinx: fixed setfrequency, tick clock (with sync clock), clkfrequency set from getfrequency to get the exact value

* xilinx freq in kHz, updated default values and prints

---------

Co-authored-by: Martin Mueller <martin.mueller@psi.ch>
Co-authored-by: Dhanya Thattil <dhanya.thattil@psi.ch>
2025-09-23 12:13:46 +02:00
3387e22796 updated versioning in developer (#1293) 2025-09-09 17:26:18 +02:00
6e3acbdf79 Dev/fix actual tests (#1285)
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- fix acquire fail in tests (adcreg test)
- roi tests fail after overlapping invalid test and acquire after
- print udp dest mac in server properly
- fixed udp dst list get (server was not sending entry proper size to match proper struct size in client)
- updated server binaries and updated hard links in serverBin
- added documentation regarding gui:  zmqport and zmqip in terms of gui, rx_zmqstream
- removed print - probably ended there for debuggung

---------

Co-authored-by: Alice <alice.mazzoleni@psi.ch>
2025-09-04 10:44:32 +02:00
92991de5a8 updating versions (#1258)
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2025-08-07 10:28:22 +02:00
ee27f0bc1b readoutspeed in rx master file and other master file inconsistencies (#1245)
readout speed added to json and h5 master files.
Also fixed master file inconsistencies

Sserver binaries
- update server binaries because readoutspeed needs to be sent to receiver with rx_hostname command

API
- added const to Detector class set/getburstmode

Python
- updated python bindings (burstmode const and roi arguments)

Cmd generation
- added pragma once in Caller.in.h as Caller is included in test files

m3: num channels due to #counters < 3
* workaround for m3 for messed up num channels (client always assumes all counters enabled and adds them to num channels), fix for hdf5

g2: exptime master file inconsistency
- exptime didnt match because of round of when setting burst mode (sets to a different clk divider)
- so updating actual time for all timers (exptime, period, subexptime etc, )  in Module class, get timer values from detector when setting it and then send to receiver to write in master file

ctb image size incorrect:
-  write actual size into master file and not the reserved size (digital reduces depending on dbit list and dbit offset)
- added a calculate ctb image size free function in generalData.h that is used there as well as for the tests.


master file inconsistencies
- refactored master attributes writing using templates
-    names changed to keep it consistent between json and hdf5 master file (Version, Pixels, Exposure Times, GateDelays, Acquisition Period, etc.)
-  datatypes changed to keep it simple where possible: imageSize, dynamicRange, tengiga, quad, readnrows, analog, analogsamples, digital, digitalsamples, dbitreorder, dbitoffset, transceivermask, transeiver, transceiversamples, countermask, gates =>int
- replacing "toString" with arrays, objects etc for eg for scan, rois, etc.
- json header always written (empty dataset or empty brackets)
- hdf5 needs const char* so have to convert strings to it, but taking care that strings exist prior to push_back
- master attributes (redundant string literals->error prone

tests for master file
- suppressed deprecated functions in rapidjson warnings just for the tests
- added slsREceiverSoftware/src to allow access to receiver_defs.h to test binary/hdf5 version
- refactored acquire tests by moving all the acquire tests from individual detector type files to a single one=test-Caller-acquire.cpp
- set some default settings (loadBasicSettings) for a basic acquire at load config part for the test_simulator python scripts. so minimum number of settings for detector to be set for any acquire tests.
- added tests to test master files for json and hdf5= test-Caller-master-attributes.cpp
- added option to add '-m' markers for tests using test_simulator python script
2025-07-25 11:45:26 +02:00
1665937540 refactoring code and compiling binary 2025-05-19 13:19:32 +02:00
297c3752e3 Dev/remove gotthard i (#1108)
* slsSupportLib done, at receiver rooting out in implementation

* removed from receiver and client

* removed everywhere except gui, python and client(commands.yaml and Detector.h)

* updated python

* fixed autocomplete to print what the issue is if there is one with ToString when running the autocomplete script to generate fixed.json. updated readme.md in generator folder

* formatting

* removed enums for dacs

* udpating autocomplete and generating commands

* removed gotthard from docs and release notes

* removed dac test

* bug from removing g1

* fixed virtual test for xilinx, was minor. so in this PR

* gui done

* binary in merge fix

* formatting and removing enums

* updated fixed and dump.json

* bash autocomplete

* updated doc on command line generation

* removing increments in dac enums for backward compatibility. Not required

* removed ROI from rxParameters  (only in g1), not needed to be backward compatible

* removed the phase shift option from det server staruip
2025-03-10 14:24:33 +01:00
315d49f8df ctb: patwaittime and exptime (#1076)
* cli: patwaittime also takes time argument, api: patwaitclocks and patwaitinterval, tcp: patwaitinterval is 2 functions for set and get, patwaitclocks remains a single for backward compatibility with -1 for get, server (loadpattern): clks using member names (needs to be refactored). needs tobe discussed what to do with pattern files.

* all tests passed

* fixed test 
* exptime deprecated for ctb and xilinx

* pyctbgui..not there yet

* fixed in pyctbgui

* removed redundant warning for ctb and xilinx exptime in Detector class (already in module class handling all exptime signatures), patwait, patloop and patnloop have to be non inferrable commands because of support for old commands (level as suffix)

* fix formatting error from command line parsing

* fix tests for patwaittime
2025-01-31 16:48:32 +01:00
5088e5a205 Dev/detach pthreads not joining (#1019)
* detach the pthreads that are not joining else memory leak

* removed the clean up comment, also refactored the pthread join/detach for ctb 1g
2024-11-07 11:24:46 +01:00
2dc0963c56 Dev/reg bit change no validate (#970)
- do not validate write reg, setbit and clearbit by default anymore
- --validate will force validation on the bitmask or entire reg
- remove return value for write reg (across server to client, but thankfully not in the Detector class)
- extend validation into writereg, setbit and clearbit for Eiger (always special)
-  need to check python (TODO)
- missed the rx_zmqip implementations in detector.h and python bindings
2024-09-30 16:54:12 +02:00
9f079b17a2 Dev/xilinx mat update (#959)
* put back code to obtain adc and dac device indexafter loading device tree and then create folder iio_device_links and create symbolic links there according to device indices found. ln -sf operation not permitted, so folder has to be deleted and created everytime. Also refactored definitions to have all the xilinx name or detector specific stuff out of programbyArm.c

* uncommented waittransceiverreset at startup (should work now) and return of powering off chip at startup (error for transceiver alignment reset)

* updated registerdefs from firmware

* minor prints and updating names from registerdefs

* waittransceiverreset has been fixed in firmware and removing warnign for that, transceiver alignment check for powering off chip is not done in fw (giving a warning and returning ok for now)

* fixing ipchecksum (not done), removed startperiphery, allowing readout command to be allowed for xilinx when acquiring
2024-09-10 16:19:03 +02:00
c6477e0ed6 fixed stop server not starting up with setup variables (#949)
* m3: fixed stop server not starting up with setup variables

* all servers except eiger fixed for virtual stop server to start up with setupDetector function called

* virtual tests work

* eiger: versions print neednt be in stop server

* jungfrau: stop server (not virtual) also needs to read config file

* ensuring master is setup for virtual and real servers
2024-09-10 15:24:51 +02:00
b4533ac11f Dev/xilinx ctb test (#942)
* voltage regulators only looks at dac and not at ctrl_reg

* xilinx: change dac max to 2048, setting dac ist not inverse conversion from dac to voltage anymore, but setting power is inverse, also there is max and min to power, a different min for vio and this is checked at funcs interface, not printign or converting to mv in dac for power regulators (as its conversion max and min are different)

* Use links for dacs/adc and adapt power rglt thresholds

* Remove wait for transceiver reset

* adc and dac device not used anymore and hence removed

* udp restucturing: arm has to be multiple of 16 and no byteswap in udp_gen, option to compile locally in arm architecture, memsize of the second udp memory has to be limited

---------

Co-authored-by: Martin Brückner <martin.brueckner@psi.ch>
2024-08-20 14:33:18 +02:00
c13049f144 G2: reconfigure chip (#927)
* changed common.c readADCFromFile to make it more general and move temperature calculation for Eiger out of this function and inside whereever it is called.
* g2 and m2: gethighvoltage was just a variable set in server, it is now moved to a get inside DAC5671 implementation (but not reading a measured value, instead what is set from a file), high voltage variable used inside DAC5671 for virtual servers
* g2: switching off hv (ifrom non zero to zero value) will wait for 10s; powering on chip reconfigures chip; powering off chip unconfigures chip; powering off chip also includes check if hv = 0, if not throw exception; chip configuration checked before acquring; at start up: hv switched off and chip powered on, so does not wait 10s to switch off hv;
* included test to check powering off chip when hv is on should throw an exception
* g2:  check if chip configured before acquiring

* nios: read hv value set from file and virtual still goes into DAC5671 for conversions to and fro dac to V, change common readadc to readparameter to generalize, make sethighvoltage into a get and set to catch errors in get as well, g2: if not at startup, remmeber hv value before setting it and after check if value was being switched off (from a non zero value) and wait 10s if it was (10s wait only for switching off from non zero and not at startup)
2024-08-02 12:46:39 +02:00
56abf82d92 updated binaries 2024-02-07 13:23:58 +01:00
3d21bb64c4 Dev/xilinx acq (#901)
* period and exptime(patternwaittime level 0)

* added new regsieterdefs and updated api version and fixedpattern reg

* autogenerate commands

* formatting

* minor

* wip resetflow, readout mode, transceiver mask, transceiver enable

* acquisition, but streaming done bit and busy (exposing + read chip to fifo) not known yet from fw

* programming fpga and device tree done

* most configuration done, need to connect configuretransceiver to client

* stuck at resetting transciever timed out

* minor

* fixed virtual, added chip busyto fifo, streaming busy, set/getnext framenumber

* configuretransceiver from client, added help in client

* make formatt and command generation

* tests for xilinx ctb works

* command generation

* dacs added and tested, power not done

* power added

* added temp_fpga

* binaries in

* ctrlreg is 0 to enable chip=fixed, high dac val = min val= fixed, power regulators in weird order=fixed, device tree could be loaded with dacs before adcs=fixed

* start works

* virtual server sends

* receiver works

* tests

* python function and enum generation, commands generatorn and autocomplete, formatting, tests

* tests fail at start(transceiver not aligned)

* tests passed

* all binaries compiled

* eiger binary in

* added --nomodule cehck for xilinx
2024-02-07 13:23:08 +01:00
c8bb70f876 Dev/xilinx defaults and pattern (#888)
* implemented testbus, testfpga, set/get #frames, triggers, allowed that and for connection to client, also allowed, getnumchannels, configuremac, getrunstatus, setdetectorposition with dummy values

* connected kernelversion, hardwareversion, versions, framesl, triggersl, dr, timingmode, pattern (except patioctrl) thats there for altera ctb

* replaced set/get64Bit to set/getU64bit in all loadpattern.c for (ctb and m3 also)
2024-01-11 18:01:08 +01:00
9a08ecc5a5 Xilinx client tests (#887)
* implemented testbus, testfpga, set/get #frames, triggers, allowed that and for connection to client, also allowed, getnumchannels, configuremac, getrunstatus, setdetectorposition with dummy values

* allowing tests for xilinx

* binaries in
2024-01-10 16:23:52 +01:00
9738cb7d74 Xilinx ctb (#884)
* updated registers, arm64

* compiler set to aarch64 for xilinx server

* updated RegisterDefs.h

* merge into generate branch and resolving conflicts and adding the xilinx changes to callerspecial and commands.yaml

* compiles and can print firmware version (using a different csp0 address)

* fixing other servers (gotthard, jungfrau, moench, mythen3) that it returns in case of mapping failure, xilinxctb: added that it checks type, prints proper fw version, checks kernel date, added armprocessor define to use in common places, added specifiers to supress overflow and truncation warnings

* added detector ip and mac adddress to the printout

* fixed tests and recompiled servers
2024-01-04 17:10:16 +01:00
66baaf1ebd dev: fix server logic in checking detector idle (#861)
* fix buggy logic in checking detector idle and an argument check
2023-11-09 15:07:34 +01:00
7d7ac26c30 execute command inside server fixed (from fix simulator tests and exec command PR) (#857) 2023-11-08 09:26:11 +01:00
397e846509 Dev: fix py virtual test (#846)
* draft to fix virtual test when it fails

* catching errors in tests and removing sigchild ignore so servers (process in background) executing commands will not fail (pclose no child processes, if sigchld is ignored) fixed

* uncommented python loading config

* somehow killal slsReciever in second detector test fails even though no receiver running

* fixing script for virtual simlator test:fixed issue with check if process running, fixed moench tests
2023-11-07 09:30:46 +01:00
9834b07b47 Dev/fix port size (#805)
* port datatype changing from int to uint16_t
* throwing for -1 given for uint16_t ports
2023-09-28 09:36:39 +02:00
77d13f0794 updated all servers as my3 was not updated and had api issues 2023-08-29 11:11:19 +02:00
1873cc9310 Moench dacs defaults (#788)
* merge fix from 7.0.2: new jungfrau fw versions, incremented binary, hdf5 and json versions

* moench: changed dac names and default values to old moench values

* moench: remove interface clk polarity at start up

* moench: default speed is half speed, default values for adc offset and adc phase for different speeds (only half speed confirmed), adc vref voltage to 2.0 like G1

* moench: connected adc pipeline to client

* moench: receiver- default frames per file is 100k and discard partial frames as default

* moench binary in

* using tostring in gui for dacs

* moved frame discard policy as a parameter to be configured with a default depending on detector

* moench: 300 degrees for adc phase in full speed
2023-07-31 14:02:30 +02:00
d5ce03918c ctb: allowing adc enable for 10g to be 0, romode changing bit from disable analog to enable analog, removing matterhorn specific (#789) 2023-07-25 10:33:18 +02:00
c628ae2192 1. Ctb transceiver ro (#773)
*  transceiverenable, tsamples, romode for tranceiver and digital_transceiver

* 202 spec instr only for transceiver mode

* removed check for empty in trans readout and clean memory before reading from fifo

* ctb read fifo strobe for all after reading all channels, adding 1us after selecting channel, changing fw date

* updated 10gb transceiver enable

----
* added transceiver (tsamples, romode(transceiver, digital_transceiver), transceiverenable (mask)

* clean memory before reading from fifo (for analog and digital as well)

* read fifo then read strobe (also corresp fw) fixes number of reads (also for analg and digital)-> increases all pipelines by 1

* fixed bug in rearranging digital data in receiver

* fixed bug in streaming size of data after rearranging

* fixed bug in setbit, clearbit,and getbit

* status checks fifo before returning idle (transmitting if data in fifo if transceiver more enabled)

* soem matterhorn specifics that will need to be put into pattern in a month or two. this is temporary.

* NOTE: breaking api. rxParameters struct has transceiverenabel and tsamples given from det to receiver
2023-07-14 16:29:21 +02:00
58cdb5bd20 added patfname command to save the file the last pttern was loaded from (#770)
* added patfname command to save the file the last pttern was loaded from
2023-06-22 09:08:48 +02:00
3f9ec695db 2. Patioctrl uint64 t (#766)
* when dbit list is enabled, the size of data in zmq stream is changed to only the digital bits enabled size. now fixed to also include analog size

* allowing to set 0xffffffffffffffff to pat io control. prevously was used to do a get. fixed also for pat bit mask and pat mask
2023-06-15 09:30:52 +02:00
a5f26252b8 ctb v_limit dac tristate (#761)
* ctb: allowing dac to tristate (-100) even if v_limit is set

* binary in

* formatting
2023-06-15 08:42:42 +02:00
65b8c9c5c1 Moench rw3 (#745)
* moench, removed chip version, filter resistor, filter cells, currentsoures, gain mode, setttings(modes), dbitphase, maxdbitphase, autocompdisable, comparatordisabletime, made acq start and stop a pulse, removed unused registers

* added parallel command

* remove gain plot for moench

* moench: updated adc invert val

* moench: update adcoffset to 0xf and adcphase to 140 degrees

* removed sync clock in moench

* updated min fw version

* removing config file in moench server
2023-05-25 11:00:23 +02:00
0a7fd0a51a set bit and clear bit only verifies that bit (#746) 2023-05-25 10:35:17 +02:00
afee45790f 1. allow 1gbe non blocking acquire by creating another thread (#753)
* allow 1gbe non blocking acquire by creating another thread

* removed unnnecessary print out in ctb
2023-05-24 13:39:40 +02:00
f0c789dc91 Revert "Ctb: allow adc mask enable to be 0 for 1 and 10GbE", and better error message (#751)
* Revert "Ctb: allow adc mask enable to be 0 for 1 and 10GbE (#750)"

This reverts commit a0f250a487.

* better error message about setting adc mask to 0. Cannot set it to 0 due to ram allocation
2023-05-22 12:26:07 +02:00
a0f250a487 Ctb: allow adc mask enable to be 0 for 1 and 10GbE (#750)
* ctb: allow adc mask enable to be 0 for 1 and 10GbE
2023-05-22 11:26:57 +02:00
Dhanya Thattil
cab2b335dc Fix ctb slow adc fw (#713)
Firmware updated. spi moved to firmware. In Software, configuring, then a pulse to start, wait for done bit and convert the values read from a regiter.
2023-04-12 11:25:41 +02:00
21db57dd89 binaries in 2023-02-24 10:44:17 +01:00
dc5db905d4 merge from 7.0.0 2023-02-24 10:39:51 +01:00
Dhanya Thattil
48a684b95f dev:Eiger febl febr (#601)
* eiger: get febl and febr versions in versions command, also added in python
2023-02-24 10:06:11 +01:00
d84e9652d3 updated versions for the servers 2023-02-22 11:36:47 +01:00
Dhanya Thattil
adcde9fd49 user friendly message added from ' dangerous to continue' to 'check firmware' (#665) 2023-02-20 16:35:33 +01:00
Dhanya Thattil
55bf73f3b7 unicast udp_srcmac (#642)
* udp_srcmac can only be a unicast address (LSB of first octet must be 0)

* renamed binaries
2023-02-03 10:56:19 +01:00
Dhanya Thattil
39b1f5bbf2 Moench rewrite (#597)
* copied jungfrau server to moench and adapted

* fixed image size and num packets

* read n rows allows 16

* commneted out configure_asic_timer at server startup. To be removed later the ASIC_CTRL_REG and storage cell options

* moench:removing the decrement (which was in jf)  in read n rows to register

* removed lblsamples from gui
2022-12-15 09:16:51 +01:00
0f6f20a720 merge from 7.0.0.rc1 2022-12-13 10:03:57 +01:00
Dhanya Thattil
ff5aa13073 Fix update mode hw version (#594)
* fix to add 'get hardware version' into allowed update mode functions in server
2022-12-12 11:39:08 +01:00
602c02f2f7 renaming of servers for version 2022-12-08 09:24:48 +01:00
f3f83de690 updated client, receiver and server versions to 7.0.0.rc1 2022-12-08 09:15:50 +01:00
4ff0ef47eb binaries in 2022-12-07 16:22:04 +01:00
cda59c4beb binaries in 2022-12-07 11:13:49 +01:00
Dhanya Thattil
2ff5291f48 hardware version (#580)
* hardware version for all dets except eiger
Co-authored-by: Erik Frojdh <erik.frojdh@gmail.com>
2022-11-24 11:24:05 +01:00