refactoring such that the operations done of reg addresses is limited to the blackfin,nios and arm files

slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c

@@ -2193,10 +2193,9 @@ int configureMAC() {
     calcChecksum(udp);
 
     // force FPGA writes to be aligned and in order
-    uint32_t words[sizeof(udp_header) / sizeof(uint32_t)];
-    memcpy(words, udp, sizeof(udp_header));
-    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
-        bus_w(addr + i * 2, words[i]);
+    if (bus_w_block(addr, udp, sizeof(udp_header)) == FAIL) {
+        LOG(logERROR, ("Failed to write UDP header\n"));
+        return FAIL;
     }
 
     cleanFifos(); // FIXME: resetPerpheral() for ctb?

slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.c

@@ -2041,9 +2041,9 @@ void setFirstUDPDestination(int value) {
                                    PKT_CONFIG_RXR_START_ID_MSK));
 }
 
-void setupHeader(int iRxEntry, int vetoInterface, uint32_t destip,
-                 uint64_t destmac, uint16_t destport, uint64_t sourcemac,
-                 uint32_t sourceip, uint16_t sourceport) {
+int setupHeader(int iRxEntry, int vetoInterface, uint32_t destip,
+                uint64_t destmac, uint16_t destport, uint64_t sourcemac,
+                uint32_t sourceip, uint16_t sourceport) {
 
     // start addr
     uint32_t addr = BASE_UDP_RAM;
@@ -2087,15 +2087,15 @@ void setupHeader(int iRxEntry, int vetoInterface, uint32_t destip,
     calcChecksum(udp);
 
     // force FPGA writes to be aligned and in order
-    uint32_t words[sizeof(udp_header) / sizeof(uint32_t)];
-    memcpy(words, udp, sizeof(udp_header));
-    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
-        bus_w(addr + i * sizeof(uint32_t), words[i]);
+    if (bus_w_block(addr, udp, sizeof(udp_header)) == FAIL) {
+        LOG(logERROR, ("Failed to write UDP header\n"));
+        return FAIL;
     }
 
     if (iRxEntry < numUdpDestinations) {
         LOG(logINFO, ("\tIP checksum : 0x%lx\n\n", udp->ip_checksum));
     }
+    return OK;
 }
 
 void calcChecksum(udp_header *udp) {
@@ -2209,13 +2209,23 @@ int configureMAC() {
         }
 #endif
         // data
-        setupHeader(iRxEntry, 0, dstip, dstmac, dstport, srcmac, srcip,
-                    srcport);
+        if (setupHeader(iRxEntry, 0, dstip, dstmac, dstport, srcmac, srcip,
+                        srcport) == FAIL) {
+            LOG(logERROR, ("could not set udp destination IP and port for "
+                           "data interface [entry:%d] \n",
+                           iRxEntry));
+            return FAIL;
+        }
 
         // veto
         if (i10gbe) {
-            setupHeader(iRxEntry, 1, dstip2, dstmac2, dstport2, srcmac2, srcip2,
-                        srcport2);
+            if (setupHeader(iRxEntry, 1, dstip2, dstmac2, dstport2, srcmac2,
+                            srcip2, srcport2) == FAIL) {
+                LOG(logERROR, ("could not set udp destination IP and port for "
+                               "veto interface [entry:%d] \n",
+                               iRxEntry));
+                return FAIL;
+            }
         }
     }
     cleanFifos();

slsDetectorServers/gotthard2DetectorServer/slsDetectorFunctionList.h

@@ -146,6 +146,9 @@ int getNumberofDestinations(int *retval);
 int setNumberofDestinations(int value);
 int getFirstUDPDestination();
 void setFirstUDPDestination(int value);
+int setupHeader(int iRxEntry, int vetoInterface, uint32_t destip,
+                uint64_t destmac, uint16_t destport, uint64_t sourcemac,
+                uint32_t sourceip, uint16_t sourceport);
 void calcChecksum(udp_header *udp);
 int configureMAC();
 int setDetectorPosition(int pos[]);

slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.c

@@ -1859,9 +1859,9 @@ int getPrimaryInterface() {
     return ((bus_r(CONFIG_REG) & CONFIG_INNR_PRIMRY_INTRFCE_MSK) ? 1 : 0);
 }
 
-void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
-                 uint64_t destmac, uint16_t destport, uint64_t sourcemac,
-                 uint32_t sourceip, uint16_t sourceport) {
+int setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
+                uint64_t destmac, uint16_t destport, uint64_t sourcemac,
+                uint32_t sourceip, uint16_t sourceport) {
 
     // start addr
     uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG
@@ -1903,15 +1903,15 @@ void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
     calcChecksum(udp);
 
     // force FPGA writes to be aligned and in order
-    uint32_t words[sizeof(udp_header) / sizeof(uint32_t)];
-    memcpy(words, udp, sizeof(udp_header));
-    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
-        bus_w(addr + i * 2, words[i]);
+    if (bus_w_block(addr, udp, sizeof(udp_header)) == FAIL) {
+        LOG(logERROR, ("Failed to write UDP header\n"));
+        return FAIL;
     }
 
     if (iRxEntry < numUdpDestinations) {
         LOG(logINFO, ("\tIP checksum : 0x%lx\n\n", udp->ip_checksum));
     }
+    return OK;
 }
 
 void calcChecksum(udp_header *udp) {
@@ -2028,21 +2028,41 @@ int configureMAC() {
 #endif
         if (numInterfaces == 2) {
             // bottom
-            setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip,
-                        srcport);
+            if (setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
+                            srcip, srcport) == FAIL) {
+                LOG(logERROR, ("could not set udp header for outer interface "
+                               "[entry:%d]\n",
+                               iRxEntry));
+                return FAIL;
+            }
             // top
-            setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2,
-                        srcip2, srcport2);
+            if (setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2,
+                            srcip2, srcport2) == FAIL) {
+                LOG(logERROR, ("could not set udp header for inner interface "
+                               "[entry:%d]\n",
+                               iRxEntry));
+                return FAIL;
+            }
         }
         // single interface
         else {
             // default
             if (selInterface == 0) {
-                setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
-                            srcip, srcport);
+                if (setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
+                                srcip, srcport) == FAIL) {
+                    LOG(logERROR, ("could not set udp header for outer "
+                                   "interface [entry:%d]\n",
+                                   iRxEntry));
+                    return FAIL;
+                }
             } else {
-                setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac,
-                            srcip, srcport2);
+                if (setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac,
+                                srcip, srcport2) == FAIL) {
+                    LOG(logERROR, ("could not set udp header for inner "
+                                   "interface [entry:%d]\n",
+                                   iRxEntry));
+                    return FAIL;
+                }
             }
         }
     }

slsDetectorServers/jungfrauDetectorServer/slsDetectorFunctionList.h

@@ -167,9 +167,9 @@ int getFirstUDPDestination();
 void setFirstUDPDestination(int value);
 void selectPrimaryInterface(int val);
 int getPrimaryInterface();
-void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
-                 uint64_t destmac, uint16_t destport, uint64_t sourcemac,
-                 uint32_t sourceip, uint16_t sourceport);
+int setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
+                uint64_t destmac, uint16_t destport, uint64_t sourcemac,
+                uint32_t sourceip, uint16_t sourceport);
 void calcChecksum(udp_header *udp);
 
 int configureMAC();

slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.c

@@ -1194,9 +1194,9 @@ int getPrimaryInterface() {
     return ((bus_r(CONFIG_REG) & CONFIG_INNR_PRIMRY_INTRFCE_MSK) ? 1 : 0);
 }
 
-void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
-                 uint64_t destmac, uint16_t destport, uint64_t sourcemac,
-                 uint32_t sourceip, uint16_t sourceport) {
+int setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
+                uint64_t destmac, uint16_t destport, uint64_t sourcemac,
+                uint32_t sourceip, uint16_t sourceport) {
 
     // start addr
     uint32_t addr = (type == INNER ? RXR_ENDPOINT_INNER_START_REG
@@ -1238,15 +1238,15 @@ void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
     calcChecksum(udp);
 
     // force FPGA writes to be aligned and in order
-    uint32_t words[sizeof(udp_header) / sizeof(uint32_t)];
-    memcpy(words, udp, sizeof(udp_header));
-    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
-        bus_w(addr + i * 2, words[i]);
+    if (bus_w_block(addr, udp, sizeof(udp_header)) == FAIL) {
+        LOG(logERROR, ("Failed to write UDP header\n"));
+        return FAIL;
     }
 
     if (iRxEntry < numUdpDestinations) {
         LOG(logINFO, ("\tIP checksum : 0x%lx\n\n", udp->ip_checksum));
     }
+    return OK;
 }
 
 void calcChecksum(udp_header *udp) {
@@ -1363,21 +1363,41 @@ int configureMAC() {
 #endif
         if (numInterfaces == 2) {
             // bottom
-            setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac, srcip,
-                        srcport);
+            if (setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
+                            srcip, srcport) == FAIL) {
+                LOG(logERROR, ("could not set udp header for outer interface "
+                               "[entry:%d]\n",
+                               iRxEntry));
+                return FAIL;
+            }
             // top
-            setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2,
-                        srcip2, srcport2);
+            if (setupHeader(iRxEntry, INNER, dstip2, dstmac2, dstport2, srcmac2,
+                            srcip2, srcport2) == FAIL) {
+                LOG(logERROR, ("could not set udp header for inner interface "
+                               "[entry:%d]\n",
+                               iRxEntry));
+                return FAIL;
+            }
         }
         // single interface
         else {
             // default
             if (selInterface == 0) {
-                setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
-                            srcip, srcport);
+                if (setupHeader(iRxEntry, OUTER, dstip, dstmac, dstport, srcmac,
+                                srcip, srcport) == FAIL) {
+                    LOG(logERROR, ("could not set udp header for outer "
+                                   "interface [entry:%d]\n",
+                                   iRxEntry));
+                    return FAIL;
+                }
             } else {
-                setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac,
-                            srcip, srcport2);
+                if (setupHeader(iRxEntry, INNER, dstip, dstmac, dstport, srcmac,
+                                srcip, srcport2) == FAIL) {
+                    LOG(logERROR, ("could not set udp header for inner "
+                                   "interface [entry:%d]\n",
+                                   iRxEntry));
+                    return FAIL;
+                }
             }
         }
     }

slsDetectorServers/moenchDetectorServer/slsDetectorFunctionList.h

@@ -147,9 +147,9 @@ int getFirstUDPDestination();
 void setFirstUDPDestination(int value);
 void selectPrimaryInterface(int val);
 int getPrimaryInterface();
-void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
-                 uint64_t destmac, uint16_t destport, uint64_t sourcemac,
-                 uint32_t sourceip, uint16_t sourceport);
+int setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
+                uint64_t destmac, uint16_t destport, uint64_t sourcemac,
+                uint32_t sourceip, uint16_t sourceport);
 void calcChecksum(udp_header *udp);
 int configureMAC();
 int setDetectorPosition(int pos[]);

slsDetectorServers/mythen3DetectorServer/slsDetectorFunctionList.c

@@ -2260,10 +2260,9 @@ int configureMAC() {
         calcChecksum(udp);
 
         // force FPGA writes to be aligned and in order
-        uint32_t words[sizeof(udp_header) / sizeof(uint32_t)];
-        memcpy(words, udp, sizeof(udp_header));
-        for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
-            bus_w(addr + i * sizeof(uint32_t), words[i]);
+        if (bus_w_block(addr, udp, sizeof(udp_header)) == FAIL) {
+            LOG(logERROR, ("Failed to write UDP header\n"));
+            return FAIL;
         }
 
         if (iRxEntry < numUdpDestinations) {

slsDetectorServers/slsDetectorServer/include/arm64.h

@@ -5,15 +5,29 @@
 #include <inttypes.h>
 #include <sys/types.h>
 
+/** csp0base */
 void bus_w(u_int32_t offset, u_int32_t data);
-void bus_w_csp1(u_int32_t offset, u_int32_t data);
-void bus_w_csp2(u_int32_t offset, u_int32_t data);
 u_int32_t bus_r(u_int32_t offset);
+
+/** udp header */
+void bus_w_csp1(u_int32_t offset, u_int32_t data);
 u_int32_t bus_r_csp1(u_int32_t offset);
+
+void bus_w_csp2(u_int32_t offset, u_int32_t data);
 u_int32_t bus_r_csp2(u_int32_t offset);
+
+/**
+ * Force FPGA writes to be aligned and in order
+ * by writing 32 bit words to the bus (csp1)
+ * @returns FAIL if size is not a non-zero multiple of sizeof(uint32_t), else OK
+ */
+int bus_w_csp1_block(const void *src, size_t size);
+
 uint64_t getU64BitReg(int aLSB, int aMSB);
 void setU64BitReg(uint64_t value, int aLSB, int aMSB);
+
+/**  literal register address value provided by client */
 u_int32_t readRegister(u_int32_t offset);
 u_int32_t writeRegister(u_int32_t offset, u_int32_t data);
+
 int mapCSP0(void);
-u_int32_t *Arm_getUDPBaseAddress();

slsDetectorServers/slsDetectorServer/include/blackfin.h

@@ -22,102 +22,36 @@
 #define BFIN_AMC_ACCESS_EXTENSION_FNAME                                        \
     "/sys/kernel/debug/blackfin/ebiu_amc/EBIU_AMBCTL1"
 
-/**
- * Write into a 16 bit register
- * @param offset address offset
- * @param data 16 bit data
- */
-void bus_w16(u_int32_t offset, u_int16_t data);
+#define I2C_CLOCK_MHZ (131.25)
 
-/**
- * Read from a 16 bit register
- * @param offset address offset
- * @retuns 16 bit data read
- */
+/* 16 bit register */
+void bus_w16(u_int32_t offset, u_int16_t data);
 u_int16_t bus_r16(u_int32_t offset);
 
-/**
- * Write into a 32 bit register
- * @param offset address offset
- * @param data 32 bit data
- */
+/** 32 bit register */
 void bus_w(u_int32_t offset, u_int32_t data);
-
-/**
- * Read from a 32 bit register
- * @param offset address offset
- * @retuns 32 bit data read
- */
 u_int32_t bus_r(u_int32_t offset);
 
 /**
- * Read from a 64 bit register
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- * @returns 64 bit data read
+ * Force FPGA writes to be aligned and in order
+ * by writing 32 bit words to the bus
+ * @returns FAIL if size is not a non-zero multiple of sizeof(uint32_t), else OK
  */
-int64_t get64BitReg(int aLSB, int aMSB);
+int bus_w_block(u_int32_t offset, const void *src, size_t size);
 
-/**
- * Write into a 64 bit register
- * @param value 64 bit data
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- * @returns 64 bit data read
- */
+/** legacy: to be replaced at some point (returns int64_t via tcp) */
+int64_t get64BitReg(int aLSB, int aMSB);
 int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
 
-/**
- * Read unsigned 64 bit from a 64 bit register
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- * @returns unsigned 64 bit data read
- */
 uint64_t getU64BitReg(int aLSB, int aMSB);
-
-/**
- * Write unsigned 64 bit into a 64 bit register
- * @param value unsigned 64 bit data
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- */
 void setU64BitReg(uint64_t value, int aLSB, int aMSB);
 
-/**
- * Read from a 32 bit register (literal register value provided by client)
- * @param offset address offset
- * @retuns 32 bit data read
- */
+/**  literal register address value provided by client */
 u_int32_t readRegister(u_int32_t offset);
-
-/**
- * Write into a 32 bit register (literal register value provided by client)
- * @param offset address offset
- * @param data 32 bit data
- */
 void writeRegister(u_int32_t offset, u_int32_t data);
-
-/**
- * Read from a 16 bit register (literal register value provided by client)
- * @param offset address offset
- * @retuns 16 bit data read
- */
 u_int32_t readRegister16(u_int32_t offset);
-
-/**
- * Write into a 16 bit register (literal register value provided by client)
- * @param offset address offset
- * @param data 16 bit data
- */
 void writeRegister16(u_int32_t offset, u_int32_t data);
 
-/**
- * Get base address for memory copy
- */
-uint32_t *Blackfin_getBaseAddress();
-/**
- * Map FPGA
- */
 int mapCSP0(void);
 
 /**

slsDetectorServers/slsDetectorServer/include/nios.h

@@ -5,87 +5,29 @@
 #include <inttypes.h>
 #include <sys/types.h>
 
-/**
- * Write into a 32 bit register for cspbase 1
- * @param offset address offset
- * @param data 32 bit data
- */
-void bus_w_csp1(u_int32_t offset, u_int32_t data);
+/** csp0base */
+void bus_w(u_int32_t offset, u_int32_t data);
+u_int32_t bus_r(u_int32_t offset);
 
-/**
- * Read from a 32 bit register for cspbase 1
- * @param offset address offset
- * @retuns 32 bit data read
- */
+void bus_w_csp1(u_int32_t offset, u_int32_t data);
 u_int32_t bus_r_csp1(u_int32_t offset);
 
 /**
- * Write into a 32 bit register
- * @param offset address offset
- * @param data 32 bit data
+ * Force FPGA writes to be aligned and in order
+ * by writing 32 bit words to the bus
+ * @returns FAIL if size is not a non-zero multiple of sizeof(uint32_t), else OK
  */
-void bus_w(u_int32_t offset, u_int32_t data);
+int bus_w_block(u_int32_t offset, const void *src, size_t size);
 
-/**
- * Read from a 32 bit register
- * @param offset address offset
- * @retuns 32 bit data read
- */
-u_int32_t bus_r(u_int32_t offset);
-
-/**
- * Read from a 64 bit register
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- * @returns 64 bit data read
- */
+/** legacy: to be replaced at some point (returns int64_t via tcp) */
 int64_t get64BitReg(int aLSB, int aMSB);
-
-/**
- * Write into a 64 bit register
- * @param value 64 bit data
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- * @returns 64 bit data read
- */
 int64_t set64BitReg(int64_t value, int aLSB, int aMSB);
 
-/**
- * Read unsigned 64 bit from a 64 bit register
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- * @returns unsigned 64 bit data read
- */
 uint64_t getU64BitReg(int aLSB, int aMSB);
-
-/**
- * Write unsigned 64 bit into a 64 bit register
- * @param value unsigned 64 bit data
- * @param aLSB LSB offset address
- * @param aMSB MSB offset address
- */
 void setU64BitReg(uint64_t value, int aLSB, int aMSB);
 
-/**
- * Read from a 32 bit register (literal register value provided by client)
- * @param offset address offset
- * @retuns 32 bit data read
- */
+/**  literal register address value provided by client */
 u_int32_t readRegister(u_int32_t offset);
-
-/**
- * Write into a 32 bit register (literal register value provided by client)
- * @param offset address offset
- * @param data 32 bit data
- */
 void writeRegister(u_int32_t offset, u_int32_t data);
 
-/**
- * Map FPGA
- */
 int mapCSP0(void);
-
-/**
- * Get Nios base address
- */
-u_int32_t *Nios_getBaseAddress();

slsDetectorServers/slsDetectorServer/src/arm64.c

@@ -8,6 +8,7 @@
 #include "sls/sls_detector_defs.h"
 
 #include <fcntl.h>    // open
+#include <string.h>   // memcpy
 #include <sys/mman.h> // mmap
 
 /* global variables */
@@ -28,6 +29,12 @@ void bus_w(u_int32_t offset, u_int32_t data) {
     *ptr1 = data;
 }
 
+u_int32_t bus_r(u_int32_t offset) {
+    volatile u_int32_t *ptr1;
+    ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
+    return *ptr1;
+}
+
 void bus_w_csp1(u_int32_t offset, u_int32_t data) {
     volatile u_int32_t *ptr1;
     ptr1 = (u_int32_t *)(csp1base + offset / (sizeof(u_int32_t)));
@@ -40,12 +47,6 @@ u_int32_t bus_r_csp1(u_int32_t offset) {
     return *ptr1;
 }
 
-u_int32_t bus_r(u_int32_t offset) {
-    volatile u_int32_t *ptr1;
-    ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
-    return *ptr1;
-}
-
 void bus_w_csp2(u_int32_t offset, u_int32_t data) {
     volatile u_int32_t *ptr1;
     ptr1 = (u_int32_t *)(csp2base + offset / (sizeof(u_int32_t)));
@@ -58,6 +59,22 @@ u_int32_t bus_r_csp2(u_int32_t offset) {
     return *ptr1;
 }
 
+int bus_w_csp1_block(const void *src, size_t size) {
+    uint32_t step = sizeof(uint32_t);
+    if (size == 0 || size % sizeof(uint32_t) != 0) {
+        LOG(logERROR, ("Could not write block: size %zu is not a non-zero "
+                       "multiple of %zu\n",
+                       size, sizeof(uint32_t)));
+        return FAIL;
+    }
+    uint32_t words[size / sizeof(uint32_t)];
+    memcpy(words, src, size);
+    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
+        bus_w_csp1(i * step, words[i]);
+    }
+    return OK;
+}
+
 uint64_t getU64BitReg(int aLSB, int aMSB) {
     uint64_t retval = bus_r(aMSB);
     retval = (retval << 32) | bus_r(aLSB);
@@ -121,5 +138,3 @@ int mapCSP0(void) {
     }
     return OK;
 }
-
-u_int32_t *Arm_getUDPBaseAddress() { return csp1base; }

slsDetectorServers/slsDetectorServer/src/blackfin.c

@@ -9,6 +9,7 @@
 
 #include <fcntl.h>    // open
 #include <stdio.h>    // fopen
+#include <string.h>   //memcpy
 #include <sys/mman.h> // mmap
 #include <unistd.h>   // usleep
 
@@ -46,6 +47,22 @@ u_int32_t bus_r(u_int32_t offset) {
     return *ptr1;
 }
 
+int bus_w_block(u_int32_t offset, const void *src, size_t size) {
+    uint32_t step = 1 << MEM_MAP_SHIFT;
+    if (size == 0 || size % sizeof(uint32_t) != 0) {
+        LOG(logERROR, ("Could not write block: size %zu is not a non-zero "
+                       "multiple of %zu\n",
+                       size, sizeof(uint32_t)));
+        return FAIL;
+    }
+    uint32_t words[size / sizeof(uint32_t)];
+    memcpy(words, src, size);
+    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
+        bus_w(offset + i * step, words[i]);
+    }
+    return OK;
+}
+
 int64_t get64BitReg(int aLSB, int aMSB) {
     int64_t v64;
     u_int32_t vLSB, vMSB;
@@ -134,8 +151,6 @@ int mapCSP0(void) {
     return OK;
 }
 
-uint32_t *Blackfin_getBaseAddress() { return csp0base; }
-
 /* BF537 core clock; refined from /proc/cpuinfo in initCycleCounter() */
 #define BFIN_CCLK_HZ_DEFAULT 525000000UL
 static uint32_t bfinCyclesPerUs = BFIN_CCLK_HZ_DEFAULT / 1000000;

slsDetectorServers/slsDetectorServer/src/nios.c

@@ -9,6 +9,7 @@
 
 #include <fcntl.h>    // open
 #include <sys/mman.h> // mmap
+#include <string.h> // memcpy
 
 /* global variables */
 u_int32_t *csp0base = 0;
@@ -20,6 +21,18 @@ u_int32_t *csp0base = 0;
 u_int32_t *csp1base = 0;
 #define CSP1 0x18040000
 
+void bus_w(u_int32_t offset, u_int32_t data) {
+    volatile u_int32_t *ptr1;
+    ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
+    *ptr1 = data;
+}
+
+u_int32_t bus_r(u_int32_t offset) {
+    volatile u_int32_t *ptr1;
+    ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
+    return *ptr1;
+}
+
 void bus_w_csp1(u_int32_t offset, u_int32_t data) {
     volatile u_int32_t *ptr1;
     ptr1 = (u_int32_t *)(csp1base + offset / (sizeof(u_int32_t)));
@@ -32,16 +45,20 @@ u_int32_t bus_r_csp1(u_int32_t offset) {
     return *ptr1;
 }
 
-void bus_w(u_int32_t offset, u_int32_t data) {
-    volatile u_int32_t *ptr1;
-    ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
-    *ptr1 = data;
-}
-
-u_int32_t bus_r(u_int32_t offset) {
-    volatile u_int32_t *ptr1;
-    ptr1 = (u_int32_t *)(csp0base + offset / (sizeof(u_int32_t)));
-    return *ptr1;
+int bus_w_block(u_int32_t offset, const void *src, size_t size) {
+    uint32_t step = sizeof(uint32_t);
+    if (size == 0 || size % sizeof(uint32_t) != 0) {
+        LOG(logERROR, ("Could not write block: size %zu is not a non-zero "
+                       "multiple of %zu\n",
+                       size, sizeof(uint32_t)));
+        return FAIL;
+    }
+    uint32_t words[size / sizeof(uint32_t)];
+    memcpy(words, src, size);
+    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
+        bus_w(offset + i * step, words[i]);
+    }
+    return OK;
 }
 
 int64_t get64BitReg(int aLSB, int aMSB) {
@@ -124,6 +141,4 @@ int mapCSP0(void) {
             LOG(logINFO, ("Memory %s already mapped before\n", names[i]));
     }
     return OK;
-}
-
-u_int32_t *Nios_getBaseAddress() { return csp0base; }
+}

slsDetectorServers/xilinx_ctbDetectorServer/slsDetectorFunctionList.c

@@ -1537,10 +1537,9 @@ int configureMAC() {
     calcChecksum(udp);
 
     // force FPGA writes to be aligned and in order
-    uint32_t words[sizeof(udp_header) / sizeof(uint32_t)];
-    memcpy(words, udp, sizeof(udp_header));
-    for (size_t i = 0; i != sizeof(words) / sizeof(words[0]); ++i) {
-        bus_w_csp1(i * sizeof(uint32_t), words[i]);
+    if (bus_w_csp1_block(udp, sizeof(udp_header)) == FAIL) {
+        LOG(logERROR, ("Failed to write UDP header\n"));
+        return FAIL;
     }
 
     return OK;