dev//jf chip1 2 part3 (#1655)
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* cli and test side wip

* server side upto imp

* almost done, need to pick up from last pr to get chipindex

* update activatetime also for exptime

* use chipindex and fix the cli  put

* minor

* tests pass

* hdr mode works

* cannot cap activation time with 8 bit storage

* update activation time when changin exptime  only if hdr enabled

* update activation time no matter if hdr enabled or not (when changing exptime), its anyway not enabled

* enable hdr only after setting activation time

* fix enable by reading reg again

* swapped timeout and activation time, select bits reversed also for 1.2 chipversion

* inversion select removed in firmware

* minor: err message

* fix

* fixed autocomplete for synchrortron

* added hdr to python

* minor

* auto cli changes

* binaries in and conflict fix

* updated the help for hdr

* updated the help for python api and the pybindings minor refactor

* binary in

* minor typo in pybind

* fixed pybind error
This commit is contained in:
maliakal_d authored and GitHub committed 2026-11-05 16:17:21 +01:00
1 parent 47bf85af09
commit deb58dcb34
36 files changed
+51931 -25524

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+1
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@@ -9,6 +9,7 @@ pybind11_add_module(_slsdet
src/pattern.cpp
src/scan.cpp
src/current.cpp
src/hdr.cpp
src/duration.cpp
src/DurationWrapper.cpp
src/pedestal.cpp
+1
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@@ -32,6 +32,7 @@ BitAddress = _slsdet.BitAddress
RegisterValue = _slsdet.RegisterValue
scanParameters = _slsdet.scanParameters
currentSrcParameters = _slsdet.currentSrcParameters
hdrParameters = _slsdet.hdrParameters
DurationWrapper = _slsdet.DurationWrapper
pedestalParameters = _slsdet.pedestalParameters
Hz = _slsdet.Hz
+24
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@@ -3126,6 +3126,30 @@ class Detector(CppDetectorApi):
def collectionmode(self, value):
ut.set_using_dict(self.setCollectionMode, value)
@property
@element
def hdr(self):
"""[Jungfrau] Enables the high dynamic range in detector in synchrotron or fel mode.
Pass in an hdrParameters instance, optionally initialized with the desired operationMode (defs.operationMode.SYNCHOTRON or defs.operationMode.FEL). The default constructor hdrParameters() disables the HDR, which is the default mode of operation. FEL can only be used with chip version '1.2 HDR'.
Example
-------
>>> d.hdr = hdrParameters(defs.SYNCHROTRON)
>>> d.hdr
[enabled synchotron]
>>> d.hdr = hdrParameters(defs.FEL)
>>>d.hdr
[enabled fel]
>>> d.hdr = hdrParameters()
>>> d.hdr
[disabled]
"""
return self.getHDR()
@hdr.setter
def hdr(self, value):
ut.set_using_dict(self.setHDR, value)
@property
def maxclkphaseshift(self):
"""
+10
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@@ -1313,6 +1313,16 @@ void init_det(py::module &m) {
(void(Detector::*)(defs::collectionMode, sls::Positions)) &
Detector::setCollectionMode,
py::arg(), py::arg() = Positions{});
CppDetectorApi.def(
"getHDR",
(Result<defs::hdrParameters>(Detector::*)(sls::Positions) const) &
Detector::getHDR,
py::arg() = Positions{});
CppDetectorApi.def(
"setHDR",
(void (Detector::*)(const defs::hdrParameters, sls::Positions)) &
Detector::setHDR,
py::arg(), py::arg() = Positions{});
CppDetectorApi.def("getNumberOfBursts",
(Result<int64_t>(Detector::*)(sls::Positions) const) &
Detector::getNumberOfBursts,
+5
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@@ -353,4 +353,9 @@ void init_enums(py::module &m) {
.value("HOLE", slsDetectorDefs::collectionMode::HOLE)
.value("ELECTRON", slsDetectorDefs::collectionMode::ELECTRON)
.export_values();
py::enum_<slsDetectorDefs::operationMode>(Defs, "operationMode")
.value("SYNCHROTRON", slsDetectorDefs::operationMode::SYNCHROTRON)
.value("FEL", slsDetectorDefs::operationMode::FEL)
.export_values();
}
+20
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@@ -0,0 +1,20 @@
// SPDX-License-Identifier: LGPL-3.0-or-other
// Copyright (C) 2021 Contributors to the SLS Detector Package
#include "py_headers.h"
#include "sls/ToString.h"
#include "sls/sls_detector_defs.h"
namespace py = pybind11;
void init_hdr(py::module &m) {
using hdr = slsDetectorDefs::hdrParameters;
py::class_<hdr>(m, "hdrParameters")
.def(py::init())
.def(py::init<slsDetectorDefs::operationMode>())
.def_readwrite("enable", &hdr::enable)
.def_readwrite("opMode", &hdr::opMode)
.def(pybind11::self == pybind11::self)
.def("__repr__", [](const hdr &a) { return sls::ToString(a); });
}
+2
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@@ -18,6 +18,7 @@ void init_network(py::module &);
void init_pattern(py::module &);
void init_scan(py::module &);
void init_source(py::module &);
void init_hdr(py::module &);
void init_duration(py::module &);
void init_pedestal(py::module &);
void init_bit(py::module &);
@@ -40,6 +41,7 @@ PYBIND11_MODULE(_slsdet, m) {
init_pattern(m);
init_scan(m);
init_source(m);
init_hdr(m);
init_duration(m);
init_pedestal(m);
init_bit(m);
+86 -2
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@@ -11,9 +11,11 @@ from utils_for_test import (
LogLevel,
)
from slsdet import Detector
from slsdet._slsdet import slsDetectorDefs
from slsdet.utils import all_equal, element_if_equal
detectorType = slsDetectorDefs.detectorType
operationMode = slsDetectorDefs.operationMode
@pytest.mark.detectorintegration
@@ -1001,6 +1003,88 @@ def test_udp_datastream(session_simulator, request):
with pytest.raises(Exception) as exc_info:
d.udp_datastream
Log(LogLevel.INFOGREEN, f"✅ {request.node.name} passed")
def test_hdrParameters():
""" Test hdrParameters struct."""
from slsdet import hdrParameters
# default is disabled
p = hdrParameters()
assert p.enable == 0
assert p.opMode == operationMode.SYNCHROTRON
assert repr(p) == "[disabled]"
# constructing with operation mode enables it
p = hdrParameters(operationMode.SYNCHROTRON)
assert p.enable == 1
assert p.opMode == operationMode.SYNCHROTRON
assert repr(p) == "[enabled synchrotron]"
p = hdrParameters(operationMode.FEL)
assert p.enable == 1
assert p.opMode == operationMode.FEL
assert repr(p) == "[enabled fel]"
# read write
p.enable = 0
assert p.enable == 0
assert p != hdrParameters(operationMode.FEL)
p.enable = 1
p.opMode = operationMode.SYNCHROTRON
assert p == hdrParameters(operationMode.SYNCHROTRON)
assert p != hdrParameters()
# invalid arguments
with pytest.raises(TypeError):
hdrParameters(1)
with pytest.raises(TypeError):
hdrParameters(operationMode.FEL, 1)
Log(LogLevel.INFOGREEN, f"✅ Test passed. Struct: hdrParameters")
@pytest.mark.detectorintegration
def test_hdr(session_simulator):
""" Test hdr command."""
det_type, num_interfaces, num_mods, d = session_simulator
assert d is not None
from slsdet import hdrParameters
if d.type == detectorType.JUNGFRAU:
prev_val = d.getHDR()
# invalid arguments (only hdrParameters accepted)
with pytest.raises(TypeError):
d.hdr = 0
with pytest.raises(TypeError):
d.hdr = operationMode.SYNCHROTRON
# TODO: test fel once chip version can be checked (only for chip v1.2 HDR)
d.hdr = hdrParameters(operationMode.SYNCHROTRON)
assert d.hdr == hdrParameters(operationMode.SYNCHROTRON)
assert repr(d.hdr) == "[enabled synchrotron]"
d.hdr = hdrParameters()
assert d.hdr == hdrParameters()
assert repr(d.hdr) == "[disabled]"
# per module
d.hdr = {0: hdrParameters(operationMode.SYNCHROTRON)}
assert d.getHDR([0])[0] == hdrParameters(operationMode.SYNCHROTRON)
if num_mods > 1:
assert d.getHDR([1])[0] == hdrParameters()
assert d.hdr == [hdrParameters(operationMode.SYNCHROTRON), hdrParameters()]
for i in range(len(d)):
d.setHDR(prev_val[i], [i])
else:
with pytest.raises(Exception):
d.hdr
with pytest.raises(Exception):
d.hdr = hdrParameters()
Log(LogLevel.INFOGREEN, f"✅ Test passed. Command: hdr")
@@ -463,6 +463,20 @@
Time before end of exposure when comparator is disabled */
#define COMP_DSBLE_TIME_REG (0x6C << MEM_MAP_SHIFT)
/* High Dynamic Range, timeout and activation time tT = T x 25 ns */
#define HDR_REG (0x6D << MEM_MAP_SHIFT)
#define HDR_TIMOUT_OFST (0)
#define HDR_MAX_TIMEOUT_VAL (0xFFFF)
#define HDR_TIMOUT_MSK (HDR_MAX_TIMEOUT_VAL << HDR_TIMOUT_OFST)
#define HDR_ACTIVATION_TIME_OFST (16)
#define HDR_MAX_ACTIVATION_TIME_VAL (0xFF)
#define HDR_ACTIVATION_TIME_MSK (HDR_MAX_ACTIVATION_TIME_VAL << HDR_ACTIVATION_TIME_OFST)
#define HDR_MODE_FEL_OFST (24)
#define HDR_MODE_FEL_MSK (0x00000001 << HDR_MODE_FEL_OFST)
#define HDR_ENABLE_OFST (31)
#define HDR_ENABLE_MSK (0x00000001 << HDR_ENABLE_OFST)
/* Trigger Delay 32 bit register */
#define SET_TRIGGER_DELAY_LSB_REG (0x70 << MEM_MAP_SHIFT)
@@ -71,7 +71,6 @@ bool has_filter_resistor = false;
bool has_filter_cells = false;
bool has_current_src_normal = false;
bool has_current_src_64bit_selection = false;
bool has_current_src_reverse_bits_selection = false;
bool has_storage_start_in_chip_config = false;
bool has_step_reduction = false;
@@ -444,7 +443,6 @@ void setChipIndexAllowedFeatures() {
has_filter_cells = false;
has_current_src_normal = false;
has_current_src_64bit_selection = false;
has_current_src_reverse_bits_selection = false;
has_storage_start_in_chip_config = false;
has_step_reduction = false;
defaultDacValue_G0 = defaultDacList_G0;
@@ -457,7 +455,6 @@ void setChipIndexAllowedFeatures() {
has_filter_cells = true;
has_current_src_normal = true;
has_current_src_64bit_selection = true;
has_current_src_reverse_bits_selection = true;
has_storage_start_in_chip_config = true;
has_step_reduction = false;
defaultDacValue_G0 = defaultDacList_G0;
@@ -472,7 +469,6 @@ void setChipIndexAllowedFeatures() {
has_filter_cells = false;
has_current_src_normal = true;
has_current_src_64bit_selection = true;
has_current_src_reverse_bits_selection = false;
has_storage_start_in_chip_config = true;
has_step_reduction = true;
defaultDacValue_G0 = defaultDacList_v1_2;
@@ -1260,6 +1256,8 @@ int setExpTime(int64_t val) {
}
set64BitReg(val, SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG);
updateHDRTimeout();
// validate for tolerance
val += ACQ_TIME_MIN_CLOCK;
int64_t retval = getExpTime();
@@ -2253,10 +2251,6 @@ bool hasCurrentSource64BitSelectionFeature() {
return has_current_src_64bit_selection;
}
bool hasCurrentSourceReverseBitsSelectionFeature() {
return has_current_src_reverse_bits_selection;
}
bool hasStorageCellStartInChipConfig() {
return has_storage_start_in_chip_config;
}
@@ -2806,23 +2800,9 @@ void enableCurrentSource(int fix, uint64_t select, int normal) {
// select (64 bits)
else {
uint64_t retval = 0;
// reverse bits select first
if (hasCurrentSourceReverseBitsSelectionFeature()) {
uint64_t tmp = select;
for (int i = 0; i != 64; ++i) {
// get each bit from LSB side
uint64_t bit = (tmp >> i) & 0x1;
// push the bit into MSB side
retval |= (bit << (63 - i));
}
} else {
retval = select;
}
LOG(logINFO, ("\tSetting selection to 0x%lx (inverted from 0x%lx)\n",
(long unsigned int)retval, (long unsigned int)select));
set64BitReg(retval, CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
(long unsigned int)select, (long unsigned int)select));
set64BitReg(select, CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
}
if (hasCurrentSourceNormalFeature()) {
@@ -2879,23 +2859,7 @@ uint64_t getSelectCurrentSource() {
return ((bus_r(DAQ_REG) & DAQ_CRRNT_SRC_CLMN_SLCT_MSK) >>
DAQ_CRRNT_SRC_CLMN_SLCT_OFST);
} else {
// invert the select
uint64_t regval =
get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
uint64_t retval = regval;
if (hasCurrentSourceReverseBitsSelectionFeature()) {
uint64_t tmp = regval;
uint64_t inverted = 0;
for (int i = 0; i != 64; ++i) {
// get each bit from LSB side
uint64_t bit = (tmp >> i) & 0x1;
// push the bit into MSB side
inverted |= (bit << (63 - i));
}
retval = inverted;
}
return retval;
return get64BitReg(CRRNT_SRC_COL_LSB_REG, CRRNT_SRC_COL_MSB_REG);
}
}
@@ -3038,6 +3002,84 @@ void setElectronCollectionMode(int enable) {
configureChip();
}
void updateHDRTimeout() {
uint32_t addr = HDR_REG;
uint32_t regval = bus_r(addr);
uint64_t expTimeInClks =
get64BitReg(SET_EXPTIME_LSB_REG, SET_EXPTIME_MSB_REG) +
ACQ_TIME_MIN_CLOCK;
bool isFel = (regval & HDR_MODE_FEL_MSK);
double percentage =
(isFel ? HDR_FEL_TIMEOUT_PERCENT : HDR_SYNC_TIMEOUT_PERCENT) / 100.0;
int timeout = expTimeInClks * percentage;
// cap to max
if (timeout > HDR_MAX_TIMEOUT_VAL) {
LOG(logWARNING, ("HDR Timeout (%u clocks) exceeds maximum "
"value. Capping to %d clocks\n",
timeout, HDR_MAX_TIMEOUT_VAL));
timeout = HDR_MAX_TIMEOUT_VAL;
}
uint16_t timeoutInClks = (uint16_t)(timeout);
LOG(logINFO, ("Updating HDR Timeout to %d clocks (%d%% of exptime)\n",
timeoutInClks, (int)(percentage * 100.00)));
regval &= ~HDR_TIMOUT_MSK;
regval |= ((timeoutInClks << HDR_TIMOUT_OFST) & HDR_TIMOUT_MSK);
bus_w(addr, regval);
}
int setHDR(bool enable, enum operationMode mode) {
LOG(logINFO, ("%s HDR\n", (enable ? "Enabling" : "Disabling")));
// disable hdr first
uint32_t addr = HDR_REG;
uint32_t regval = bus_r(addr);
bus_w(addr, regval & ~HDR_ENABLE_MSK);
if (!enable) {
return OK;
}
// mode
uint16_t actTime = 0;
switch (mode) {
case SYNCHROTRON:
LOG(logINFO, ("\tmode: synchrotron\n"));
actTime = HDR_SYNC_ACT_TIME_CLK_VAL;
regval &= ~HDR_MODE_FEL_MSK;
break;
case FEL:
LOG(logINFO, ("\tmode: FEL\n"));
actTime = HDR_FEL_ACT_TIME_CLK_VAL;
regval |= HDR_MODE_FEL_MSK;
break;
default:
LOG(logERROR, ("Unknown HDR mode %d\n", mode));
return FAIL;
}
// timeout
regval &= ~HDR_ACTIVATION_TIME_MSK;
regval |= ((actTime << HDR_ACTIVATION_TIME_OFST) & HDR_ACTIVATION_TIME_MSK);
bus_w(addr, regval);
updateHDRTimeout();
// enable HDR
regval = bus_r(addr) | HDR_ENABLE_MSK;
bus_w(addr, regval);
LOG(logDEBUG, ("\tHDR Register: 0x%08x\n", bus_r(addr)));
return OK;
}
void getHDR(bool *enable, enum operationMode *mode) {
uint32_t addr = HDR_REG;
uint32_t regval = bus_r(addr);
*enable = (regval & HDR_ENABLE_MSK) ? true : false;
*mode = (regval & HDR_MODE_FEL_MSK) ? FEL : SYNCHROTRON;
}
int getTenGigaFlowControl() {
return ((bus_r(CONFIG_REG) & CONFIG_ETHRNT_FLW_CNTRL_MSK) >>
CONFIG_ETHRNT_FLW_CNTRL_OFST);
@@ -188,7 +188,6 @@ bool hasFilterResistorFeature();
bool hasFilterCellsFeature();
bool hasCurrentSourceNormalFeature();
bool hasCurrentSource64BitSelectionFeature();
bool hasCurrentSourceReverseBitsSelectionFeature();
bool hasStorageCellStartInChipConfig();
bool hasStepReductionFeature();
bool isChipConfigured();
@@ -229,7 +228,9 @@ int setTimingInfoDecoder(enum timingInfoDecoder val);
int getTimingInfoDecoder(enum timingInfoDecoder *retval);
int getElectronCollectionMode();
void setElectronCollectionMode(int enable);
void updateHDRTimeout();
int setHDR(bool enable, enum operationMode mode);
void getHDR(bool *enable, enum operationMode *mode);
int getTenGigaFlowControl();
int setTenGigaFlowControl(int value);
int getTransmissionDelayFrame();
@@ -158,6 +158,11 @@
#define ADC_OFST_HALF_SPEED_BOARD2_VAL (0x10)
#define ADC_OFST_QUARTER_SPEED_BOARD2_VAL (0x08)
#define HDR_SYNC_TIMEOUT_PERCENT (8)
#define HDR_SYNC_ACT_TIME_CLK_VAL (1) // 25ns
#define HDR_FEL_TIMEOUT_PERCENT (0) // undefined
#define HDR_FEL_ACT_TIME_CLK_VAL (0) // undefined
/* Struct Definitions */
typedef struct udp_header_struct {
uint32_t udp_destmac_msb;
@@ -349,3 +349,5 @@ int set_power_dac(int);
int get_power_adc(int);
int get_voltage_limit(int);
int set_voltage_limit(int);
int set_hdr(int);
int get_hdr(int);
@@ -550,6 +550,8 @@ void function_table() {
flist[F_GET_VOLTAGE_LIMIT] = &get_voltage_limit;
flist[F_SET_VOLTAGE_LIMIT] = &set_voltage_limit;
flist[F_SET_HDR] = &set_hdr;
flist[F_GET_HDR] = &get_hdr;
// check
if (NUM_DET_FUNCTIONS >= RECEIVER_ENUM_START) {
LOG(logERROR, ("The last detector function enum has reached its "
@@ -11450,3 +11452,67 @@ int set_voltage_limit(int file_des) {
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int set_hdr(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int args[2] = {-1, -1};
if (receiveData(file_des, args, sizeof(args), INT32) < 0)
return printSocketReadError();
#ifndef JUNGFRAUD
functionNotImplemented();
#else
if (Server_VerifyLock() == OK) {
int enable = args[0];
enum operationMode mode = args[1];
LOG(logDEBUG1, ("Setting HDR: %u %u\n", enable, mode));
if (enable != 0 && enable != 1) {
ret = FAIL;
sprintf(mess,
"Could not set HDR. Invalid enable argument %d. Options: "
"[0, 1]\n",
enable);
LOG(logERROR, (mess));
} else if (mode != SYNCHROTRON && mode != FEL) {
ret = FAIL;
sprintf(mess,
"Could not set HDR. Invalid mode argument %d. Options: "
"[SYNCHROTRON, FEL]\n",
mode);
LOG(logERROR, (mess));
} else if (mode == FEL && getChipIndex() != v1_2_HDR) {
ret = FAIL;
sprintf(mess, "Could not set HDR. FEL mode is only supported for "
"chip index v1.2 HDR\n");
LOG(logERROR, (mess));
} else if (check_detector_idle("set HDR") == OK) {
ret = setHDR(enable, mode);
if (ret == FAIL) {
sprintf(mess, "Could not %s HDR to mode: %d\n",
enable ? "enable" : "disable", args[1]);
LOG(logERROR, (mess));
}
}
}
#endif
return Server_SendResult(file_des, INT32, NULL, 0);
}
int get_hdr(int file_des) {
ret = OK;
memset(mess, 0, sizeof(mess));
int retvals[2] = {-1, -1};
LOG(logDEBUG1, ("Getting HDR\n"));
#ifndef JUNGFRAUD
functionNotImplemented();
#else
bool enable = false;
enum operationMode mode = SYNCHROTRON;
getHDR(&enable, &mode);
retvals[0] = enable;
retvals[1] = mode;
#endif
return Server_SendResult(file_des, INT32, retvals, sizeof(retvals));
}
@@ -80,7 +80,7 @@ _sd() {
local IS_PATH=0
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port power powerchip powerdac powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_streamdummyheader rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_datastream udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion hdr highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port power powerchip powerdac powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_streamdummyheader rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_datastream udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
__acquire() {
FCN_RETURN=""
return 0
@@ -1219,6 +1219,15 @@ __hardwareversion() {
FCN_RETURN=""
return 0
}
__hdr() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 0 ]]; then
if [[ "${cword}" == "2" ]]; then
FCN_RETURN="fel synchrotron"
fi
fi
return 0
}
__highvoltage() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 0 ]]; then
File diff suppressed because it is too large. Load diff
File diff suppressed because it is too large. Load diff
@@ -4,7 +4,7 @@
_sd() {
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port power powerchip powerdac powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_streamdummyheader rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_datastream udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clientversion clkdiv clkfreq clkphase collectionmode column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues dbitclk dbitphase dbitpipeline defaultdac defaultpattern define_bit define_reg definelist_bit definelist_reg delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion hdr highvoltage hostname im_a im_b im_c im_d im_io imagetest include initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit pattern patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port power powerchip powerdac powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_dbitreorder rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_streamdummyheader rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname sleep slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timing_info_decoder timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_datastream udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
__acquire() {
FCN_RETURN=""
return 0
@@ -1143,6 +1143,15 @@ __hardwareversion() {
FCN_RETURN=""
return 0
}
__hdr() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 0 ]]; then
if [[ "${cword}" == "2" ]]; then
FCN_RETURN="fel synchrotron"
fi
fi
return 0
}
__highvoltage() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 0 ]]; then
+13 -1
View File
@@ -2865,7 +2865,18 @@ powervalues:
GET:
args:
- argc: 0
hdr:
is_description: true
actions:
GET:
argc: 0
PUT:
args:
- argc: 1
arg_types: [ defs::operationMode ]
- argc: 1
arg_types: [ int ]
################# special commands ##########################
@@ -3460,6 +3471,7 @@ scan:
input: [ "defs::scanParameters(StringTo<defs::dacIndex>(args[0]), StringTo<int>(args[1]), StringTo<int>(args[2]), StringTo<int>(args[3]), t)" ]
input_types: [ auto ]
Trigger:
template: true
actions:
@@ -4779,6 +4779,52 @@ hardwareversion:
\ on detector."
infer_action: true
template: true
hdr:
actions:
GET:
args:
- arg_types: []
argc: 0
cast_input: []
check_det_id: false
convert_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: true
PUT:
args:
- arg_types:
- defs::operationMode
argc: 1
cast_input: []
check_det_id: false
convert_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: false
- arg_types:
- int
argc: 1
cast_input: []
check_det_id: false
convert_det_id: true
function: ''
input: []
input_types: []
output: []
require_det_id: false
store_result_in_t: false
command_name: hdr
function_alias: hdr
help: ''
infer_action: true
is_description: true
highvoltage:
actions:
GET:
@@ -1425,6 +1425,13 @@ class Detector {
/** [Jungfrau] */
void setCollectionMode(defs::collectionMode value, Positions pos = {});
/** [Jungfrau] */
Result<defs::hdrParameters> getHDR(Positions pos = {}) const;
/** [Jungfrau] Enabling with FEL mode can only be used with chip version
* '1.2 HDR'*/
void setHDR(const defs::hdrParameters par, Positions pos = {});
///@}
/** @name Gotthard2 Specific */
+2
View File
@@ -160,6 +160,7 @@ class Caller {
std::string gates(int action);
std::string getbit(int action);
std::string hardwareversion(int action);
std::string hdr(int action);
std::string highvoltage(int action);
std::string hostname(int action);
std::string im_a(int action);
@@ -529,6 +530,7 @@ class Caller {
{"gates", &Caller::gates},
{"getbit", &Caller::getbit},
{"hardwareversion", &Caller::hardwareversion},
{"hdr", &Caller::hdr},
{"highvoltage", &Caller::highvoltage},
{"hostname", &Caller::hostname},
{"im_a", &Caller::im_a},
+41
View File
@@ -1436,6 +1436,7 @@ std::string Caller::gaincaps(int action) {
}
return os.str();
}
std::string Caller::sleep(int action) {
std::ostringstream os;
if (action == defs::HELP_ACTION) {
@@ -2142,4 +2143,44 @@ defs::FrequencyUnit Caller::parseFrequencyUnit(const std::string &unit) {
throw std::runtime_error("Unknown frequency unit: " + unit);
}
std::string Caller::hdr(int action) {
std::ostringstream os;
if (action == defs::HELP_ACTION) {
os << "synchrotron|fel|0]\n\t[Jungfrau] Enables the high dynamic range "
"in detector in synchrotron or fel mode. 0 disables HDR and is "
"the default. FEL can only be used with chip version '1.2 HDR'."
<< '\n';
} else if (action == defs::GET_ACTION) {
if (args.size() != 0) {
WrongNumberOfParameters(0);
}
auto t = det->getHDR(std::vector<int>{det_id});
os << OutString(t) << '\n';
} else if (action == defs::PUT_ACTION) {
if (args.size() != 1) {
WrongNumberOfParameters(1);
}
if (sls::is_int(args[0])) {
auto val = StringTo<int>(args[0]);
if (val == 0) {
auto disable = defs::hdrParameters();
det->setHDR(disable, std::vector<int>{det_id});
os << ToString(disable) << '\n';
} else {
throw RuntimeError("Did you mean to disable HDR? Then Please "
"use '0' to do so. Unknown argument: " +
args[0]);
}
} else {
auto mode = StringTo<defs::operationMode>(args[0]);
auto val = defs::hdrParameters(mode);
det->setHDR(val, std::vector<int>{det_id});
os << ToString(val) << '\n';
}
} else {
throw RuntimeError("Unknown action");
}
return os.str();
}
} // namespace sls
+8
View File
@@ -1919,6 +1919,14 @@ void Detector::setCollectionMode(defs::collectionMode value, Positions pos) {
pimpl->Parallel(&Module::setCollectionMode, pos, value);
}
Result<defs::hdrParameters> Detector::getHDR(Positions pos) const {
return pimpl->Parallel(&Module::getHDR, pos);
}
void Detector::setHDR(const defs::hdrParameters par, Positions pos) {
pimpl->Parallel(&Module::setHDR, pos, par);
}
// Gotthard2 Specific
Result<int64_t> Detector::getNumberOfBursts(Positions pos) const {
+8
View File
@@ -1976,6 +1976,14 @@ void Module::setCollectionMode(const defs::collectionMode value) {
sendToDetector(F_SET_COLLECTION_MODE, static_cast<int>(value), nullptr);
}
defs::hdrParameters Module::getHDR() const {
return sendToDetector<defs::hdrParameters>(F_GET_HDR);
}
void Module::setHDR(const defs::hdrParameters par) {
sendToDetector(F_SET_HDR, par, nullptr);
}
// Gotthard2 Specific
int64_t Module::getNumberOfBursts() const {
+2
View File
@@ -428,6 +428,8 @@ class Module : public virtual slsDetectorDefs {
void setTimingInfoDecoder(const defs::timingInfoDecoder enable);
defs::collectionMode getCollectionMode() const;
void setCollectionMode(const defs::collectionMode enable);
defs::hdrParameters getHDR() const;
void setHDR(const defs::hdrParameters par);
/**************************************************
* *
+16
View File
@@ -1584,6 +1584,22 @@ int InferAction::hardwareversion() {
}
}
int InferAction::hdr() {
if (args.size() == 0) {
return slsDetectorDefs::GET_ACTION;
}
if (args.size() == 1) {
return slsDetectorDefs::PUT_ACTION;
}
else {
throw RuntimeError("Could not infer action: Wrong number of arguments");
}
}
int InferAction::highvoltage() {
if (args.size() == 0) {
+2
View File
@@ -111,6 +111,7 @@ class InferAction {
int gates();
int getbit();
int hardwareversion();
int hdr();
int highvoltage();
int hostname();
int im_a();
@@ -445,6 +446,7 @@ class InferAction {
{"gates", &InferAction::gates},
{"getbit", &InferAction::getbit},
{"hardwareversion", &InferAction::hardwareversion},
{"hdr", &InferAction::hdr},
{"highvoltage", &InferAction::highvoltage},
{"hostname", &InferAction::hostname},
{"im_a", &InferAction::im_a},
@@ -790,4 +790,45 @@ TEST_CASE("sync", "[.detectorintegration]") {
}
}
TEST_CASE("hdr", "[.detectorintegration]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::JUNGFRAU) {
// disable and args
REQUIRE_THROWS(caller.call("hdr", {"0", "synchrotron"}, -1, PUT));
// invalid enable
REQUIRE_THROWS(caller.call("hdr", {"2"}, -1, PUT));
// no operation mode
REQUIRE_THROWS(caller.call("hdr", {"1"}, -1, PUT));
// invalid operation mode
REQUIRE_THROWS(caller.call("hdr", {"invalid"}, -1, PUT));
// TODO: implement get chip type to get hdr, throw if !hdr and trying
// fel for oper mode and not throw if hdr
{
std::ostringstream oss;
REQUIRE_NOTHROW(caller.call("hdr", {"synchrotron"}, -1, PUT, oss));
REQUIRE(oss.str() == "hdr [enabled synchrotron]\n");
}
{
std::ostringstream oss;
REQUIRE_NOTHROW(caller.call("hdr", {}, -1, GET, oss));
REQUIRE(oss.str() == "hdr [enabled synchrotron]\n");
}
{
std::ostringstream oss;
REQUIRE_NOTHROW(caller.call("hdr", {"0"}, -1, PUT, oss));
REQUIRE(oss.str() == "hdr [disabled]\n");
}
{
std::ostringstream oss;
REQUIRE_NOTHROW(caller.call("hdr", {}, -1, GET, oss));
REQUIRE(oss.str() == "hdr [disabled]\n");
}
} else {
REQUIRE_THROWS(caller.call("hdr", {}, -1, GET));
REQUIRE_THROWS(caller.call("hdr", {"0"}, -1, PUT));
}
}
} // namespace sls
+5
View File
@@ -48,6 +48,7 @@ std::string ToString(const defs::gainMode s);
std::string ToString(const defs::polarity s);
std::string ToString(const defs::timingInfoDecoder s);
std::string ToString(const defs::collectionMode s);
std::string ToString(const defs::operationMode s);
std::string ToString(bool value);
std::string ToString(bool value, defs::boolFormat format);
@@ -62,6 +63,9 @@ std::ostream &operator<<(std::ostream &os,
std::string ToString(const slsDetectorDefs::scanParameters &r);
std::ostream &operator<<(std::ostream &os,
const slsDetectorDefs::scanParameters &r);
std::string ToString(const slsDetectorDefs::hdrParameters &r);
std::ostream &operator<<(std::ostream &os,
const slsDetectorDefs::hdrParameters &r);
std::string ToString(const slsDetectorDefs::currentSrcParameters &r);
std::ostream &operator<<(std::ostream &os,
const slsDetectorDefs::currentSrcParameters &r);
@@ -381,6 +385,7 @@ template <> defs::timingInfoDecoder StringTo(const std::string &s);
template <> defs::collectionMode StringTo(const std::string &s);
template <> RegisterAddress StringTo(const std::string &s);
template <> RegisterValue StringTo(const std::string &s);
template <> defs::operationMode StringTo(const std::string &s);
template <> uint8_t StringTo(const std::string &s);
template <> uint16_t StringTo(const std::string &s);
@@ -547,6 +547,7 @@ enum streamingInterface {
enum polarity { POSITIVE, NEGATIVE };
enum timingInfoDecoder { SWISSFEL, SHINE };
enum collectionMode { HOLE, ELECTRON };
enum operationMode { SYNCHROTRON, FEL };
#ifdef __cplusplus
@@ -580,6 +581,23 @@ enum streamingInterface {
}
} __attribute__((packed));
/** hdr structure */
struct hdrParameters {
int enable;
operationMode opMode;
/** disable hdr mode */
hdrParameters() : enable(0), opMode(SYNCHROTRON) {}
/** enable hdr mode */
hdrParameters(operationMode mode) : enable(1), opMode(mode) {}
constexpr bool operator==(const hdrParameters &other) const {
return ((enable == other.enable) && (opMode == other.opMode));
}
} __attribute__((packed));
static_assert(sizeof(hdrParameters) == 2 * sizeof(int),
"hdrParameters TCP layout must remain two INT32 values");
struct currentSrcParameters {
int enable;
int fix;
@@ -308,6 +308,8 @@ enum detFuncs {
F_GET_POWER_ADC,
F_GET_VOLTAGE_LIMIT,
F_SET_VOLTAGE_LIMIT,
F_SET_HDR,
F_GET_HDR,
NUM_DET_FUNCTIONS,
RECEIVER_ENUM_START = 512, /**< detector function should not exceed this
@@ -730,11 +732,12 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
case F_GET_POWER_ADC: return "F_GET_POWER_ADC";
case F_GET_VOLTAGE_LIMIT: return "F_GET_VOLTAGE_LIMIT";
case F_SET_VOLTAGE_LIMIT: return "F_SET_VOLTAGE_LIMIT";
case F_SET_HDR: return "F_SET_HDR";
case F_GET_HDR: return "F_GET_HDR";
case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS";
case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START";
case F_EXEC_RECEIVER_COMMAND: return "F_EXEC_RECEIVER_COMMAND";
case F_LOCK_RECEIVER: return "F_LOCK_RECEIVER";
case F_GET_LAST_RECEIVER_CLIENT_IP: return "F_GET_LAST_RECEIVER_CLIENT_IP";
+1 -1
View File
@@ -8,6 +8,6 @@
#define APIMOENCH "0.0.0 0x261103"
#define APIEIGER "0.0.0 0x261027"
#define APIXILINXCTB "0.0.0 0x261103"
#define APIJUNGFRAU "0.0.0 0x261103"
#define APIJUNGFRAU "0.0.0 0x261104"
#define APIMYTHEN3 "0.0.0 0x261103"
#define APIMATTERHORN "0.0.0 0x260529"
+37
View File
@@ -134,6 +134,24 @@ std::ostream &operator<<(std::ostream &os,
return os << ToString(r);
}
std::string ToString(const slsDetectorDefs::hdrParameters &r) {
std::ostringstream oss;
oss << '[';
if (r.enable) {
oss << "enabled"
<< " " << ToString(r.opMode);
} else {
oss << "disabled";
}
oss << ']';
return oss.str();
}
std::ostream &operator<<(std::ostream &os,
const slsDetectorDefs::hdrParameters &r) {
return os << ToString(r);
}
std::string ToString(const slsDetectorDefs::currentSrcParameters &r) {
std::ostringstream oss;
if (r.fix < -1 || r.fix > 1 || r.normal < -1 || r.normal > 1) {
@@ -739,6 +757,17 @@ std::string ToString(const defs::collectionMode s) {
}
}
std::string ToString(const defs::operationMode s) {
switch (s) {
case defs::SYNCHROTRON:
return std::string("synchrotron");
case defs::FEL:
return std::string("fel");
default:
return std::string("Unknown");
}
}
const std::string &ToString(const std::string &s) { return s; }
std::string ToString(defs::Hz f, defs::FrequencyUnit unit) {
@@ -1220,6 +1249,14 @@ template <> defs::collectionMode StringTo(const std::string &s) {
throw RuntimeError("Unknown collection mode " + s);
}
template <> defs::operationMode StringTo(const std::string &s) {
if (s == "synchrotron")
return defs::SYNCHROTRON;
if (s == "fel")
return defs::FEL;
throw RuntimeError("Unknown operation mode " + s);
}
template <> uint8_t StringTo(const std::string &s) {
int base = s.find("0x") != std::string::npos ? 16 : 10;
int value = std::stoi(s, nullptr, base);
+10
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@@ -434,5 +434,15 @@ TEST_CASE("Mismatched brackets in string to vector throws") {
REQUIRE_THROWS(StringTo<std::vector<int>>("1]2"));
REQUIRE_THROWS(StringTo<std::vector<int>>("[1], [2]"));
}
TEST_CASE("operationMode to string") {
REQUIRE(ToString(defs::operationMode::SYNCHROTRON) == "synchrotron");
REQUIRE(ToString(defs::operationMode::FEL) == "fel");
}
TEST_CASE("string to operationMode") {
REQUIRE(StringTo<defs::operationMode>("synchrotron") ==
defs::operationMode::SYNCHROTRON);
REQUIRE(StringTo<defs::operationMode>("fel") == defs::operationMode::FEL);
}
} // namespace sls