mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-06-23 18:17:59 +02:00
almost done with ctb update, need to do slow adcs, split to moench and ctb
This commit is contained in:
94
slsDetectorServers/slsDetectorServer/AD7689.h
Executable file
94
slsDetectorServers/slsDetectorServer/AD7689.h
Executable file
@ -0,0 +1,94 @@
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#pragma once
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//#include "commonServerFunctions.h" // blackfin.h, ansi.h
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/* AD7689 ADC DEFINES */
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/** Read back CFG Register */
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#define AD7689_CFG_RB_OFST (0)
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#define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST)
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/** Channel sequencer */
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#define AD7689_CFG_SEQ_OFST (1)
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#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST)
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#define AD7689_CFG_SEQ_DSBLE_VAL ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
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#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
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#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL ((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
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#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL ((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK)
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/** Reference/ buffer selection */
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#define AD7689_CFG_REF_OFST (3)
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#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST)
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/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. */
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#define AD7689_CFG_REF_INT_2500MV_VAL ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST)
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/** Internal reference. REF = 4.096V buffered output. Temperature sensor enabled. */
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#define AD7689_CFG_REF_INT_4096MV_VAL ((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
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/** External reference. Temperature sensor enabled. Internal buffer disabled. */
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#define AD7689_CFG_REF_EXT_TMP_VAL ((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
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/** External reference. Temperature sensor enabled. Internal buffer enabled. */
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#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
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/** External reference. Temperature sensor disabled. Internal buffer disabled. */
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#define AD7689_CFG_REF_EXT_VAL ((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
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/** External reference. Temperature sensor disabled. Internal buffer enabled. */
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#define AD7689_CFG_REF_EXT_INTBUF_VAL ((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK)
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/** bandwidth of low pass filter */
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#define AD7689_CFG_BW_OFST (6)
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#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST)
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#define AD7689_CFG_BW_ONE_FOURTH_VAL ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
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#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK)
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/** input channel selection IN0 - IN7 */
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#define AD7689_CFG_IN_OFST (7)
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#define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST)
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/** input channel configuration */
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#define AD7689_CFG_INCC_OFST (10)
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#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST)
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#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
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#define AD7689_CFG_INCC_BPLR_IN_COM_VAL ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
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#define AD7689_CFG_INCC_TMP_VAL ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
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#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL ((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
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#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL ((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
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#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL ((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK)
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/** configuration update */
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#define AD7689_CFG_CFG_OFST (13)
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#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST)
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#define AD7689_CFG_CFG_NO_UPDATE_VAL ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
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#define AD7689_CFG_CFG_OVRWRTE_VAL ((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK)
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int getAD7689(int ind) {
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}
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void setAD7689(int addr, int val) {
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u_int32_t codata;
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codata = val + (addr << 8);
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FILE_LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr));
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serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS,
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ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST);
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}
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void prepareAD7689(){
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FILE_LOG(logINFOBLUE, ("Preparing AD7689 (Slow ADCs):\n"));
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uint16_t codata = (
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// read back
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AD7689_CFG_RB_MSK |
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// scan sequence IN0-IN7 then temperature sensor
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AD7689_CFG_SEQ_SCN_WTH_TMP_VAL |
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// Internal reference. REF = 2.5V buffered output. Temperature sensor enabled.
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AD7689_CFG_REF_INT_2500MV_VAL |
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// full bandwidth of low pass filter
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AD7689_CFG_BW_FULL_VAL |
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// scan upto channel 7
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AD7689_CFG_IN_MSK |
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// input channel configuration (unipolar. inx to gnd)
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AD7689_CFG_INCC_UNPLR_IN_GND_VAL |
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// overwrite configuration
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AD7689_CFG_CFG_OVRWRTE_VAL);
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}
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@ -125,6 +125,13 @@
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#define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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#define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK)
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int getMaxValidVref() {
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return 0x4;
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}
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void setVrefVoltage(int val) {
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setAdc9257(AD9257_VREF_REG, val);
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}
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void setAdc9257(int addr, int val) {
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136
slsDetectorServers/slsDetectorServer/I2C.h
Executable file
136
slsDetectorServers/slsDetectorServer/I2C.h
Executable file
@ -0,0 +1,136 @@
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#pragma once
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#include "blackfin.h" /** I2C_CLOCK_MHZ should be defined */
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#define I2C_DATA_RATE_KBPS (200)
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#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS)
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#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2)
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#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2)
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#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
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#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h)
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/** Control Register */
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#define I2C_CTRL_ENBLE_CORE_OFST (0)
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#define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST)
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#define I2C_CTRL_BUS_SPEED_OFST (1)
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#define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST)
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#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps)
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#define I2C_CTRL_BUS_SPEED_FAST_400_VAL ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps)
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/** if actual level of transfer command fifo <= thd level, TX_READY interrupt asserted */
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#define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2)
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#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST)
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#define I2C_CTRL_TFR_CMD_EMPTY_VAL ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
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#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
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#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL ((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
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#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL ((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK)
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/** if actual level of receive data fifo <= thd level, RX_READY interrupt asserted */
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#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4)
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#define I2C_CTRL_RX_DATA_FIFO_THD_MSK (0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST)
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#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL ((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
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#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
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#define I2C_CTRL_RX_DATA_ONE_HALF_VAL ((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
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#define I2C_CTRL_RX_DATA_FULL_VAL ((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK)
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/** Transfer Command Fifo register */
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#define I2C_TFR_CMD_RW_OFST (0)
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#define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST)
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#define I2C_TFR_CMD_RW_WRITE_VAL ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
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#define I2C_TFR_CMD_RW_READ_VAL ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK)
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#define I2C_TFR_CMD_ADDR_OFST (1)
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#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST)
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/** when writing, rw and addr converts to data to be written mask */
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#define I2C_TFR_CMD_DATA_FR_WR_OFST (0)
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#define I2C_TFR_CMD_DATA_FR_WR_MSK (0x000000FF << I2C_TFR_CMD_DATA_FR_WR_OFST)
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#define I2C_TFR_CMD_STOP_OFST (8)
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#define I2C_TFR_CMD_STOP_MSK (0x00000001 << I2C_TFR_CMD_ADDR_OFST)
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#define I2C_TFR_CMD_RPTD_STRT_OFST (9)
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#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST)
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/**
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* Configure the I2C core,
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* Enable core and
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* Calibrate the calibration register for current readout
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* @param sclLowCountReg register to set low count of the serial clock
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* @param sclHighCountReg register to set high count of the serial clock
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* @param sdaHoldTimeReg register to set hold time of the serial data
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* @oaram controlReg register to set control reg (bus speed and enabling core)
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*/
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void I2C_ConfigureI2CCore(uint32_t sclLowCountReg, uint32_t sclHighCountReg, uint32_t sdaHoldTimeReg, uint32_t controlReg) {
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FILE_LOG(logINFOBLUE, ("Configuring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS));
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FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT));
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bus_w(sclLowPeriodReg, (uint32_t)I2C_SCL_LOW_COUNT);
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FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT));
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bus_w(sclHighPeriodReg, (uint32_t)I2C_SCL_LOW_COUNT);
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FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT));
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bus_w(sdaHoldTimeReg, (uint32_t)I2C_SDA_DATA_HOLD_COUNT);
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FILE_LOG(logINFOBLUE, ("\tEnabling core\n"));
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bus_w(controlReg, I2C_CNTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?)
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}
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/**
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* Read register
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* @param transferCommandReg transfer command fifo register
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* @param rxDataFifoLevelReg receive data fifo level register
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* @param deviceId device Id
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* @param addr register address
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* @returns value read from register
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*/
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uint32_t I2C_Read(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t devId, uint32_t addr) {
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// device Id mask
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uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
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// write I2C ID
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bus_w(transferCommandReg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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// write register addr
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bus_w(transferCommandReg, addr);
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// repeated start with read
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bus_w(transferCommandReg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL));
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// continue reading
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bus_w(transferCommandReg, 0x0);
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// stop reading
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bus_w(transferCommandReg, I2C_TFR_CMD_STOP_MSK);
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// read value
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return bus_r(rxDataFifoLevelReg);
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}
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/**
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* Write register (16 bit value)
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* @param transferCommandReg transfer command fifo register
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* @param deviceId device Id
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* @param addr register address
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* @param data data to be written (16 bit)
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*/
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void I2C_Write(uint32_t transferCommandReg, uint32_t devId, uint32_t addr, uint16_t data) {
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// device Id mask
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uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK);
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// write I2C ID
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bus_w(transferCommandReg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK)));
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// write register addr
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bus_w(transferCommandReg, addr);
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// repeated start with write
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bus_w(transferCommandReg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK & ~(I2C_TFR_CMD_RW_MSK)));
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||||
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uint8_t msb = data & 0xFF00;
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uint8_t lsb = data & 0x00FF;
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||||
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// writing data MSB
|
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bus_w(transferCommandReg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK));
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||||
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||||
// writing data LSB and stop writing bit
|
||||
bus_w(transferCommandReg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK);
|
||||
}
|
||||
|
||||
|
||||
126
slsDetectorServers/slsDetectorServer/INA226.h
Executable file
126
slsDetectorServers/slsDetectorServer/INA226.h
Executable file
@ -0,0 +1,126 @@
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||||
#pragma once
|
||||
|
||||
#include "I2C.h"
|
||||
|
||||
/** INA226 defines */
|
||||
|
||||
/** Register set */
|
||||
#define INA226_CONFIGURATION_REG (0x00) //R/W
|
||||
#define INA226_SHUNT_VOLTAGE_REG (0x01) //R
|
||||
#define INA226_BUS_VOLTAGE_REG (0x02) //R
|
||||
#define INA226_POWER_REG (0x03) //R
|
||||
#define INA226_CURRENT_REG (0x04) //R
|
||||
#define INA226_CALIBRATION_REG (0x05) //R/W
|
||||
#define INA226_MASK_ENABLE_REG (0x06) //R/W
|
||||
#define INA226_ALERT_LIMIT_REG (0x07) //R/W
|
||||
#define INA226_MANUFACTURER_ID_REG (0xFE) //R
|
||||
#define INA226_DIE_ID_REG (0xFF) //R
|
||||
|
||||
/** bus voltage register */
|
||||
#define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV
|
||||
#define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1)
|
||||
#define INA226_BUS_VOLTAGE_VMAX_UV (INA226_BUS_VOLTAGE_VMIN_UV * INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V
|
||||
|
||||
/** current register */
|
||||
#define INA226_CURRENT_IMIN_UA (100) //100uA can be changed
|
||||
#define INA226_CURRENT_MX_STPS (0x7FFF + 1)
|
||||
#define INA226_CURRENT_IMAX_UA (INA226_CURRENT_IMIN_UA * INA226_CURRENT_MX_STPS)
|
||||
|
||||
/** calibration register */
|
||||
#define INA226_CALIBRATION_MSK (0x7FFF)
|
||||
|
||||
/** get calibration register value to be set */
|
||||
#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rohm))
|
||||
|
||||
/** get current unit */
|
||||
#define INA226_getConvertedCurrentUnits(shuntVReg, calibReg) (shuntVReg * calibReg / 2048)
|
||||
|
||||
/**
|
||||
* Configure the I2C core and Enable core
|
||||
* @param sclLowCountReg register to set low count of the serial clock (defined in Registerdefs.h)
|
||||
* @param sclHighCountReg register to set high count of the serial clock (defined in Registerdefs.h)
|
||||
* @param sdaHoldTimeReg register to set hold time of the serial data (defined in Registerdefs.h)
|
||||
* @param controlReg register to set control reg (bus speed and enabling core) (defined in Registerdefs.h)
|
||||
*/
|
||||
void INA226_ConfigureI2CCore(uint32_t sclLowCountReg, uint32_t sclHighCountReg, uint32_t sdaHoldTimeReg, uint32_t controlReg) {
|
||||
I2C_ConfigureI2CCore(sclLowCountReg, sclHighCountReg, sdaHoldTimeReg, controlReg);
|
||||
}
|
||||
|
||||
/**
|
||||
* Calibrate resolution of current register
|
||||
* @param shuntResisterOhm shunt resister value in Ohms
|
||||
* @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h)
|
||||
* @param deviceId device Id (defined in slsDetectorServer_defs.h)
|
||||
*/
|
||||
void INA226_CalibrateCurrentRegister(uint32_t shuntResisterOhm, uint32_t transferCommandReg, uint32_t deviceId) {
|
||||
|
||||
// get calibration value based on shunt resistor
|
||||
uint16_t calVal = INA226_getCalibrationValue(shuntResisterOhm) & INA226_CALIBRATION_MSK;
|
||||
FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal));
|
||||
|
||||
// calibrate current register
|
||||
I2C_Write(transferCommandReg, deviceId, INA226_CALIBRATION_REG, calVal);
|
||||
}
|
||||
|
||||
/**
|
||||
* Read voltage of device
|
||||
* @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h)
|
||||
* @param rxDataFifoLevelReg receive data fifo level register (defined in RegisterDefs.h)
|
||||
* @param deviceId device Id (defined in slsDetectorServer_defs.h)
|
||||
* @returns voltage in mV
|
||||
*/
|
||||
int INA226_ReadVoltage(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId) {
|
||||
FILE_LOG(logDEBUG1, ("\tReading voltage\n"));
|
||||
uint32_t regval = I2C_Read(transferCommandReg, rxDataFifoLevelReg, deviceId, INA226_BUS_VOLTAGE_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tvoltage read: 0x%08x\n", regval));
|
||||
|
||||
// value converted in mv
|
||||
uint32_t vmin = INA226_BUS_VOLTAGE_VMIN_UV;
|
||||
uint32_t vmax = INA226_BUS_VOLTAGE_VMAX_UV;
|
||||
uint32_t nsteps = INA226_BUS_VOLTAGE_MX_STPS;
|
||||
|
||||
// value in uV
|
||||
int retval = (vmin + (vmax - vmin) * regval / (nsteps - 1));
|
||||
FILE_LOG(logDEBUG1, ("\tvoltage read: 0x%d uV\n", retval));
|
||||
|
||||
// value in mV
|
||||
retval /= 1000;
|
||||
FILE_LOG(logDEBUG1, ("\tvoltage read: %d mV\n", retval));
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
/**
|
||||
* Read current
|
||||
* @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h)
|
||||
* @param rxDataFifoLevelReg receive data fifo level register (defined in RegisterDefs.h)
|
||||
* @param deviceId device Id (should be defined in slsDetectorServer_defs.h)
|
||||
* @returns current in mA
|
||||
*/
|
||||
int INA226_ReadCurrent(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId) {
|
||||
FILE_LOG(logDEBUG1, ("\tReading current\n"));
|
||||
|
||||
// read shunt voltage register
|
||||
FILE_LOG(logDEBUG1, ("\tReading shunt voltage reg\n"));
|
||||
uint32_t shuntVoltageRegVal = I2C_Read(transferCommandReg, rxDataFifoLevelReg, deviceId, INA226_SHUNT_VOLTAGE_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", regval));
|
||||
|
||||
// read calibration register
|
||||
FILE_LOG(logDEBUG1, ("\tReading calibration reg\n"));
|
||||
uint32_t calibrationRegVal = I2C_Read(transferCommandReg, rxDataFifoLevelReg, deviceId, INA226_CALIBRATION_REG);
|
||||
FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", regval));
|
||||
|
||||
// value for current
|
||||
uint32_t retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, calibrationRegVal);
|
||||
FILE_LOG(logDEBUG1, ("\tcurrent unit value: %d\n", retval));
|
||||
|
||||
// current in uA
|
||||
retval *= INA226_CURRENT_IMIN_UA;
|
||||
FILE_LOG(logDEBUG1, ("\tcurrent: %d uA\n", retval));
|
||||
|
||||
// current in mA
|
||||
retval /= 1000;
|
||||
FILE_LOG(logDEBUG1, ("\tcurrent: %d mA\n", retval));
|
||||
|
||||
return retval;
|
||||
}
|
||||
@ -1,26 +0,0 @@
|
||||
CC = gcc
|
||||
CLAGS += -Wall -DVIRTUAL -DDACS_INT -DGENERICD # -DSLS_DETECTOR_FUNCTION_LIST
|
||||
LDLIBS += -lm
|
||||
|
||||
PROGS = genericDetectorServer
|
||||
DESTDIR ?= bin
|
||||
INSTMODE = 0777
|
||||
|
||||
SRC_CLNT = slsDetectorServer.c slsDetectorServer_funcs.c communication_funcs.c slsDetectorFunctionList.c
|
||||
OBJS = $(SRC_CLNT:.cpp=.o)
|
||||
|
||||
|
||||
|
||||
all: clean $(PROGS)
|
||||
|
||||
boot: $(OBJS)
|
||||
|
||||
$(PROGS):
|
||||
echo $(OBJS)
|
||||
mkdir -p $(DESTDIR)
|
||||
$(CC) $(SRC_CLNT) $(CLAGS) $(LDLIBS) -o $@
|
||||
mv $(PROGS) $(DESTDIR)
|
||||
|
||||
|
||||
clean:
|
||||
rm -rf $(DESTDIR)/$(PROGS) *.o
|
||||
@ -11,7 +11,8 @@ u_int64_t CSP0BASE = 0;
|
||||
#define CSP0 0x20200000
|
||||
#define MEM_SIZE 0x100000
|
||||
|
||||
|
||||
/** I2C defines */
|
||||
#define I2C_CLOCK_MHZ (131.25)
|
||||
|
||||
/**
|
||||
* Write into a 16 bit register
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
|
||||
#include "blackfin.h"
|
||||
|
||||
void SPIChipSelect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask) {
|
||||
void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask) {
|
||||
|
||||
// start point
|
||||
(*valw) = 0xffffffff; // old board compatibility (not using specific bits)
|
||||
@ -14,7 +14,7 @@ void SPIChipSelect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask) {
|
||||
}
|
||||
|
||||
|
||||
void SPIChipDeselect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask, u_int32_t clkmask) {
|
||||
void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask) {
|
||||
// chip sel bar up
|
||||
(*valw) |= csmask; /* todo with test: not done for spi */
|
||||
bus_w (addr, (*valw));
|
||||
@ -28,7 +28,7 @@ void SPIChipDeselect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask, u_int3
|
||||
bus_w (addr, (*valw));
|
||||
}
|
||||
|
||||
void sendDataToSPI (u_int32_t* valw, u_int32_t addr, u_int32_t val, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) {
|
||||
void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) {
|
||||
int i = 0;
|
||||
for (i = 0; i < numbitstosend; ++i) {
|
||||
|
||||
@ -48,13 +48,13 @@ void sendDataToSPI (u_int32_t* valw, u_int32_t addr, u_int32_t val, int numbitst
|
||||
}
|
||||
|
||||
|
||||
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) {
|
||||
void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) {
|
||||
if (numbitstosend == 16) {
|
||||
FILE_LOG(logDEBUG1, ("Writing to SPI Register: 0x%04x\n", val));
|
||||
} else {
|
||||
FILE_LOG(logDEBUG1, ("Writing to SPI Register: 0x%08x\n", val));
|
||||
}
|
||||
u_int32_t valw;
|
||||
uint32_t valw;
|
||||
|
||||
SPIChipSelect (&valw, addr, csmask);
|
||||
|
||||
|
||||
@ -299,14 +299,52 @@ int receiveData(int file_des, void* buf,int length, intType itype){
|
||||
|
||||
|
||||
int sendDataOnly(int file_des, void* buf,int length) {
|
||||
if (!length)
|
||||
return 0;
|
||||
int lret = write(file_des, buf, length); //value of -1 is other end socket crash as sigpipe is ignored
|
||||
if (lret < 0) {
|
||||
FILE_LOG(logERROR, ("Could not write to %s socket. Possible socket crash\n",
|
||||
(isControlServer ? "control":"stop")));
|
||||
}
|
||||
return lret;
|
||||
if (!length)
|
||||
return 0;
|
||||
|
||||
|
||||
int bytesSent = 0;
|
||||
int retry = 0; // retry index when buffer is blocked (write returns 0)
|
||||
while (bytesSent < length) {
|
||||
|
||||
// setting a max packet size for blackfin driver (and network driver does not do a check if packets sent)
|
||||
int bytesToSend = length - bytesSent;
|
||||
if (bytesToSend > BLACKFIN_DRVR_SND_LMT)
|
||||
bytesToSend = BLACKFIN_DRVR_SND_LMT;
|
||||
|
||||
// send
|
||||
int rc = write(file_des, (char*)((char*)buf + bytesSent), bytesToSend);
|
||||
// error
|
||||
if (rc < 0) {
|
||||
FILE_LOG(logERROR, ("Could not write to %s socket. Possible socket crash\n",
|
||||
(isControlServer ? "control":"stop")));
|
||||
return bytesSent;
|
||||
}
|
||||
// also error, wrote nothing, buffer blocked up, too fast sending for client
|
||||
if (rc == 0) {
|
||||
FILE_LOG(logERROR, ("Could not write to %s socket. Buffer full. Retry: %d\n",
|
||||
(isControlServer ? "control":"stop"), retry));
|
||||
++retry;
|
||||
// wrote nothing for many loops
|
||||
if (retry >= BLACKFIN_RSND_PCKT_LOOP) {
|
||||
FILE_LOG(logERROR, ("Could not write to %s socket. Buffer full! Too fast! No more.\n",
|
||||
(isControlServer ? "control":"stop")));
|
||||
return bytesSent;
|
||||
}
|
||||
usleep(BLACKFIN_RSND_WAIT_US);
|
||||
}
|
||||
// wrote something, reset retry
|
||||
else {
|
||||
retry = 0;
|
||||
if (rc != bytesToSend) {
|
||||
FILE_LOG(logWARNING, ("Only partial write to %s socket. Expected to write %d bytes, wrote %d\n",
|
||||
(isControlServer ? "control":"stop"), bytesToSend, rc));
|
||||
}
|
||||
}
|
||||
bytesSent += rc;
|
||||
}
|
||||
|
||||
return bytesSent;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -1,838 +0,0 @@
|
||||
#ifdef SLS_DETECTOR_FUNCTION_LIST
|
||||
|
||||
#include "slsDetectorFunctionList.h"
|
||||
#include "slsDetectorServer_defs.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
|
||||
const int nChans=NCHAN;
|
||||
const int nChips=NCHIP;
|
||||
const int nDacs=NDAC;
|
||||
const int nAdcs=NADC;
|
||||
const int allSelected=-2;
|
||||
const int noneSelected=-1;
|
||||
|
||||
sls_detector_module *detectorModules=NULL;
|
||||
int *detectorChips=NULL;
|
||||
int *detectorChans=NULL;
|
||||
dacs_t *detectorDacs=NULL;
|
||||
dacs_t *detectorAdcs=NULL;
|
||||
|
||||
int nModY = NMAXMOD;
|
||||
int nModX = NMAXMOD;
|
||||
int dynamicRange= DYNAMIC_RANGE;
|
||||
int dataBytes = NMAXMOD*NCHIP*NCHAN*2;
|
||||
int masterMode = NO_MASTER;
|
||||
int syncMode = NO_SYNCHRONIZATION;
|
||||
int timingMode = AUTO_TIMING;
|
||||
|
||||
|
||||
|
||||
enum detectorSettings thisSettings;
|
||||
int sChan, sChip, sMod, sDac, sAdc;
|
||||
int nModBoard;
|
||||
extern int dataBytes;
|
||||
|
||||
|
||||
int initializeDetectorStructure(){
|
||||
|
||||
int imod;
|
||||
int n=getNModBoard(X)*getNModBoard(Y);
|
||||
#ifdef VERBOSE
|
||||
printf("Board is for %d modules\n",n);
|
||||
#endif
|
||||
detectorModules=malloc(n*sizeof(sls_detector_module));
|
||||
detectorChips=malloc(n*NCHIP*sizeof(int));
|
||||
detectorChans=malloc(n*NCHIP*NCHAN*sizeof(int));
|
||||
detectorDacs=malloc(n*NDAC*sizeof(int));
|
||||
detectorAdcs=malloc(n*NADC*sizeof(int));
|
||||
#ifdef VERBOSE
|
||||
printf("modules from 0x%x to 0x%x\n",(unsigned int)(detectorModules), (unsigned int)(detectorModules+n));
|
||||
printf("chips from 0x%x to 0x%x\n",(unsigned int)(detectorChips), (unsigned int)(detectorChips+n*NCHIP));
|
||||
printf("chans from 0x%x to 0x%x\n",(unsigned int)(detectorChans), (unsigned int)(detectorChans+n*NCHIP*NCHAN));
|
||||
printf("dacs from 0x%x to 0x%x\n",(unsigned int)(detectorDacs), (unsigned int)(detectorDacs+n*NDAC));
|
||||
printf("adcs from 0x%x to 0x%x\n",(unsigned int)(detectorAdcs), (unsigned int)(detectorAdcs+n*NADC));
|
||||
#endif
|
||||
for (imod=0; imod<n; imod++) {
|
||||
(detectorModules+imod)->dacs=detectorDacs+imod*NDAC;
|
||||
(detectorModules+imod)->adcs=detectorAdcs+imod*NADC;
|
||||
(detectorModules+imod)->chipregs=detectorChips+imod*NCHIP;
|
||||
(detectorModules+imod)->chanregs=detectorChans+imod*NCHIP*NCHAN;
|
||||
(detectorModules+imod)->ndac=NDAC;
|
||||
(detectorModules+imod)->nadc=NADC;
|
||||
(detectorModules+imod)->nchip=NCHIP;
|
||||
(detectorModules+imod)->nchan=NCHIP*NCHAN;
|
||||
(detectorModules+imod)->module=imod;
|
||||
(detectorModules+imod)->gain=0;
|
||||
(detectorModules+imod)->offset=0;
|
||||
(detectorModules+imod)->reg=0;
|
||||
/* initialize registers, dacs, retrieve sn, adc values etc */
|
||||
}
|
||||
thisSettings=UNINITIALIZED;
|
||||
sChan=noneSelected;
|
||||
sChip=noneSelected;
|
||||
sMod=noneSelected;
|
||||
sDac=noneSelected;
|
||||
sAdc=noneSelected;
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int setupDetector(){
|
||||
//testFpga();
|
||||
//testRAM();
|
||||
|
||||
//setSettings(GET_SETTINGS,-1);
|
||||
//setFrames(1);
|
||||
//setTrains(1);
|
||||
//setExposureTime(1e6);
|
||||
//setPeriod(1e9);
|
||||
//setDelay(0);
|
||||
//setGates(0);
|
||||
|
||||
//setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
|
||||
//setMaster(GET_MASTER);
|
||||
//setSynchronization(GET_SYNCHRONIZATION_MODE);
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int setNMod(int nm, enum dimension dim){
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int getNModBoard(enum dimension arg){
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int64_t getModuleId(enum idMode arg, int imod){
|
||||
//DETECTOR_SERIAL_NUMBER
|
||||
//DETECTOR_FIRMWARE_VERSION
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int64_t getDetectorId(enum idMode arg){
|
||||
//DETECTOR_SOFTWARE_VERSION defined in slsDetector_defs.h?
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int moduleTest( enum digitalTestMode arg, int imod){
|
||||
//template testShiftIn from mcb_funcs.c
|
||||
|
||||
//CHIP_TEST
|
||||
//testShiftIn
|
||||
//testShiftOut
|
||||
//testShiftStSel
|
||||
//testDataInOutMux
|
||||
//testExtPulseMux
|
||||
//testOutMux
|
||||
//testFpgaMux
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
int detectorTest( enum digitalTestMode arg){
|
||||
//templates from firmware_funcs.c
|
||||
|
||||
//DETECTOR_FIRMWARE_TEST:testFpga()
|
||||
//DETECTOR_MEMORY_TEST:testRAM()
|
||||
//DETECTOR_BUS_TEST:testBus()
|
||||
//DETECTOR_SOFTWARE_TEST:testFpga()
|
||||
return OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
double setDAC(enum dacIndex ind, double val, int imod){
|
||||
//template initDACbyIndexDACU from mcb_funcs.c
|
||||
|
||||
//check that slsDetectorServer_funcs.c set_dac() has all the specific dac enums
|
||||
//set dac and write to a register in fpga to remember dac value when server restarts
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
double getADC(enum dacIndex ind, int imod){
|
||||
//get adc value
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int setChannel(sls_detector_channel myChan){
|
||||
//template initChannelByNumber() from mcb_funcs.c
|
||||
|
||||
return myChan.reg;
|
||||
}
|
||||
|
||||
|
||||
int getChannel(sls_detector_channel *myChan){
|
||||
//template getChannelbyNumber() from mcb_funcs.c
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int setChip(sls_detector_chip myChip){
|
||||
//template initChipbyNumber() from mcb_funcs.c
|
||||
return myChip.reg;
|
||||
}
|
||||
|
||||
|
||||
int getChip(sls_detector_chip *myChip){
|
||||
//template getChipbyNumber() from mcb_funcs.c
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
int setModule(sls_detector_module myChan){
|
||||
//template initModulebyNumber() from mcb_funcs.c
|
||||
return OK;
|
||||
}
|
||||
|
||||
int getModule(sls_detector_module *myChan){
|
||||
//template getModulebyNumber() from mcb_funcs.c
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
int getThresholdEnergy(int imod){
|
||||
//template getThresholdEnergy() from mcb_funcs.c
|
||||
//depending on settings
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
int setThresholdEnergy(int thr, int imod){
|
||||
//template getThresholdEnergy() from mcb_funcs.c
|
||||
//depending on settings
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
enum detectorSettings setSettings(enum detectorSettings sett, int imod){
|
||||
//template setSettings() from mcb_funcs.c
|
||||
//reads the dac registers from fpga to confirm which settings, if weird, undefined
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
int startStateMachine(){
|
||||
//template startStateMachine() from firmware_funcs.c
|
||||
/*
|
||||
fifoReset();
|
||||
now_ptr=(char*)ram_values;
|
||||
//send start acquisition to fpga
|
||||
*/
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
int stopStateMachine(){
|
||||
//template stopStateMachine() from firmware_funcs.c
|
||||
// send stop to fpga
|
||||
//if status = busy after 500us, return FAIL
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
int startReadOut(){
|
||||
//template startReadOut() from firmware_funcs.c
|
||||
//send fpga start readout
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
enum runStatus getRunStatus(){
|
||||
//template runState() from firmware_funcs.c
|
||||
//get status from fpga
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
|
||||
char *readFrame(int *ret, char *mess){
|
||||
//template fifo_read_event() from firmware_funcs.c
|
||||
//checks if state machine running and if fifo has data(look_at_me_reg) and accordingly reads frame
|
||||
// memcpy(now_ptr, values, dataBytes);
|
||||
//returns ptr to values
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
int64_t setTimer(enum timerIndex ind, int64_t val){
|
||||
//template setDelay() from firmware_funcs.c
|
||||
//writes to reg
|
||||
//FRAME_NUMBER
|
||||
//ACQUISITION_TIME
|
||||
//FRAME_PERIOD
|
||||
//DELAY_AFTER_TRIGGER
|
||||
//GATES_NUMBER
|
||||
//PROBES_NUMBER
|
||||
//CYCLES_NUMBER
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int64_t getTimeLeft(enum timerIndex ind){
|
||||
//template getDelay() from firmware_funcs.c
|
||||
//reads from reg
|
||||
//FRAME_NUMBER
|
||||
//ACQUISITION_TIME
|
||||
//FRAME_PERIOD
|
||||
//DELAY_AFTER_TRIGGER
|
||||
//GATES_NUMBER
|
||||
//PROBES_NUMBER
|
||||
//CYCLES_NUMBER
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int setDynamicRange(int dr){
|
||||
//template setDynamicRange() from firmware_funcs.c
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
enum readOutFlags setReadOutFlags(enum readOutFlags val){
|
||||
//template setStoreInRAM from firmware_funcs.c
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int setROI(int n, ROI arg[], int *retvalsize, int *ret){
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int setSpeed(enum speedVariable arg, int val){
|
||||
//template setClockDivider() from firmware_funcs.c
|
||||
//CLOCK_DIVIDER
|
||||
//WAIT_STATES
|
||||
//SET_SIGNAL_LENGTH
|
||||
//TOT_CLOCK_DIVIDER
|
||||
//TOT_DUTY_CYCLE
|
||||
|
||||
//returns eg getClockDivider from firmware_funcs.c
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int executeTrimming(enum trimMode mode, int par1, int par2, int imod){
|
||||
// template trim_with_noise from trimming_funcs.c
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int configureMAC(int ipad, long long int imacadd, long long int iservermacadd, int dtb){
|
||||
//detector specific.
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
int loadImage(enum imageType index, char *imageVals){
|
||||
//detector specific.
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
|
||||
int readCounterBlock(int startACQ, char *counterVals){
|
||||
//detector specific.
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
int resetCounterBlock(int startACQ){
|
||||
//detector specific.
|
||||
return FAIL;
|
||||
}
|
||||
|
||||
int startReceiver(int d){
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int calibratePedestal(int frames){
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int calculateDataBytes(){
|
||||
return 0;
|
||||
}
|
||||
|
||||
int getTotalNumberOfChannels(){return 0;}
|
||||
int getTotalNumberOfChips(){return 0;}
|
||||
int getTotalNumberOfModules(){return 0;}
|
||||
int getNumberOfChannelsPerChip(){return 0;}
|
||||
int getNumberOfChannelsPerModule(){return 0;}
|
||||
int getNumberOfChipsPerModule(){return 0;}
|
||||
int getNumberOfDACsPerModule(){return 0;}
|
||||
int getNumberOfADCsPerModule(){return 0;}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
enum externalSignalFlag getExtSignal(int signalindex){
|
||||
//template getExtSignal from firmware_funcs.c
|
||||
//return signals[signalindex];
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
enum externalSignalFlag setExtSignal(int signalindex, enum externalSignalFlag flag){
|
||||
//template setExtSignal from firmware_funcs.c
|
||||
|
||||
//in short..sets signals array, checks if agrees with timing mode, writes to fpga reg, calls synchronization and then settiming
|
||||
/*
|
||||
if (signalindex>=0 && signalindex<4) {
|
||||
signals[signalindex]=flag;
|
||||
#ifdef VERBOSE
|
||||
printf("settings signal variable number %d to value %04x\n", signalindex, signals[signalindex]);
|
||||
#endif
|
||||
// if output signal, set it!
|
||||
switch (flag) {
|
||||
case GATE_IN_ACTIVE_HIGH:
|
||||
case GATE_IN_ACTIVE_LOW:
|
||||
if (timingMode==GATE_FIX_NUMBER || timingMode==GATE_WITH_START_TRIGGER)//timingMode = AUTO_TIMING by default and is set in setTiming()
|
||||
setFPGASignal(signalindex,flag); //not implemented here, checks if flag within limits and writes to fpga reg
|
||||
else
|
||||
setFPGASignal(signalindex,SIGNAL_OFF);
|
||||
break;
|
||||
case TRIGGER_IN_RISING_EDGE:
|
||||
case TRIGGER_IN_FALLING_EDGE:
|
||||
if (timingMode==TRIGGER_EXPOSURE || timingMode==GATE_WITH_START_TRIGGER)
|
||||
setFPGASignal(signalindex,flag);
|
||||
else
|
||||
setFPGASignal(signalindex,SIGNAL_OFF);
|
||||
break;
|
||||
case RO_TRIGGER_IN_RISING_EDGE:
|
||||
case RO_TRIGGER_IN_FALLING_EDGE:
|
||||
if (timingMode==BURST_TRIGGER)
|
||||
setFPGASignal(signalindex,flag);
|
||||
else
|
||||
setFPGASignal(signalindex,SIGNAL_OFF);
|
||||
break;
|
||||
case MASTER_SLAVE_SYNCHRONIZATION:
|
||||
setSynchronization(syncMode);//syncmode = NO_SYNCHRONIZATION by default and set with this function
|
||||
break;
|
||||
default:
|
||||
setFPGASignal(signalindex,mode);
|
||||
}
|
||||
|
||||
setTiming(GET_EXTERNAL_COMMUNICATION_MODE);
|
||||
}
|
||||
*/
|
||||
return getExtSignal(signalindex);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
enum externalCommunicationMode setTiming( enum externalCommunicationMode arg){
|
||||
//template setTiming from firmware_funcs.c
|
||||
//template getFPGASignal from firmware_funcs.c
|
||||
|
||||
|
||||
//getFPGASignal(signalindex) used later on in this fucntion
|
||||
//gets flag from fpga reg, checks if flag within limits,
|
||||
//if( flag=SIGNAL_OFF and signals[signalindex]==MASTER_SLAVE_SYNCHRONIZATION), return -1, (ensures masterslaveflag !=off now)
|
||||
//else return flag
|
||||
|
||||
int ret=GET_EXTERNAL_COMMUNICATION_MODE;
|
||||
//sets timingmode variable
|
||||
//ensures that the signals are in acceptance with timing mode and according sets the timing mode
|
||||
/*
|
||||
int g=-1, t=-1, rot=-1;
|
||||
|
||||
int i;
|
||||
|
||||
switch (ti) {
|
||||
case AUTO_TIMING:
|
||||
timingMode=ti;
|
||||
// disable all gates/triggers in except if used for master/slave synchronization
|
||||
for (i=0; i<4; i++) {
|
||||
if (getFPGASignal(i)>0 && getFPGASignal(i)<GATE_OUT_ACTIVE_HIGH && signals[i]!=MASTER_SLAVE_SYNCHRONIZATION)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
}
|
||||
break;
|
||||
|
||||
case TRIGGER_EXPOSURE:
|
||||
timingMode=ti;
|
||||
// if one of the signals is configured to be trigger, set it and unset possible gates
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,signals[i]);
|
||||
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
else if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
|
||||
case TRIGGER_READOUT:
|
||||
timingMode=ti;
|
||||
// if one of the signals is configured to be trigger, set it and unset possible gates
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,signals[i]);
|
||||
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
}
|
||||
break;
|
||||
|
||||
case GATE_FIX_NUMBER:
|
||||
timingMode=ti;
|
||||
// if one of the signals is configured to be trigger, set it and unset possible gates
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
||||
setFPGASignal(i,signals[i]);
|
||||
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case GATE_WITH_START_TRIGGER:
|
||||
timingMode=ti;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==RO_TRIGGER_IN_RISING_EDGE || signals[i]==RO_TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
else if (signals[i]==GATE_IN_ACTIVE_HIGH || signals[i]==GATE_IN_ACTIVE_LOW)
|
||||
setFPGASignal(i,signals[i]);
|
||||
else if (signals[i]==TRIGGER_IN_RISING_EDGE || signals[i]==TRIGGER_IN_FALLING_EDGE)
|
||||
setFPGASignal(i,signals[i]);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
;
|
||||
|
||||
}
|
||||
|
||||
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]!=MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (getFPGASignal(i)==RO_TRIGGER_IN_RISING_EDGE || getFPGASignal(i)==RO_TRIGGER_IN_FALLING_EDGE)
|
||||
rot=i;
|
||||
else if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH || getFPGASignal(i)==GATE_IN_ACTIVE_LOW)
|
||||
g=i;
|
||||
else if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE || getFPGASignal(i)==TRIGGER_IN_FALLING_EDGE)
|
||||
t=i;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (g>=0 && t>=0 && rot<0) {
|
||||
ret=GATE_WITH_START_TRIGGER;
|
||||
} else if (g<0 && t>=0 && rot<0) {
|
||||
ret=TRIGGER_EXPOSURE;
|
||||
} else if (g>=0 && t<0 && rot<0) {
|
||||
ret=GATE_FIX_NUMBER;
|
||||
} else if (g<0 && t<0 && rot>0) {
|
||||
ret=TRIGGER_READOUT;
|
||||
} else if (g<0 && t<0 && rot<0) {
|
||||
ret=AUTO_TIMING;
|
||||
}
|
||||
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
enum masterFlags setMaster(enum masterFlags arg){
|
||||
//template setMaster from firmware_funcs.c
|
||||
/*
|
||||
int i;
|
||||
switch(f) {
|
||||
case NO_MASTER:
|
||||
// switch of gates or triggers
|
||||
masterMode=NO_MASTER;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
}
|
||||
}
|
||||
break;
|
||||
case IS_MASTER:
|
||||
// configure gate or trigger out
|
||||
masterMode=IS_MASTER;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
switch (syncMode) {
|
||||
case NO_SYNCHRONIZATION:
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
break;
|
||||
case MASTER_GATES:
|
||||
setFPGASignal(i,GATE_OUT_ACTIVE_HIGH);
|
||||
break;
|
||||
case MASTER_TRIGGERS:
|
||||
setFPGASignal(i,TRIGGER_OUT_RISING_EDGE);
|
||||
break;
|
||||
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
||||
setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE);
|
||||
break;
|
||||
default:
|
||||
;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case IS_SLAVE:
|
||||
// configure gate or trigger in
|
||||
masterMode=IS_SLAVE;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
switch (syncMode) {
|
||||
case NO_SYNCHRONIZATION:
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
break;
|
||||
case MASTER_GATES:
|
||||
setFPGASignal(i,GATE_IN_ACTIVE_HIGH);
|
||||
break;
|
||||
case MASTER_TRIGGERS:
|
||||
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
||||
break;
|
||||
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
||||
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
||||
break;
|
||||
default:
|
||||
;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
//do nothing
|
||||
;
|
||||
}
|
||||
|
||||
switch(masterMode) {
|
||||
case NO_MASTER:
|
||||
return NO_MASTER;
|
||||
|
||||
|
||||
case IS_MASTER:
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
switch (syncMode) {
|
||||
case NO_SYNCHRONIZATION:
|
||||
return IS_MASTER;
|
||||
case MASTER_GATES:
|
||||
if (getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH)
|
||||
return IS_MASTER;
|
||||
else
|
||||
return NO_MASTER;
|
||||
case MASTER_TRIGGERS:
|
||||
if (getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE)
|
||||
return IS_MASTER;
|
||||
else
|
||||
return NO_MASTER;
|
||||
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
||||
if (getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE)
|
||||
return IS_MASTER;
|
||||
else
|
||||
return NO_MASTER;
|
||||
default:
|
||||
return NO_MASTER;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
case IS_SLAVE:
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
switch (syncMode) {
|
||||
case NO_SYNCHRONIZATION:
|
||||
return IS_SLAVE;
|
||||
case MASTER_GATES:
|
||||
if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH)
|
||||
return IS_SLAVE;
|
||||
else
|
||||
return NO_MASTER;
|
||||
case MASTER_TRIGGERS:
|
||||
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
||||
if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE)
|
||||
return IS_SLAVE;
|
||||
else
|
||||
return NO_MASTER;
|
||||
default:
|
||||
return NO_MASTER;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
*/
|
||||
|
||||
return NO_MASTER;
|
||||
}
|
||||
|
||||
|
||||
|
||||
enum synchronizationMode setSynchronization(enum synchronizationMode arg){
|
||||
/*
|
||||
int i;
|
||||
|
||||
switch(s) {
|
||||
case NO_SYNCHRONIZATION:
|
||||
syncMode=NO_SYNCHRONIZATION;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
setFPGASignal(i,SIGNAL_OFF);
|
||||
}
|
||||
}
|
||||
break;
|
||||
// disable external signals?
|
||||
case MASTER_GATES:
|
||||
// configure gate in or out
|
||||
syncMode=MASTER_GATES;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (masterMode==IS_MASTER)
|
||||
setFPGASignal(i,GATE_OUT_ACTIVE_HIGH);
|
||||
else if (masterMode==IS_SLAVE)
|
||||
setFPGASignal(i,GATE_IN_ACTIVE_HIGH);
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
case MASTER_TRIGGERS:
|
||||
// configure trigger in or out
|
||||
syncMode=MASTER_TRIGGERS;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (masterMode==IS_MASTER)
|
||||
setFPGASignal(i,TRIGGER_OUT_RISING_EDGE);
|
||||
else if (masterMode==IS_SLAVE)
|
||||
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
||||
// configure trigger in or out
|
||||
syncMode=SLAVE_STARTS_WHEN_MASTER_STOPS;
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (masterMode==IS_MASTER)
|
||||
setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE);
|
||||
else if (masterMode==IS_SLAVE)
|
||||
setFPGASignal(i,TRIGGER_IN_RISING_EDGE);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
//do nothing
|
||||
;
|
||||
}
|
||||
|
||||
switch (syncMode) {
|
||||
|
||||
case NO_SYNCHRONIZATION:
|
||||
return NO_SYNCHRONIZATION;
|
||||
|
||||
case MASTER_GATES:
|
||||
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (masterMode==IS_MASTER && getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH)
|
||||
return MASTER_GATES;
|
||||
else if (masterMode==IS_SLAVE && getFPGASignal(i)==GATE_IN_ACTIVE_HIGH)
|
||||
return MASTER_GATES;
|
||||
}
|
||||
}
|
||||
return NO_SYNCHRONIZATION;
|
||||
|
||||
case MASTER_TRIGGERS:
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (masterMode==IS_MASTER && getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE)
|
||||
return MASTER_TRIGGERS;
|
||||
else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE)
|
||||
return MASTER_TRIGGERS;
|
||||
}
|
||||
}
|
||||
return NO_SYNCHRONIZATION;
|
||||
|
||||
case SLAVE_STARTS_WHEN_MASTER_STOPS:
|
||||
for (i=0; i<4; i++) {
|
||||
if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) {
|
||||
if (masterMode==IS_MASTER && getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE)
|
||||
return SLAVE_STARTS_WHEN_MASTER_STOPS;
|
||||
else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE)
|
||||
return SLAVE_STARTS_WHEN_MASTER_STOPS;
|
||||
}
|
||||
}
|
||||
return NO_SYNCHRONIZATION;
|
||||
|
||||
default:
|
||||
return NO_SYNCHRONIZATION;
|
||||
|
||||
}
|
||||
|
||||
|
||||
*/
|
||||
return NO_SYNCHRONIZATION;
|
||||
}
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@ -15,12 +15,10 @@ Here are the definitions, but the actual implementation should be done for each
|
||||
|
||||
|
||||
// basic tests
|
||||
#if defined(EIGERD) || defined(JUNGFRAUD) || defined(GOTTHARDD)
|
||||
int isFirmwareCheckDone();
|
||||
int getFirmwareCheckResult(char** mess);
|
||||
#endif
|
||||
void basictests();
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD)
|
||||
int checkType();
|
||||
u_int32_t testFpga(void);
|
||||
int testBus(void);
|
||||
@ -28,14 +26,14 @@ int testBus(void);
|
||||
|
||||
#ifdef GOTTHARDD
|
||||
int detectorTest(enum digitalTestMode arg, int ival);
|
||||
#elif JUNGFRAUD
|
||||
#elif defined(JUNGFRAUD) || defined(CHIPTESTBOARDD)
|
||||
int detectorTest(enum digitalTestMode arg);
|
||||
#endif
|
||||
|
||||
// Ids
|
||||
int64_t getDetectorId(enum idMode arg);
|
||||
u_int64_t getFirmwareVersion();
|
||||
#ifdef JUNGFRAUD
|
||||
#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD)
|
||||
u_int64_t getFirmwareAPIVersion();
|
||||
u_int16_t getHardwareVersionNumber();
|
||||
u_int16_t getHardwareSerialNumber();
|
||||
@ -60,6 +58,11 @@ void getModuleConfiguration();
|
||||
void allocateDetectorStructureMemory();
|
||||
#endif
|
||||
void setupDetector();
|
||||
#ifdef CHIPTESTBOARDD
|
||||
int allocateRAM();
|
||||
void updateDataBytes();
|
||||
int getChannels();
|
||||
#endif
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
int setDefaultDacs();
|
||||
#endif
|
||||
@ -80,14 +83,9 @@ uint32_t readRegister16And32(uint32_t offset);
|
||||
|
||||
// firmware functions (resets)
|
||||
#ifdef JUNGFRAUD
|
||||
int powerChip (int on);
|
||||
void cleanFifos();
|
||||
void resetCore();
|
||||
void resetPeripheral();
|
||||
int autoCompDisable(int on);
|
||||
int adcPhase(int st);
|
||||
int getPhase();
|
||||
void configureASICTimer();
|
||||
#elif GOTTHARDD
|
||||
void setPhaseShiftOnce();
|
||||
void setPhaseShift(int numphaseshift);
|
||||
@ -100,19 +98,24 @@ void setROIADC(int adc);
|
||||
void setGbitReadout();
|
||||
int readConfigFile();
|
||||
void setMasterSlaveConfiguration();
|
||||
#elif CHIPTESTBOARDD
|
||||
void cleanFifos();
|
||||
void resetCore();
|
||||
void resetPeripheral();
|
||||
#endif
|
||||
|
||||
// parameters - dr, roi
|
||||
int setDynamicRange(int dr);
|
||||
#ifdef GOTTHARDD
|
||||
#if defined(GOTTHARDD) || defined(CHIPTESTBOARDD)
|
||||
ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret);
|
||||
#endif
|
||||
|
||||
// parameters - readout
|
||||
#ifndef GOTTHARDD
|
||||
enum speedVariable setSpeed(int val);
|
||||
void setSpeed(enum speedVariable ind, int val);
|
||||
int getSpeed(enum speedVariable ind);
|
||||
#endif
|
||||
#ifdef EIGERD
|
||||
#if defined(EIGERD) || defined(CHIPTESTBOARDD)
|
||||
enum readOutFlags setReadOutFlags(enum readOutFlags val);
|
||||
#endif
|
||||
|
||||
@ -122,16 +125,17 @@ int selectStoragecellStart(int pos);
|
||||
#endif
|
||||
int64_t setTimer(enum timerIndex ind, int64_t val);
|
||||
int64_t getTimeLeft(enum timerIndex ind);
|
||||
#if defined(JUNGFRAUD) || (GOTTHARDD)
|
||||
#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(CHIPTESTBOARDD)
|
||||
int validateTimer(enum timerIndex ind, int64_t val, int64_t retval);
|
||||
#endif
|
||||
|
||||
// parameters - module, settings
|
||||
#ifndef CHIPTESTBOARDD
|
||||
int setModule(sls_detector_module myMod, char* mess);
|
||||
int getModule(sls_detector_module *myMod);
|
||||
enum detectorSettings setSettings(enum detectorSettings sett);
|
||||
enum detectorSettings getSettings();
|
||||
|
||||
#endif
|
||||
|
||||
// parameters - threshold
|
||||
#ifdef EIGERD
|
||||
@ -140,20 +144,42 @@ int setThresholdEnergy(int ev);
|
||||
#endif
|
||||
|
||||
// parameters - dac, adc, hv
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined (CHIPTESTBOARDD)
|
||||
void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset); //commonServerFunction.h
|
||||
void initDac(int dacnum);
|
||||
int voltageToDac(int value);
|
||||
int dacToVoltage(unsigned int digital);
|
||||
#endif
|
||||
#ifdef CHIPTESTBOARDD
|
||||
int generalVoltageToDac(int value, int vmin, int vmax, int check);
|
||||
int generalDacToVoltage(unsigned int digital, int vmin, int vmax, int check);
|
||||
#endif
|
||||
#ifdef GOTTHARDD
|
||||
extern void setAdc9257(int addr, int val); // AD9257.h
|
||||
extern void setAdc9252(int addr, int val); // AD9252.h (old board)
|
||||
#elif JUNGFRAUD
|
||||
#endif
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD)
|
||||
extern void setAdc9257(int addr, int val); // AD9257.h
|
||||
#endif
|
||||
#ifdef CHIPTESTBOARDD
|
||||
extern int getMaxValidVref(); // AD9257.h
|
||||
extern void setVrefVoltage(int val) // AD9257.h
|
||||
#endif
|
||||
|
||||
void setDAC(enum DACINDEX ind, int val, int mV, int retval[]);
|
||||
#ifdef CHIPTESTBOARDD
|
||||
int isVLimitCompliant(int mV);
|
||||
int getVLimit();
|
||||
void setVLimit(int l);
|
||||
int isVchipValid(int val);
|
||||
int getVchip();
|
||||
void setVchip(int val);
|
||||
int getVChipToSet(enum DACINDEX ind, int val);
|
||||
int getDACIndexFromADCIndex(enum ADCINDEX ind);
|
||||
int getADCIndexFromDACIndex(enum DACINDEX ind);
|
||||
int isPowerValid(int val);
|
||||
int getPower();
|
||||
void setPower(DACINDEX ind, int val);
|
||||
#endif
|
||||
/*#ifdef GOTTHARDD
|
||||
void initDAC(int dac_addr, int value);
|
||||
void clearDACSregister();
|
||||
@ -162,6 +188,10 @@ void program_one_dac(int addr, int value);
|
||||
u_int32_t putout(char *s);
|
||||
#endif*/
|
||||
int getADC(enum ADCINDEX ind);
|
||||
#ifdef CHIPTESTBOARDD
|
||||
int getVoltage(int idac);
|
||||
int getCurrent(int idac);
|
||||
#endif
|
||||
|
||||
int setHighVoltage(int val);
|
||||
|
||||
@ -198,8 +228,41 @@ void loadImage(enum imageType index, short int imageVals[]);
|
||||
int readCounterBlock(int startACQ, short int counterVals[]);
|
||||
int resetCounterBlock(int startACQ);
|
||||
|
||||
// jungfrau specific - pll, flashing firmware
|
||||
// chip test board specific - powerchip, sendudp, pll, flashing firmware
|
||||
#elif CHIPTESTBOARDD
|
||||
int powerChip (int on);
|
||||
int sendUDP(int enable);
|
||||
void resetPLL();
|
||||
void setPllReconfigReg(u_int32_t reg, u_int32_t val);
|
||||
void configurePhase(CLKINDEX ind, int val);
|
||||
int getPhase(CLKINDEX ind);
|
||||
void configureFrequency(CLKINDEX ind, int val);
|
||||
int getFrequency(CLKINDEX ind);
|
||||
void configureSyncFrequency(CLKINDEX ind);
|
||||
void setAdcOffsetRegister(int adc, int val);
|
||||
void getAdcOffsetRegister(int adc);
|
||||
extern void eraseFlash(); // programfpga.h
|
||||
extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h
|
||||
extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h
|
||||
extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); // programfpga.h
|
||||
// ctb patterns
|
||||
uint64_t writePatternIOControl(uint64_t word);
|
||||
uint64_t writePatternClkControl(uint64_t word);
|
||||
uint64_t readPatternWord(int addr);
|
||||
uint64_t writePatternWord(int addr, uint64_t word);
|
||||
int setPatternWaitAddress(int level, int addr);
|
||||
uint64_t setPatternWaitTime(int level, uint64_t t);
|
||||
void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop);
|
||||
|
||||
// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware
|
||||
#elif JUNGFRAUD
|
||||
int powerChip (int on);
|
||||
int autoCompDisable(int on);
|
||||
void configureASICTimer();
|
||||
int setClockDivider(int val);
|
||||
int getClockDivider();
|
||||
int setAdcPhase(int st);
|
||||
int getPhase();
|
||||
void resetPLL();
|
||||
u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val);
|
||||
void configurePll();
|
||||
@ -230,6 +293,7 @@ int getAllTrimbits();
|
||||
int getBebFPGATemp();
|
||||
int activate(int enable);
|
||||
#endif
|
||||
|
||||
#if defined(JUNGFRAUD) || defined(EIGERD)
|
||||
int setNetworkParameter(enum NETWORKINDEX mode, int value);
|
||||
#endif
|
||||
@ -254,6 +318,12 @@ int startReadOut();
|
||||
#endif
|
||||
enum runStatus getRunStatus();
|
||||
void readFrame(int *ret, char *mess);
|
||||
#ifdef CHIPTESTBOARDD
|
||||
void unsetFifoReadStrobes();
|
||||
void readSample();
|
||||
int checkDataPresent();
|
||||
int readFrameFromFifo();
|
||||
#endif
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
u_int32_t runBusy();
|
||||
#endif
|
||||
|
||||
@ -63,7 +63,7 @@ int main(int argc, char *argv[]){
|
||||
FILE_LOG(logINFO, ("Detected phase shift of %d\n", phaseShift));
|
||||
}
|
||||
#endif
|
||||
#ifdef JUNGFRAUD
|
||||
#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD)
|
||||
else if(!strcasecmp(argv[i],"-update")){
|
||||
FILE_LOG(logINFO, ("Detected update mode\n"));
|
||||
debugflag = PROGRAMMING_MODE;
|
||||
|
||||
@ -1,31 +0,0 @@
|
||||
/*
|
||||
* slsDetectorServer_defs.h
|
||||
*
|
||||
* Created on: Jan 24, 2013
|
||||
* Author: l_maliakal_d
|
||||
*/
|
||||
|
||||
#ifndef SLSDETECTORSERVER_DEFS_H_
|
||||
#define SLSDETECTORSERVER_DEFS_H_
|
||||
|
||||
#include "sls_detector_defs.h"
|
||||
#include <stdint.h>
|
||||
|
||||
/** This is only an example file!!! */
|
||||
|
||||
/*
|
||||
#define GOODBYE (-200)
|
||||
enum DAC_INDEX {examplesdac}
|
||||
|
||||
Hardware Definitions
|
||||
#define NMAXMOD (1)
|
||||
#define NMOD (1)
|
||||
#define NCHAN (256 * 256)
|
||||
#define NCHIP (4)
|
||||
#define NADC (0)
|
||||
#define NDAC (16)
|
||||
#define NGAIN (0)
|
||||
#define NOFFSET (0)
|
||||
*/
|
||||
|
||||
#endif /* SLSDETECTORSERVER_DEFS_H_ */
|
||||
@ -14,6 +14,8 @@ const enum detectorType myDetectorType = GOTTHARD;
|
||||
const enum detectorType myDetectorType = EIGER;
|
||||
#elif JUNGFRAUD
|
||||
const enum detectorType myDetectorType = JUNGFRAU;
|
||||
#elif CHIPTESTBOARDD
|
||||
const enum detectorType myDetectorType = CHIPTESTBOARD;
|
||||
#else
|
||||
const enum detectorType myDetectorType = GENERIC;
|
||||
#endif
|
||||
@ -31,6 +33,11 @@ extern char mess[MAX_STR_LENGTH];
|
||||
// Variables that will be exported
|
||||
int sockfd = 0;
|
||||
int debugflag = 0;
|
||||
#ifdef CHIPTESTBOARDD
|
||||
int dataBytes = 0;
|
||||
uint16_t *ramValues = 0;
|
||||
int nframes = 0;
|
||||
#endif
|
||||
|
||||
// Local variables
|
||||
int (*flist[NUM_DET_FUNCTIONS])(int);
|
||||
@ -110,6 +117,42 @@ int decode_function(int file_des) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
const char* getTimerName(enum timerIndex ind) {
|
||||
switch (ind) {
|
||||
case FRAME_NUMBER: return "frame_number";
|
||||
case ACQUISITION_TIME: return "acquisition_time";
|
||||
case FRAME_PERIOD: return "frame_period";
|
||||
case DELAY_AFTER_TRIGGER: return "delay_after_trigger";
|
||||
case GATES_NUMBER: return "gates_number";
|
||||
case CYCLES_NUMBER: return "cycles_number";
|
||||
case ACTUAL_TIME: return "actual_time";
|
||||
case MEASUREMENT_TIME: return "measurement_time";
|
||||
case PROGRESS: return "progress";
|
||||
case MEASUREMENTS_NUMBER: return "measurements_number";
|
||||
case FRAMES_FROM_START: return "frames_from_start";
|
||||
case FRAMES_FROM_START_PG: return "frames_from_start_pg";
|
||||
case SAMPLES_JCTB: return "samples_jctb";
|
||||
case SUBFRAME_ACQUISITION_TIME: return "subframe_acquisition_time";
|
||||
case SUBFRAME_DEADTIME: return "subframe_deadtime";
|
||||
case STORAGE_CELL_NUMBER: return "storage_cell_number";
|
||||
default: return "unknown_timer";
|
||||
}
|
||||
}
|
||||
|
||||
const char* getSpeedName(enum speedVariable ind) {
|
||||
switch (ind) {
|
||||
case CLOCK_DIVIDER: return "clock_divider";
|
||||
case PHASE_SHIFT: return "phase_shift";
|
||||
case OVERSAMPLING: return "oversampling";
|
||||
case ADC_CLOCK: return "adc_clock";
|
||||
case ADC_PHASE: return "adc_phase";
|
||||
case ADC_PIPELINE: return "adc_pipeline";
|
||||
case DBIT_CLOCK: return "dbit_clock";
|
||||
case DBIT_PHASE: return "dbit_phase";
|
||||
case DBIT_PIPELINE: return "dbit_pipeline";
|
||||
default: return "unknown_speed";
|
||||
}
|
||||
}
|
||||
|
||||
const char* getFunctionName(enum detFuncs func) {
|
||||
switch (func) {
|
||||
@ -538,12 +581,6 @@ int set_dac(int file_des) {
|
||||
enum DACINDEX serverDacIndex = 0;
|
||||
|
||||
// check if dac exists for this detector
|
||||
#ifdef JUNGFRAUD
|
||||
if ((ind != HV_NEW) && (ind >= NDAC_OLDBOARD)) { //for compatibility with old board
|
||||
modeNotImplemented("Dac Index", (int)ind);
|
||||
} else
|
||||
serverDacIndex = ind;
|
||||
#else
|
||||
switch (ind) {
|
||||
#ifdef GOTTHARDD
|
||||
case G_VREF_DS :
|
||||
@ -570,72 +607,104 @@ int set_dac(int file_des) {
|
||||
case G_IB_TESTC:
|
||||
serverDacIndex = IB_TESTC;
|
||||
break;
|
||||
case HV_POT:
|
||||
break;
|
||||
case HIGH_VOLTAGE:
|
||||
break;
|
||||
#elif EIGERD
|
||||
case TRIMBIT_SIZE:
|
||||
serverDacIndex = VTR;
|
||||
serverDacIndex = VTR;
|
||||
break;
|
||||
case THRESHOLD:
|
||||
serverDacIndex = VTHRESHOLD;
|
||||
serverDacIndex = VTHRESHOLD;
|
||||
break;
|
||||
case E_SvP:
|
||||
serverDacIndex = SVP;
|
||||
serverDacIndex = SVP;
|
||||
break;
|
||||
case E_SvN:
|
||||
serverDacIndex = SVN;
|
||||
serverDacIndex = SVN;
|
||||
break;
|
||||
case E_Vtr:
|
||||
serverDacIndex = VTR;
|
||||
serverDacIndex = VTR;
|
||||
break;
|
||||
case E_Vrf:
|
||||
serverDacIndex = VRF;
|
||||
serverDacIndex = VRF;
|
||||
break;
|
||||
case E_Vrs:
|
||||
serverDacIndex = VRS;
|
||||
serverDacIndex = VRS;
|
||||
break;
|
||||
case E_Vtgstv:
|
||||
serverDacIndex = VTGSTV;
|
||||
serverDacIndex = VTGSTV;
|
||||
break;
|
||||
case E_Vcmp_ll:
|
||||
serverDacIndex = VCMP_LL;
|
||||
serverDacIndex = VCMP_LL;
|
||||
break;
|
||||
case E_Vcmp_lr:
|
||||
serverDacIndex = VCMP_LR;
|
||||
serverDacIndex = VCMP_LR;
|
||||
break;
|
||||
case E_cal:
|
||||
serverDacIndex = CAL;
|
||||
serverDacIndex = CAL;
|
||||
break;
|
||||
case E_Vcmp_rl:
|
||||
serverDacIndex = VCMP_RL;
|
||||
serverDacIndex = VCMP_RL;
|
||||
break;
|
||||
case E_Vcmp_rr:
|
||||
serverDacIndex = VCMP_RR;
|
||||
serverDacIndex = VCMP_RR;
|
||||
break;
|
||||
case E_rxb_rb:
|
||||
serverDacIndex = RXB_RB;
|
||||
serverDacIndex = RXB_RB;
|
||||
break;
|
||||
case E_rxb_lb:
|
||||
serverDacIndex = RXB_LB;
|
||||
serverDacIndex = RXB_LB;
|
||||
break;
|
||||
case E_Vcp:
|
||||
serverDacIndex = VCP;
|
||||
serverDacIndex = VCP;
|
||||
break;
|
||||
case E_Vcn:
|
||||
serverDacIndex = VCN;
|
||||
serverDacIndex = VCN;
|
||||
break;
|
||||
case E_Vis:
|
||||
serverDacIndex = VIS;
|
||||
serverDacIndex = VIS;
|
||||
break;
|
||||
case HV_NEW:
|
||||
case HIGH_VOLTAGE:
|
||||
case IO_DELAY:
|
||||
break;
|
||||
#elif CHIPTESTBOARDD
|
||||
case ADC_VPP:
|
||||
case HIGH_VOLTAGE:
|
||||
break;
|
||||
case V_POWER_A:
|
||||
serverDacIndex = D_PWR_A;
|
||||
break;
|
||||
case V_POWER_B:
|
||||
serverDacIndex = D_PWR_B;
|
||||
break;
|
||||
case V_POWER_C:
|
||||
serverDacIndex = D_PWR_C;
|
||||
break;
|
||||
case V_POWER_D:
|
||||
serverDacIndex = D_PWR_D;
|
||||
break;
|
||||
case V_POWER_IO:
|
||||
serverDacIndex = D_PWR_IO;
|
||||
break;
|
||||
case V_POWER_CHIP:
|
||||
serverDacIndex = D_PWR_CHIP;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
modeNotImplemented("Dac Index", (int)ind);
|
||||
#ifdef JUNGFRAUD
|
||||
if ((ind == HIGH_VOLTAGE) || (ind < NDAC_OLDBOARD)) { //for compatibility with old board
|
||||
serverDacIndex = ind;
|
||||
break;
|
||||
}
|
||||
#elif CHIPTESTBOARDD
|
||||
if (ind < NDAC_ONLY) {
|
||||
serverDacIndex = ind;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
modeNotImplemented("Dac Index", (int)ind);
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
// index exists
|
||||
if (ret == OK) {
|
||||
@ -644,9 +713,23 @@ int set_dac(int file_des) {
|
||||
(mV ? "mV" : "dac units")));
|
||||
|
||||
// set & get
|
||||
if ((val == -1) || ((val != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((val == -1) || (Server_VerifyLock() == OK)) {
|
||||
switch(ind) {
|
||||
|
||||
// adc vpp
|
||||
#ifdef CHIPTESTBOARDD
|
||||
case ADC_VPP:
|
||||
if (val < 0 || val > getMaxValidVref()) {
|
||||
ret = FAIL;
|
||||
strcpy(mess,"Could not set dac. Adc Vpp value should be between 0 and %d\n", maxValidVref());
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
setVrefVoltage(val);
|
||||
retval = val; // cannot read
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
|
||||
// io delay
|
||||
#ifdef EIGERD
|
||||
case IO_DELAY:
|
||||
@ -657,10 +740,12 @@ int set_dac(int file_des) {
|
||||
#endif
|
||||
|
||||
// high voltage
|
||||
case HV_POT:
|
||||
case HV_NEW:
|
||||
case HIGH_VOLTAGE:
|
||||
retval[0] = setHighVoltage(val);
|
||||
FILE_LOG(logDEBUG1, ("High Voltage: %d\n", retval[0]));
|
||||
#if defined(JUNGFRAUD) || defined (CHIPTESTBOARDD)
|
||||
validate(val, retval[0], "set high voltage", DEC);
|
||||
#endif
|
||||
#ifdef GOTTHARDD
|
||||
if (retval[0] == -1) {
|
||||
ret = FAIL;
|
||||
@ -685,9 +770,90 @@ int set_dac(int file_des) {
|
||||
#endif
|
||||
break;
|
||||
|
||||
// power, vlimit
|
||||
#ifdef CHIPTESTBOARDD
|
||||
case V_POWER_A:
|
||||
case V_POWER_B:
|
||||
case V_POWER_C:
|
||||
case V_POWER_D:
|
||||
case V_POWER_IO:
|
||||
if (!mV) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set power. Power regulator %d should be in mV and not dac units.\n", ind);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else if (checkVLimitCompliant() == FAIL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set power. Power regulator %d exceeds voltage limit %d.\n", ind, getVLimit());
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else if (!isPowerValid(val)) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", POWER_RGLTR_MIN, POWER_RGLTR_MAX);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
if (val != -1)
|
||||
setPower(serverDacIndex, val);
|
||||
retval[0] = getPower(serverDacIndex);
|
||||
FILE_LOG(logDEBUG1, ("Power regulator(%d): %d\n", ind, retval[0]));
|
||||
validate(val, retval[0], "set power regulator", DEC);
|
||||
}
|
||||
break;
|
||||
|
||||
case V_POWER_CHIP:
|
||||
if (!mV) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set Vchip. Should be in mV and not dac units.\n");
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else if (!isVchipValid(val)) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set Vchip. Should be between %d and %d mV\n", VCHIP_MIN_MV, VCHIP_MAX_MV);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
if (val >= 0) // not letting user set to -100, it will affect setting
|
||||
setVchip(val);
|
||||
retval[0] = getVchip();
|
||||
FILE_LOG(logDEBUG1, ("Vchip: %d\n", retval[0]));
|
||||
validate(val, retval[0], "set vchip", DEC);
|
||||
}
|
||||
break;
|
||||
|
||||
case VLIMIT:
|
||||
if (!mV) {
|
||||
ret = FAIL;
|
||||
strcpy(mess,"Could not set power. VLimit should be in mV and not dac units.\n");
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
if (val >= 0)
|
||||
setVLimit(val);
|
||||
retval[0] = getVLimit();
|
||||
FILE_LOG(logDEBUG1, ("VLimit: %d\n", retval[0]));
|
||||
validate(val, retval[0], "set vlimit", DEC);
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
|
||||
// dacs
|
||||
default:
|
||||
setDAC(serverDacIndex, val, mV, retval);
|
||||
if (mV && val > MAX_DAC_VOLTAGE_VALUE) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set dac %d to value %d. Allowed limits (0 - %d mV).\n", ind, val, MAX_DAC_VOLTAGE_VALUE);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else if (!mV && val > MAX_DAC_UNIT_VALUE ) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set dac %d to value %d. Allowed limits (0 - %d dac units).\n", ind, val, MAX_DAC_UNIT_VALUE);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
#ifdef CHIPTESTBOARDD
|
||||
if ((mV && checkVLimitCompliant() == FAIL) ||
|
||||
(!mv && checkVLimitCompliant(dacToVoltage(val)) == FAIL)) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Could not set dac %d to value %d. "
|
||||
"Exceeds voltage limit %d.\n",
|
||||
ind, (mV ? val : dacToVoltage(val)), getVLimit());
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else
|
||||
#endif
|
||||
setDAC(serverDacIndex, val, mV, retval);
|
||||
}
|
||||
#ifdef EIGERD
|
||||
if (val != -1) {
|
||||
//changing dac changes settings to undefined
|
||||
@ -779,8 +945,44 @@ int get_adc(int file_des) {
|
||||
case TEMPERATURE_FPGA3:
|
||||
serverAdcIndex = TEMP_FPGAFEBR;
|
||||
break;
|
||||
#elif CHIPTESTBOARDD
|
||||
case V_POWER_A:
|
||||
serverAdcIndex = V_PWR_A;
|
||||
break;
|
||||
case V_POWER_B:
|
||||
serverAdcIndex = V_PWR_B;
|
||||
break;
|
||||
case V_POWER_C:
|
||||
serverAdcIndex = V_PWR_C;
|
||||
break;
|
||||
case V_POWER_D:
|
||||
serverAdcIndex = V_PWR_D;
|
||||
break;
|
||||
case V_POWER_IO:
|
||||
serverAdcIndex = V_PWR_IO;
|
||||
break;
|
||||
case I_POWER_A:
|
||||
serverAdcIndex = I_PWR_A;
|
||||
break;
|
||||
case I_POWER_B:
|
||||
serverAdcIndex = I_PWR_B;
|
||||
break;
|
||||
case I_POWER_C:
|
||||
serverAdcIndex = I_PWR_C;
|
||||
break;
|
||||
case I_POWER_D:
|
||||
serverAdcIndex = I_PWR_D;
|
||||
break;
|
||||
case I_POWER_IO:
|
||||
serverAdcIndex = I_PWR_IO;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
#ifdef CHIPTESTBOARDD
|
||||
if (ind >= SLOW_ADC_START_INDEX && ind <= SLOW_ADC_END_INDEX) {
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
modeNotImplemented("Adc Index", (int)ind);
|
||||
break;
|
||||
}
|
||||
@ -862,6 +1064,10 @@ int set_module(int file_des) {
|
||||
memset(mess, 0, sizeof(mess));
|
||||
enum detectorSettings retval = -1;
|
||||
|
||||
#ifdef CHIPTESTBOARDD
|
||||
functionNotImplemented();
|
||||
#else
|
||||
|
||||
sls_detector_module module;
|
||||
int *myDac = NULL;
|
||||
int *myChan = NULL;
|
||||
@ -959,6 +1165,8 @@ int set_module(int file_des) {
|
||||
}
|
||||
if (myChan != NULL) free(myChan);
|
||||
if (myDac != NULL) free(myDac);
|
||||
#endif
|
||||
|
||||
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
@ -985,6 +1193,10 @@ int get_module(int file_des) {
|
||||
} else
|
||||
module.dacs = myDac;
|
||||
|
||||
#ifdef CHIPTESTBOARDD
|
||||
functionNotImplemented();
|
||||
#endif
|
||||
|
||||
#ifdef EIGERD
|
||||
// allocate chans
|
||||
if (ret == OK) {
|
||||
@ -1034,10 +1246,14 @@ int set_settings(int file_des) {
|
||||
|
||||
if (receiveData(file_des, &isett, sizeof(isett), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
|
||||
#ifdef CHIPTESTBOARDD
|
||||
functionNotImplemented();
|
||||
#else
|
||||
FILE_LOG(logDEBUG1, ("Setting settings %d\n", isett));
|
||||
|
||||
//set & get
|
||||
if ((isett == GET_SETTINGS) || ((isett != GET_SETTINGS) && (Server_VerifyLock() == OK))) {
|
||||
if ((isett == GET_SETTINGS) || (Server_VerifyLock() == OK)) {
|
||||
|
||||
// check index
|
||||
switch(isett) {
|
||||
@ -1083,6 +1299,8 @@ int set_settings(int file_des) {
|
||||
#endif
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
|
||||
}
|
||||
|
||||
@ -1229,6 +1447,35 @@ int read_all(int file_des) {
|
||||
FILE_LOG(logDEBUG1, ("Reading all frames\n"));
|
||||
// only set
|
||||
if (Server_VerifyLock() == OK) {
|
||||
#ifdef CHIPTESTBOARDD
|
||||
// read from fifo enabled
|
||||
if (!sendUDP(-1)) {
|
||||
nframes = 0;
|
||||
|
||||
// keep reading frames
|
||||
while(readFrameFromFifo() == OK) {
|
||||
// (to the receiver)
|
||||
Server_SendResult(file_des, INT32, NO_UPDATE, ramValues, dataBytes);// (or get as arg first)send number of bytes (dataBytes) first //FIXME
|
||||
FILE_LOG(logDEBUG1, "Frame %d sent\n", nframes);
|
||||
++nframes;
|
||||
}
|
||||
|
||||
// finished readng frames
|
||||
// frames left to give status
|
||||
int64_t retval = getTimeLeft(FRAME_NUMBER) + 2;
|
||||
if ( retval > 1) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"No data and run stopped: %lld frames left\n",(long long int)retval);
|
||||
FILE_LOG(logERROR, (mess));
|
||||
} else {
|
||||
ret = OK; // send number of bytes (8) first to acknowledge finish of acquisition //FIXME
|
||||
FILE_LOG(logINFOGREEN, ("Acquisition successfully finished\n"));
|
||||
}
|
||||
Server_SendResult(file_des, INT32, UPDATE, NULL, 0); // to the client
|
||||
}
|
||||
// read from receiver
|
||||
else
|
||||
#endif
|
||||
readFrame(&ret, mess);
|
||||
}
|
||||
return Server_SendResult(file_des, INT32, UPDATE, NULL, 0);
|
||||
@ -1249,21 +1496,26 @@ int set_timer(int file_des) {
|
||||
return printSocketReadError();
|
||||
enum timerIndex ind = (int)args[0];
|
||||
int64_t tns = args[1];
|
||||
char timerName[20] = {0};
|
||||
strcpy(timerName, getTimerName(ind));
|
||||
#ifdef EIGERD
|
||||
int64_t subexptime = 0;
|
||||
#endif
|
||||
FILE_LOG(logDEBUG1, ("Setting timer index %d to %lld ns\n", ind, tns));
|
||||
FILE_LOG(logDEBUG1, ("Setting timer %s(%d) to %lld ns\n", ind, timerName, tns));
|
||||
|
||||
// set & get
|
||||
if ((tns == -1) || ((tns != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((tns == -1) || (Server_VerifyLock() == OK)) {
|
||||
|
||||
// check index
|
||||
switch (ind) {
|
||||
case FRAME_NUMBER:
|
||||
#ifndef CHIPTESTBOARDD
|
||||
case ACQUISITION_TIME:
|
||||
#endif
|
||||
case FRAME_PERIOD:
|
||||
case CYCLES_NUMBER:
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
case SAMPLES_JCTB:
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD)
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
#endif
|
||||
retval = setTimer(ind, tns);
|
||||
@ -1305,20 +1557,30 @@ int set_timer(int file_des) {
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
modeNotImplemented("Timer index", (int)ind);
|
||||
modeNotImplemented(timerName, (int)ind);
|
||||
break;
|
||||
}
|
||||
|
||||
// validate
|
||||
sprintf(timerName, "set %s", timerName);
|
||||
#ifdef EIGERD
|
||||
validate64(tns, retval, "set timer", DEC); // copied to server, not read from detector register
|
||||
validate64(tns, retval, timerName, DEC); // copied to server, not read from detector register
|
||||
#else
|
||||
switch(ind) {
|
||||
case FRAME_NUMBER:
|
||||
case CYCLES_NUMBER:
|
||||
case STORAGE_CELL_NUMBER:
|
||||
validate64(tns, retval, "set timer", DEC); // no conversion, so all good
|
||||
validate64(tns, retval, timerName, DEC); // no conversion, so all good
|
||||
break;
|
||||
case SAMPLES_JCTB:
|
||||
if (retval == -1) {
|
||||
ret = FAIL;
|
||||
retval = setTimer(ind, -1);
|
||||
sprintf(mess, "Could not set samples to %lld. Could not allocate RAM\n",
|
||||
(long long unsigned int)tns);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else
|
||||
validate64(tns, retval, timerName, DEC); // no conversion, so all good
|
||||
case ACQUISITION_TIME:
|
||||
case FRAME_PERIOD:
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
@ -1327,11 +1589,12 @@ int set_timer(int file_des) {
|
||||
// losing precision due to conversion to clock (also gotthard master delay is different)
|
||||
if (validateTimer(ind, tns, retval) == FAIL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not set timer. Set %lld, but read %lld\n",
|
||||
sprintf(mess, "Could not %s. Set %lld, but read %lld\n", timerName,
|
||||
(long long unsigned int)tns, (long long unsigned int)retval);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@ -1378,10 +1641,21 @@ int get_time_left(int file_des) {
|
||||
case FRAMES_FROM_START_PG:
|
||||
case ACTUAL_TIME:
|
||||
case MEASUREMENT_TIME:
|
||||
case FRAME_NUMBER:
|
||||
case FRAME_PERIOD:
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
case CYCLES_NUMBER:
|
||||
#elif GOTTHARDD
|
||||
case ACQUISITION_TIME:
|
||||
#endif
|
||||
#if defined(GOTTHARDD) || defined(JUNGFRAUD)
|
||||
case FRAME_NUMBER:
|
||||
case FRAME_PERIOD:
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
case CYCLES_NUMBER:
|
||||
#elif CHIPTESTBOARDD
|
||||
case FRAMES_FROM_START:
|
||||
case FRAMES_FROM_START_PG:
|
||||
case ACTUAL_TIME:
|
||||
case MEASUREMENT_TIME:
|
||||
case FRAME_NUMBER:
|
||||
case FRAME_PERIOD:
|
||||
case DELAY_AFTER_TRIGGER:
|
||||
@ -1414,7 +1688,7 @@ int set_dynamic_range(int file_des) {
|
||||
FILE_LOG(logDEBUG1, ("Setting dr to %d\n", dr));
|
||||
|
||||
// set & get
|
||||
if ((dr == -1) || ((dr != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((dr == -1) || (Server_VerifyLock() == OK)) {
|
||||
|
||||
#ifdef EIGERD
|
||||
int old_dr = setDynamicRange(-1);
|
||||
@ -1480,7 +1754,7 @@ int set_readout_flags(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == GET_READOUT_FLAGS) || ((arg != GET_READOUT_FLAGS) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == GET_READOUT_FLAGS) || (Server_VerifyLock() == OK)) {
|
||||
|
||||
switch(arg) {
|
||||
case STORE_IN_RAM:
|
||||
@ -1493,6 +1767,13 @@ int set_readout_flags(int file_des) {
|
||||
retval = setReadOutFlags(arg);
|
||||
FILE_LOG(logDEBUG1, ("Read out flags: 0x%x\n", retval));
|
||||
validate((int)arg, (int)(retval & arg), "set readout flag", HEX);
|
||||
#ifdef CHIPTESTBOARDD
|
||||
if (retval == -2) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Readout Flags failed. Cannot allocate RAM\n");
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
modeNotImplemented("Read out flag index", (int)arg);
|
||||
@ -1542,20 +1823,26 @@ int set_roi(int file_des) {
|
||||
}
|
||||
}
|
||||
|
||||
#ifndef GOTTHARDD
|
||||
#if !defined(GOTTHARDD) || !defined(CHIPTESTBOARDD)
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((narg == GET_READOUT_FLAGS) || ((narg != GET_READOUT_FLAGS) && (Server_VerifyLock() == OK))) {
|
||||
if (narg > 1) {
|
||||
if ((narg == GET_READOUT_FLAGS) || (Server_VerifyLock() == OK)) {
|
||||
if (myDetectorType == GOTTHARDD && narg > 1) {
|
||||
ret = FAIL;
|
||||
strcpy(mess,"Can not set more than one ROI per module.\n");
|
||||
FILE_LOG(logERROR,(mess));
|
||||
} else {
|
||||
retval = setROI(narg, arg, &nretval, &ret);
|
||||
if (ret == FAIL) {
|
||||
sprintf(mess,"Could not set all roi. "
|
||||
"Set %d rois, but read %d rois\n", narg, nretval);
|
||||
if (nretval == -1) // chip test board
|
||||
sprintf(mess,"Could not set ROI. Max ROI level (100) reached!\n");
|
||||
else if (nretval == -2)
|
||||
sprintf(mess, "Could not set ROI. Could not allocate RAM\n",
|
||||
(long long unsigned int)tns);
|
||||
else
|
||||
sprintf(mess,"Could not set all roi. "
|
||||
"Set %d rois, but read %d rois\n", narg, nretval);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
FILE_LOG(logDEBUG1, ("nRois: %d\n", nretval));
|
||||
@ -1598,31 +1885,52 @@ int set_speed(int file_des) {
|
||||
#else
|
||||
enum speedVariable ind = args[0];
|
||||
int val = args[1];
|
||||
FILE_LOG(logDEBUG1, ("Setting speed index %d to %d\n", ind, val));
|
||||
int GET_VAL = -1;
|
||||
if ((ind == PHASESHIFT) || (val == ADC_PHASE) || (val == DBIT_PHASE))
|
||||
GET_VAL = 100000;
|
||||
|
||||
// set & get
|
||||
if ((val == -1) || ((val != -1) && (Server_VerifyLock() == OK))) {
|
||||
// check index
|
||||
switch(ind) {
|
||||
char speedName[20] = {0};
|
||||
strcpy(speedName, getSpeedName(ind));
|
||||
FILE_LOG(logDEBUG1, ("Setting speed index %s (%d) to %d\n", speedName, ind, val));
|
||||
|
||||
// check index
|
||||
switch(ind) {
|
||||
#ifdef JUNGFRAUD
|
||||
case ADC_PHASE:
|
||||
retval = adcPhase(val);
|
||||
FILE_LOG(logDEBUG1, ("ADc Phase: %d\n", retval));
|
||||
if (val != 100000) {
|
||||
validate(val, retval, "set adc phase ", DEC);
|
||||
}
|
||||
break;
|
||||
case ADC_PHASE:
|
||||
#elif CHIPTESTBOARDD
|
||||
case ADC_PHASE:
|
||||
case PHASE_SHIFT:
|
||||
case DBIT_PHASE:
|
||||
case ADC_CLOCK:
|
||||
case DBIT_CLOCK:
|
||||
case ADC_PIPELINE:
|
||||
case DBIT_PIPELINE:
|
||||
#endif
|
||||
case CLOCK_DIVIDER:
|
||||
retval = setSpeed(val);
|
||||
FILE_LOG(logDEBUG1, ("Clock: %d\n", retval));
|
||||
validate(val, retval, "set clock ", DEC);
|
||||
break;
|
||||
default:
|
||||
modeNotImplemented("Speed index", (int)ind);
|
||||
break;
|
||||
}
|
||||
}
|
||||
case CLOCK_DIVIDER:
|
||||
break;
|
||||
default:
|
||||
modeNotImplemented(speedName, (int)ind);
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret == OK) {
|
||||
// set
|
||||
if ((val != GET_VAL) && (Server_VerifyLock() == OK))
|
||||
setSpeed(ind, val);
|
||||
// get
|
||||
retval = getSpeed(ind);
|
||||
FILE_LOG(logDEBUG1, ("%s: %d\n", speedName, retval));
|
||||
// validate
|
||||
if (GET_VAL == -1) {
|
||||
char validateName[20] = {0};
|
||||
sprintf(validateName, "set %s", speedName);
|
||||
validate(val, retval, validateName, DEC);
|
||||
} else if (ret == OK && val != GET_VAL && retval != val ) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not set %s. Set %d, but read %d\n", speedName, val, retval);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval));
|
||||
@ -2080,7 +2388,7 @@ int enable_ten_giga(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = enableTenGigabitEthernet(arg);
|
||||
FILE_LOG(logDEBUG1, ("10GbE: %d\n", retval));
|
||||
validate(arg, retval, "enable/disable 10GbE", DEC);
|
||||
@ -2127,7 +2435,208 @@ int set_all_trimbits(int file_des) {
|
||||
int set_ctb_pattern(int file_des) {
|
||||
ret = OK;
|
||||
memset(mess, 0, sizeof(mess));
|
||||
int retval32 = -1;
|
||||
int64_t retval64 = -1;
|
||||
int retvals[3] = {-1, -1, -1};
|
||||
|
||||
int mode = -1;
|
||||
// mode 0: control or word
|
||||
int addr = -1;
|
||||
uint64_t word = -1;
|
||||
// mode 1: pattern loop
|
||||
int loopLevel = -1;
|
||||
int startAddr = -1;
|
||||
int stopAddr = -1;
|
||||
int numLoops = -1;
|
||||
// mode 2: wait address
|
||||
// mode 3: wait time
|
||||
uint64_t timeval = -1;
|
||||
// mode 4: set word
|
||||
uint64_t pattern[MAX_PATTERN_LENGTH] = {0};
|
||||
|
||||
if (receiveData(file_des, &mode, sizeof(mode), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
switch (mode) {
|
||||
case 0:// control or word
|
||||
if (receiveData(file_des, &addr, sizeof(addr), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
if (receiveData(file_des, &word, sizeof(word), INT64) < 0)
|
||||
return printSocketReadError();
|
||||
break;
|
||||
case 1:// pattern loop
|
||||
if (receiveData(file_des, &loopLevel, sizeof(loopLevel), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
if (receiveData(file_des, &startAddr, sizeof(startAddr), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
if (receiveData(file_des, &stopAddr, sizeof(stopAddr), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
if (receiveData(file_des, &numLoops, sizeof(numLoops), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
break;
|
||||
case 2: // wait address
|
||||
if (receiveData(file_des, &loopLevel, sizeof(loopLevel), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
if (receiveData(file_des, &addr, sizeof(addr), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
break;
|
||||
case 3:// wait time
|
||||
if (receiveData(file_des, &loopLevel, sizeof(loopLevel), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
if (receiveData(file_des, &t, sizeof(t), INT32) < 0)
|
||||
return printSocketReadError();
|
||||
case 4:// set word
|
||||
if (receiveData(file_des, &pattern, sizeof(pattern), INT64) < 0)
|
||||
return printSocketReadError();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
#ifndef CHIPTESTBOARDD
|
||||
functionNotImplemented();
|
||||
#else
|
||||
FILE_LOG(logDEBUG1, ("Setting Pattern: mode %d\n", mode));
|
||||
char tempName[100];
|
||||
memset(tempName, 0, 100);
|
||||
int failCount = 0;
|
||||
|
||||
switch (mode) {
|
||||
|
||||
case 0:
|
||||
// control or word
|
||||
if ((word == -1) || (Server_VerifyLock() == OK)) {
|
||||
|
||||
// address for set word should be valid (if not -1 or -2, it goes to setword)
|
||||
if (addr < -2 || addr > MAX_PATTERN_LENGTH) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Cannot set Pattern (Word, addr:%d). Addr must be less than %d\n",
|
||||
addr, MAX_PATTERN_LENGTH);
|
||||
FILE_LOG(logERROR, (mess));
|
||||
} else {
|
||||
switch (addr) {
|
||||
case -1:
|
||||
strcpy(tempName, "Pattern (I/O Control Register)");
|
||||
FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word));
|
||||
retval64 = writePatternIOControl(word);
|
||||
break;
|
||||
case -2:
|
||||
strcpy(tempName, "Pattern (Clock Control Register)");
|
||||
FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word));
|
||||
retval64 = writePatternClkControl(word);
|
||||
break;
|
||||
default:
|
||||
sprintf(tempName, "Pattern (Word, addr:0x%x)", addr);
|
||||
FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word));
|
||||
retval64 = writePatternWord(word);
|
||||
break;
|
||||
}
|
||||
FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64));
|
||||
validate64(word, retval64, tempName, HEX);
|
||||
}
|
||||
}
|
||||
return Server_SendResult(file_des, INT64, UPDATE, retval64, sizeof(retval64);
|
||||
|
||||
|
||||
// pattern loop
|
||||
case 1:
|
||||
if (loopLevel < -1 || loopLevel > 2) { // -1 complete pattern
|
||||
modeNotImplemented("Pattern (Pattern Loop) Level", loopLevel);
|
||||
}
|
||||
|
||||
// level 0-2, addr upto patternlength + 1
|
||||
else if ((level != -1) && (startAddr > (MAX_PATTERN_LENGTH + 1) || stopAddr > (MAX_PATTERN_LENGTH + 1))) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n",
|
||||
level, addr, MAX_PATTERN_LENGTH + 1);
|
||||
FILE_LOG(logERROR, (mess));
|
||||
}
|
||||
|
||||
//level -1, addr upto patternlength
|
||||
else if ((level == -1) && (startAddr > MAX_PATTERN_LENGTH || stopAddr > MAX_PATTERN_LENGTH)) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n",
|
||||
addr, MAX_PATTERN_LENGTH);
|
||||
FILE_LOG(logERROR, (mess));
|
||||
}
|
||||
|
||||
else if ((startAddr == -1 && stopAddr == -1 && numLoops == -1) || (Server_VerifyLock() == OK)) {
|
||||
setPatternLoop(loopLevel, &startAddr, &stopAddr, &numLoops);
|
||||
}
|
||||
retval[0] = startAddr;
|
||||
retval[1] = stopAddr;
|
||||
retval[2] = numLoops;
|
||||
return Server_SendResult(file_des, INT32, UPDATE, retvals, sizeof(retvals);
|
||||
|
||||
|
||||
case 2:
|
||||
// wait address
|
||||
if ((addr == -1) || (Server_VerifyLock() == OK)) {
|
||||
if (loopLevel < 0 || loopLevel > 2) {
|
||||
modeNotImplemented("Pattern (Wait Address) Level", loopLevel);
|
||||
} else if (addr > (MAX_PATTERN_LENGTH + 1)) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Cannot set Pattern (Wait Address, addr:%d). Addr must be less than %d\n",
|
||||
addr, MAX_PATTERN_LENGTH + 1);
|
||||
FILE_LOG(logERROR, (mess));
|
||||
} else {
|
||||
sprintf(tempName, "Pattern (Wait Address, Level:%d)", loopLevel);
|
||||
FILE_LOG(logDEBUG1, ("Setting %s to 0x%x\n", tempName, addr));
|
||||
retval32 = setPatternWaitAddress(loopLevel, addr);
|
||||
FILE_LOG(logDEBUG1, ("%s: 0x%x\n", tempName, retval32));
|
||||
validate(addr, retval32, tempName, HEX);
|
||||
}
|
||||
}
|
||||
return Server_SendResult(file_des, INT32, UPDATE, retval32, sizeof(retval32);
|
||||
|
||||
|
||||
case 3:
|
||||
// wait time
|
||||
if ((timeval == -1) || (Server_VerifyLock() == OK)) {
|
||||
if (loopLevel < 0 || loopLevel > 2) {
|
||||
modeNotImplemented("Pattern (Wait Time) Level", loopLevel);
|
||||
} else {
|
||||
sprintf(tempName, "Pattern (Wait Time, Level:%d)", loopLevel);
|
||||
FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int)timeval));
|
||||
retval64 = setPatternWaitTime(loopLevel, timeval);
|
||||
FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64));
|
||||
validate64(timeval, retval64, tempName, HEX);
|
||||
}
|
||||
}
|
||||
return Server_SendResult(file_des, INT64, UPDATE, retval64, sizeof(retval64);
|
||||
|
||||
|
||||
case 4:
|
||||
// set word array(set only)
|
||||
if (Server_VerifyLock() == OK) {
|
||||
FILE_LOG(logDEBUG1, ("Setting Pattern (Word Array)\n"));
|
||||
failCount = 0;
|
||||
int iaddr = 0; // if warning change to addr // FIXME
|
||||
for (iaddr = 0; iaddr < MAX_PATTERN_LENGTH; ++iaddr) {
|
||||
sprintf(tempName, "Pattern (Word Array, addr:%d)", iaddr);
|
||||
FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) pattern[iaddr]));
|
||||
retval64 = writePatternWord(iaddr, pattern[iaddr]);//FIXME: earlier was word, but makes no sense (random value)
|
||||
FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64));
|
||||
validate64(pattern[iaddr], retval64, tempName, HEX);
|
||||
if (ret == FAIL) {
|
||||
++failCount;
|
||||
ret = OK;
|
||||
}
|
||||
}
|
||||
if (failCount) {
|
||||
ret = FAIL;
|
||||
sprintf(mess, "Could not set Pattern (Word Array) %d addresses.\n", failCount);
|
||||
FILE_LOG(logERROR,(mess));
|
||||
}
|
||||
}
|
||||
return Server_SendResult(file_des, INT64, UPDATE, NULL, 0);
|
||||
|
||||
|
||||
default:
|
||||
modeNotImplemented("Pattern mode index", mode);
|
||||
break;
|
||||
}
|
||||
|
||||
#endif
|
||||
return Server_SendResult(file_des, INT32, UPDATE, NULL, 0);
|
||||
}
|
||||
|
||||
@ -2364,7 +2873,7 @@ int set_network_parameter(int file_des) {
|
||||
enum NETWORKINDEX serverIndex = 0;
|
||||
|
||||
// set & get
|
||||
if ((value == -1) || ((value != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((value == -1) || (Server_VerifyLock() == OK)) {
|
||||
// check index
|
||||
switch (mode) {
|
||||
#ifdef EIGERD
|
||||
@ -2572,7 +3081,7 @@ int power_chip(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = powerChip(arg);
|
||||
FILE_LOG(logDEBUG1, ("Power chip: %d\n", retval));
|
||||
validate(arg, retval, "power on/off chip", DEC);
|
||||
@ -2605,7 +3114,7 @@ int set_activate(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = activate(arg);
|
||||
FILE_LOG(logDEBUG1, ("Activate: %d\n", retval));
|
||||
validate(arg, retval, "set activate", DEC);
|
||||
@ -2655,7 +3164,7 @@ int threshold_temp(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
if (arg > MAX_THRESHOLD_TEMP_VAL) {
|
||||
ret = FAIL;
|
||||
sprintf(mess,"Threshold Temp %d should be in range: 0 - %d\n",
|
||||
@ -2689,7 +3198,7 @@ int temp_control(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = setTemperatureControl(arg);
|
||||
FILE_LOG(logDEBUG1, ("Temperature control: %d\n", retval));
|
||||
validate(arg, retval, "set temperature control", DEC);
|
||||
@ -2715,7 +3224,7 @@ int temp_event(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = setTemperatureEvent(arg);
|
||||
FILE_LOG(logDEBUG1, ("Temperature event: %d\n", retval));
|
||||
validate(arg, retval, "set temperature event", DEC);
|
||||
@ -2742,7 +3251,7 @@ int auto_comp_disable(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
retval = autoCompDisable(arg);
|
||||
FILE_LOG(logDEBUG1, ("Auto comp disable: %d\n", retval));
|
||||
validate(arg, retval, "set auto comp disable", DEC);
|
||||
@ -2769,7 +3278,7 @@ int storage_cell_start(int file_des) {
|
||||
functionNotImplemented();
|
||||
#else
|
||||
// set & get
|
||||
if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) {
|
||||
if ((arg == -1) || (Server_VerifyLock() == OK)) {
|
||||
if (arg > MAX_STORAGE_CELL_VAL) {
|
||||
ret = FAIL;
|
||||
strcpy(mess,"Max Storage cell number should not exceed 15\n");
|
||||
|
||||
@ -7,6 +7,8 @@ enum numberMode {DEC, HEX};
|
||||
int printSocketReadError();
|
||||
void init_detector();
|
||||
int decode_function(int);
|
||||
const char* getTimerName(enum timerIndex ind);
|
||||
const char* getSpeedName(enum speedVariable ind);
|
||||
const char* getFunctionName(enum detFuncs func);
|
||||
void function_table();
|
||||
void functionNotImplemented();
|
||||
|
||||
@ -1,46 +0,0 @@
|
||||
/* A simple server in the internet domain using TCP
|
||||
The port number is passed as an argument */
|
||||
#include "communication_funcs.h"
|
||||
|
||||
#include "slsDetectorFunctionList.h"/*#include "slsDetector_firmware.h" for the time being*/
|
||||
#include "slsDetectorServer_defs.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
int sockfd;
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
int portno;
|
||||
int retval=0;
|
||||
int sd,fd;
|
||||
|
||||
portno = DEFAULT_PORTNO;
|
||||
|
||||
|
||||
sd=bindSocket(portno); //defined in communication_funcs
|
||||
if (getServerError(sd)) //defined in communication_funcs
|
||||
return -1;
|
||||
|
||||
|
||||
|
||||
/* waits for connection */
|
||||
while(retval!=GOODBYE) {
|
||||
#ifdef VERBOSE
|
||||
printf("\n");
|
||||
#endif
|
||||
#ifdef VERY_VERBOSE
|
||||
printf("Stop server: waiting for client call\n");
|
||||
#endif
|
||||
fd=acceptConnection(sd); //defined in communication_funcs
|
||||
retval=stopStateMachine();//defined in slsDetectorFirmare_funcs
|
||||
closeConnection(fd); //defined in communication_funcs
|
||||
}
|
||||
|
||||
exitServer(sd); //defined in communication_funcs
|
||||
printf("Goodbye!\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -1 +0,0 @@
|
||||
../commonFiles/sls_detector_defs.h
|
||||
@ -1 +0,0 @@
|
||||
../commonFiles/sls_detector_funcs.h
|
||||
Reference in New Issue
Block a user