diff --git a/slsDetectorGui/src/qDetectorMain.cpp b/slsDetectorGui/src/qDetectorMain.cpp index 3e51fd452..3823b3c9f 100644 --- a/slsDetectorGui/src/qDetectorMain.cpp +++ b/slsDetectorGui/src/qDetectorMain.cpp @@ -287,7 +287,7 @@ void qDetectorMain::SetUpDetector(const string fName){ case slsDetectorDefs::PROPIX: case slsDetectorDefs::MOENCH: case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: actionLoadTrimbits->setText("Load Settings"); actionSaveTrimbits->setText("Save Settings"); break; default: diff --git a/slsDetectorGui/src/qDrawPlot.cpp b/slsDetectorGui/src/qDrawPlot.cpp index c997bad99..97ad8662f 100644 --- a/slsDetectorGui/src/qDrawPlot.cpp +++ b/slsDetectorGui/src/qDrawPlot.cpp @@ -75,7 +75,7 @@ void qDrawPlot::SetupWidgetWindow(){ case slsDetectorDefs::PROPIX: case slsDetectorDefs::MOENCH: case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: originally2D = true; break; default: @@ -121,7 +121,7 @@ void qDrawPlot::SetupWidgetWindow(){ nPixelsX = myDet->getTotalNumberOfChannelsInclGapPixels(slsDetectorDefs::X); nPixelsY = myDet->getTotalNumberOfChannelsInclGapPixels(slsDetectorDefs::Y); - if (detType == slsDetectorDefs::JUNGFRAUCTB) { + if (detType == slsDetectorDefs::CHIPTESTBOARD) { npixelsy_jctb = (myDet->setTimer(slsDetectorDefs::SAMPLES_JCTB, -1) * 2)/25;// for moench 03 nPixelsX = npixelsx_jctb; nPixelsY = npixelsy_jctb; @@ -585,7 +585,7 @@ void qDrawPlot::SetScanArgument(int scanArg){ minPixelsY = 0; nPixelsX = myDet->getTotalNumberOfChannelsInclGapPixels(slsDetectorDefs::X); nPixelsY = myDet->getTotalNumberOfChannelsInclGapPixels(slsDetectorDefs::Y); - if (detType == slsDetectorDefs::JUNGFRAUCTB) { + if (detType == slsDetectorDefs::CHIPTESTBOARD) { npixelsy_jctb = (myDet->setTimer(slsDetectorDefs::SAMPLES_JCTB, -1) * 2)/25; // for moench 03 nPixelsX = npixelsx_jctb; nPixelsY = npixelsy_jctb; @@ -2216,7 +2216,7 @@ void qDrawPlot::toDoublePixelData(double* dest, char* source,int size, int datab break; case 16: - if (detType == slsDetectorDefs::JUNGFRAU || detType == slsDetectorDefs::JUNGFRAUCTB) { + if (detType == slsDetectorDefs::JUNGFRAU || detType == slsDetectorDefs::CHIPTESTBOARD) { // show gain plot if(gaindest!=NULL) { diff --git a/slsDetectorGui/src/qTabActions.cpp b/slsDetectorGui/src/qTabActions.cpp index 37a8f7693..2ed3dc68c 100644 --- a/slsDetectorGui/src/qTabActions.cpp +++ b/slsDetectorGui/src/qTabActions.cpp @@ -185,7 +185,7 @@ void qTabActions::SetupWidgetWindow(){ (detType == slsDetectorDefs::AGIPD) || (detType == slsDetectorDefs::PROPIX) || (detType == slsDetectorDefs::JUNGFRAU) || - (detType == slsDetectorDefs::JUNGFRAUCTB) || + (detType == slsDetectorDefs::CHIPTESTBOARD) || (detType == slsDetectorDefs::MOENCH)) { lblName[NumPositions]->setEnabled(false); btnExpand[NumPositions]->setEnabled(false); diff --git a/slsDetectorGui/src/qTabAdvanced.cpp b/slsDetectorGui/src/qTabAdvanced.cpp index 486a86bd0..78c5316be 100644 --- a/slsDetectorGui/src/qTabAdvanced.cpp +++ b/slsDetectorGui/src/qTabAdvanced.cpp @@ -125,7 +125,7 @@ void qTabAdvanced::SetupWidgetWindow(){ boxRxr->setEnabled(true); break; case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: isEnergy = false; isAngular = false; lblIP->setEnabled(true); diff --git a/slsDetectorGui/src/qTabDataOutput.cpp b/slsDetectorGui/src/qTabDataOutput.cpp index afea98b82..02e644ea8 100644 --- a/slsDetectorGui/src/qTabDataOutput.cpp +++ b/slsDetectorGui/src/qTabDataOutput.cpp @@ -897,7 +897,7 @@ void qTabDataOutput::SetupFileFormat(){ case slsDetectorDefs::PROPIX: case slsDetectorDefs::GOTTHARD: case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: item[(int)slsDetectorDefs::BINARY]->setEnabled(true); item[(int)slsDetectorDefs::ASCII]->setEnabled(false); item[(int)slsDetectorDefs::HDF5]->setEnabled(true); diff --git a/slsDetectorGui/src/qTabDebugging.cpp b/slsDetectorGui/src/qTabDebugging.cpp index 66fe8ff4c..4b0830fea 100644 --- a/slsDetectorGui/src/qTabDebugging.cpp +++ b/slsDetectorGui/src/qTabDebugging.cpp @@ -74,7 +74,7 @@ void qTabDebugging::SetupWidgetWindow(){ chkModuleFirmware->setEnabled(false); break; case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: case slsDetectorDefs::PROPIX: case slsDetectorDefs::GOTTHARD: lblDetector->setText("Module:"); @@ -344,7 +344,7 @@ void qTabDebugging::GetInfo(){ case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: //display widget formLayout->addWidget(new QLabel("Module:"),0,0); formLayout->addItem(new QSpacerItem(15,20,QSizePolicy::Fixed,QSizePolicy::Fixed),0,1); @@ -474,7 +474,7 @@ void qTabDebugging::SetParameters(QTreeWidgetItem *item){ case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: case slsDetectorDefs::PROPIX: case slsDetectorDefs::MOENCH: case slsDetectorDefs::GOTTHARD: @@ -524,7 +524,7 @@ void qTabDebugging::TestDetector(){ break; case slsDetectorDefs::EIGER: Detector = "Half Module"; break; case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: case slsDetectorDefs::MOENCH: case slsDetectorDefs::PROPIX: case slsDetectorDefs::GOTTHARD: Detector = "Module"; break; diff --git a/slsDetectorGui/src/qTabDeveloper.cpp b/slsDetectorGui/src/qTabDeveloper.cpp index af10d1fd6..0df8aeb2a 100644 --- a/slsDetectorGui/src/qTabDeveloper.cpp +++ b/slsDetectorGui/src/qTabDeveloper.cpp @@ -148,7 +148,7 @@ void qTabDeveloper::SetupWidgetWindow() { case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: NUM_DAC_WIDGETS = 8; NUM_ADC_WIDGETS = 1; dacNames.push_back("v vb comp:"); @@ -472,7 +472,7 @@ slsDetectorDefs::dacIndex qTabDeveloper::getSLSIndex(int index){ } break; case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: switch(index){ case 0: @@ -527,7 +527,7 @@ void qTabDeveloper::RefreshAdcs(){ if(value == -1) spinAdcs[i]->setText(QString("Different values")); else { - if(detType == slsDetectorDefs::EIGER || detType == slsDetectorDefs::JUNGFRAU || detType == slsDetectorDefs::JUNGFRAUCTB) + if(detType == slsDetectorDefs::EIGER || detType == slsDetectorDefs::JUNGFRAU || detType == slsDetectorDefs::CHIPTESTBOARD) value/=1000.00; spinAdcs[i]->setText(QString::number(value,'f',2)+0x00b0+QString("C")); } @@ -536,7 +536,7 @@ void qTabDeveloper::RefreshAdcs(){ else{ double value = (double)det->getADC(getSLSIndex(i+NUM_DAC_WIDGETS)); - if(detType == slsDetectorDefs::EIGER || detType == slsDetectorDefs::JUNGFRAU || detType == slsDetectorDefs::JUNGFRAUCTB) + if(detType == slsDetectorDefs::EIGER || detType == slsDetectorDefs::JUNGFRAU || detType == slsDetectorDefs::CHIPTESTBOARD) value/=1000.00; spinAdcs[i]->setText(QString::number(value,'f',2)+0x00b0+QString("C")); } diff --git a/slsDetectorGui/src/qTabMeasurement.cpp b/slsDetectorGui/src/qTabMeasurement.cpp index c142577c9..2b525407f 100644 --- a/slsDetectorGui/src/qTabMeasurement.cpp +++ b/slsDetectorGui/src/qTabMeasurement.cpp @@ -74,7 +74,7 @@ void qTabMeasurement::SetupWidgetWindow(){ comboDelayUnit->setCurrentIndex((int)unit); } //gates - if ((detType == slsDetectorDefs::EIGER) || (detType == slsDetectorDefs::JUNGFRAU) || (detType == slsDetectorDefs::JUNGFRAUCTB)) { + if ((detType == slsDetectorDefs::EIGER) || (detType == slsDetectorDefs::JUNGFRAU) || (detType == slsDetectorDefs::CHIPTESTBOARD)) { lblNumGates->setEnabled(false); spinNumGates->setEnabled(false); } else @@ -154,7 +154,7 @@ void qTabMeasurement::SetupTimingMode(){ case slsDetectorDefs::PROPIX: case slsDetectorDefs::GOTTHARD: case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: item[(int)Trigger_Exp_Series]->setEnabled(true); item[(int)Trigger_Readout]->setEnabled(false); item[(int)Gated]->setEnabled(false); @@ -292,7 +292,7 @@ void qTabMeasurement::Initialization(){ } //Number of Gates - if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::JUNGFRAUCTB)) + if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::CHIPTESTBOARD)) connect(spinNumGates,SIGNAL(valueChanged(int)), this, SLOT(setNumGates(int))); //Number of Probes @@ -790,7 +790,7 @@ void qTabMeasurement::Refresh(){ disconnect(spinDelay, SIGNAL(valueChanged(double)), this, SLOT(setDelay())); disconnect(comboDelayUnit, SIGNAL(currentIndexChanged(int)), this, SLOT(setDelay())); } - if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::JUNGFRAUCTB)) + if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::CHIPTESTBOARD)) disconnect(spinNumGates, SIGNAL(valueChanged(int)), this, SLOT(setNumGates(int))); #ifdef VERBOSE @@ -824,7 +824,7 @@ void qTabMeasurement::Refresh(){ time = qDefs::getCorrectTime(unit,((double)(myDet->setTimer(slsDetectorDefs::DELAY_AFTER_TRIGGER,-1)*(1E-9)))); //gates - if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::JUNGFRAUCTB) ) + if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::CHIPTESTBOARD) ) spinNumGates->setValue((int)myDet->setTimer(slsDetectorDefs::GATES_NUMBER,-1)); @@ -862,7 +862,7 @@ void qTabMeasurement::Refresh(){ connect(spinDelay, SIGNAL(valueChanged(double)), this, SLOT(setDelay())); connect(comboDelayUnit, SIGNAL(currentIndexChanged(int)), this, SLOT(setDelay())); } - if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::JUNGFRAUCTB)) + if ((detType != slsDetectorDefs::EIGER) && (detType != slsDetectorDefs::JUNGFRAU) && (detType != slsDetectorDefs::CHIPTESTBOARD)) connect(spinNumGates, SIGNAL(valueChanged(int)), this, SLOT(setNumGates(int))); //timing mode - will also check if exptime>acq period and also enableprobes() diff --git a/slsDetectorGui/src/qTabPlot.cpp b/slsDetectorGui/src/qTabPlot.cpp index cbcda6ec5..e42c117d6 100644 --- a/slsDetectorGui/src/qTabPlot.cpp +++ b/slsDetectorGui/src/qTabPlot.cpp @@ -183,7 +183,7 @@ void qTabPlot::SetupWidgetWindow(){ isOriginallyOneD = false; break; case slsDetectorDefs::JUNGFRAU: - case slsDetectorDefs::JUNGFRAUCTB: + case slsDetectorDefs::CHIPTESTBOARD: isOriginallyOneD = false; chkGainPlot->setEnabled(true); break; @@ -1120,7 +1120,7 @@ void qTabPlot::EnableScanBox(){ if((myDet->getDetectorsType() == slsDetectorDefs::GOTTHARD) || (myDet->getDetectorsType() == slsDetectorDefs::PROPIX) || (myDet->getDetectorsType() == slsDetectorDefs::JUNGFRAU) || - (myDet->getDetectorsType() == slsDetectorDefs::JUNGFRAUCTB) || + (myDet->getDetectorsType() == slsDetectorDefs::CHIPTESTBOARD) || (myDet->getDetectorsType() == slsDetectorDefs::MOENCH)){ pagePedestal->setEnabled(true); pagePedestal_2->setEnabled(true); diff --git a/slsDetectorGui/src/qTabSettings.cpp b/slsDetectorGui/src/qTabSettings.cpp index c2e226052..1f9985080 100644 --- a/slsDetectorGui/src/qTabSettings.cpp +++ b/slsDetectorGui/src/qTabSettings.cpp @@ -38,7 +38,7 @@ void qTabSettings::SetupWidgetWindow(){ detType=myDet->getDetectorsType(); // Settings - if (detType != slsDetectorDefs::JUNGFRAUCTB) { + if (detType != slsDetectorDefs::CHIPTESTBOARD) { SetupDetectorSettings(); } else comboSettings->setEnabled(false); @@ -210,7 +210,7 @@ void qTabSettings::SetupDetectorSettings(){ void qTabSettings::Initialization(){ // Settings - if (detType != slsDetectorDefs::JUNGFRAUCTB) + if (detType != slsDetectorDefs::CHIPTESTBOARD) connect(comboSettings, SIGNAL(currentIndexChanged(int)), this, SLOT(setSettings(int))); // Number of Modules connect(spinNumModules, SIGNAL(valueChanged(int)), this, SLOT(SetNumberOfModules(int))); @@ -322,7 +322,7 @@ void qTabSettings::Refresh(){ cout << endl << "**Updating Settings Tab" << endl; #endif - if (detType != slsDetectorDefs::JUNGFRAUCTB) + if (detType != slsDetectorDefs::CHIPTESTBOARD) disconnect(comboSettings, SIGNAL(currentIndexChanged(int)), this, SLOT(setSettings(int))); disconnect(spinNumModules, SIGNAL(valueChanged(int)), this, SLOT(SetNumberOfModules(int))); disconnect(spinThreshold, SIGNAL(valueChanged(int)), this, SLOT(SetEnergy())); @@ -342,7 +342,7 @@ void qTabSettings::Refresh(){ GetDynamicRange(); // Settings - if (detType != slsDetectorDefs::JUNGFRAUCTB) { + if (detType != slsDetectorDefs::CHIPTESTBOARD) { #ifdef VERBOSE cout << "Getting settings" << endl; #endif @@ -369,7 +369,7 @@ void qTabSettings::Refresh(){ } } - if (detType != slsDetectorDefs::JUNGFRAUCTB) + if (detType != slsDetectorDefs::CHIPTESTBOARD) connect(comboSettings, SIGNAL(currentIndexChanged(int)), this, SLOT(setSettings(int))); connect(spinNumModules, SIGNAL(valueChanged(int)), this, SLOT(SetNumberOfModules(int))); connect(spinThreshold, SIGNAL(valueChanged(int)), this, SLOT(SetEnergy())); diff --git a/slsDetectorServers/ctbDetectorServer/AD7689.h b/slsDetectorServers/ctbDetectorServer/AD7689.h new file mode 120000 index 000000000..fe4d6e3ce --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/AD7689.h @@ -0,0 +1 @@ +../slsDetectorServer/AD7689.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/AD9257.h b/slsDetectorServers/ctbDetectorServer/AD9257.h new file mode 120000 index 000000000..87b70e097 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/AD9257.h @@ -0,0 +1 @@ +../slsDetectorServer/AD9257.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/I2C.h b/slsDetectorServers/ctbDetectorServer/I2C.h new file mode 120000 index 000000000..88ae4a2f3 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/I2C.h @@ -0,0 +1 @@ +../slsDetectorServer/I2C.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/INA226.h b/slsDetectorServers/ctbDetectorServer/INA226.h new file mode 120000 index 000000000..685ac1f8f --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/INA226.h @@ -0,0 +1 @@ +../slsDetectorServer/INA226.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/Makefile b/slsDetectorServers/ctbDetectorServer/Makefile new file mode 100755 index 000000000..3f277af24 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/Makefile @@ -0,0 +1,31 @@ +CROSS = bfin-uclinux- +CC = $(CROSS)gcc +CFLAGS += -Wall -DCHIPTESTBOARDD -DSTOP_SERVER #-DJCTB -DVERBOSEI #-DVERBOSE +LDLIBS += -lm -lstdc++ + +PROGS = ctbDetectorServer +DESTDIR ?= bin +INSTMODE = 0777 + +SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c +OBJS = $(SRC_CLNT:.c=.o) + +all: clean versioning $(PROGS) + +boot: $(OBJS) + +versioning: + @echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;` + +$(PROGS): $(OBJS) +# echo $(OBJS) + mkdir -p $(DESTDIR) + $(CC) -o $@ $^ $(CFLAGS) $(LDLIBS) + mv $(PROGS) $(DESTDIR) + rm *.gdb + +clean: + rm -rf $(DESTDIR)/$(PROGS) *.o *.gdb + + + \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/Makefile.virtual b/slsDetectorServers/ctbDetectorServer/Makefile.virtual new file mode 100644 index 000000000..cfaacf70e --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/Makefile.virtual @@ -0,0 +1,27 @@ +CC = gcc +CFLAGS += -Wall -DCHIPTESTBOARDD -DVIRTUAL -DSTOP_SERVER #-DVERBOSEI #-DVERBOSE +LDLIBS += -lm -lstdc++ -pthread + +PROGS = ctbDetectorServer_virtual +DESTDIR ?= bin +INSTMODE = 0777 + +SRC_CLNT = communication_funcs.c slsDetectorServer.c slsDetectorServer_funcs.c slsDetectorFunctionList.c +OBJS = $(SRC_CLNT:.c=.o) + +all: clean versioning $(PROGS) + +boot: $(OBJS) + +versioning: + @echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;` + +$(PROGS): $(OBJS) +# echo $(OBJS) + mkdir -p $(DESTDIR) + $(CC) -o $@ $^ $(CFLAGS) $(LDLIBS) + mv $(PROGS) $(DESTDIR) + +clean: + rm -rf $(DESTDIR)/$(PROGS) *.o + diff --git a/slsDetectorServers/ctbDetectorServer/RegisterDefs.h b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h new file mode 100644 index 000000000..c6cd37964 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/RegisterDefs.h @@ -0,0 +1,538 @@ +#pragma once + +/* Definitions for FPGA */ +#ifdef JCTB +#define MEM_MAP_SHIFT 11 +#else +#define MEM_MAP_SHIFT 1 +#endif + +/* FPGA Version RO register */ +#define FPGA_VERSION_REG (0x00 << MEM_MAP_SHIFT) + +#define FPGA_VERSION_BRD_RVSN_OFST (0) +#define FPGA_VERSION_BRD_RVSN_MSK (0x00FFFFFF << FPGA_VERSION_BRD_RVSN_OFST) +#define FPGA_VERSION_DTCTR_TYP_OFST (24) +#define FPGA_VERSION_DTCTR_TYP_MSK (0x000000FF << FPGA_VERSION_DTCTR_TYP_OFST) +#define FPGA_VERSION_DTCTR_TYP_JCTB_VAL ((0x2 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK) +#define FPGA_VERSION_DTCTR_TYP_CTB_VAL ((0x3 << FPGA_VERSION_DTCTR_TYP_OFST) & FPGA_VERSION_DTCTR_TYP_MSK) + +/* Fix pattern RO register */ +#define FIX_PATT_REG (0x01 << MEM_MAP_SHIFT) + +#define FIX_PATT_VAL (0xACDC2014) + +/* Status RO register */ +#define STATUS_REG (0x02 << MEM_MAP_SHIFT) + +#define STATUS_RN_BSY_OFST (0) +#define STATUS_RN_BSY_MSK (0x00000001 << STATUS_RN_BSY_OFST) +#define STATUS_RDT_BSY_OFST (1) +#define STATUS_RDT_BSY_MSK (0x00000001 << STATUS_RDT_BSY_OFST) +//#define STATUS_FF_TST_BSY_OFST (2) +//#define STATUS_FF_TST_BSY_MSK (0x00000001 << STATUS_FF_TST_BSY_OFST) +#define STATUS_WTNG_FR_TRGGR_OFST (3) +#define STATUS_WTNG_FR_TRGGR_MSK (0x00000001 << STATUS_WTNG_FR_TRGGR_OFST) +#define STATUS_DLY_BFR_OFST (4) +#define STATUS_DLY_BFR_MSK (0x00000001 << STATUS_DLY_BFR_OFST) +#define STATUS_DLY_AFTR_OFST (5) +#define STATUS_DLY_AFTR_MSK (0x00000001 << STATUS_DLY_AFTR_OFST) +#define STATUS_EXPSNG_OFST (6) +#define STATUS_EXPSNG_MSK (0x00000001 << STATUS_EXPSNG_OFST) +#define STATUS_CNT_ENBL_OFST (7) +#define STATUS_CNT_ENBL_MSK (0x00000001 << STATUS_CNT_ENBL_OFST) +#define STATUS_SM_FF_FLL_OFST (11) +#define STATUS_SM_FF_FLL_MSK (0x00000001 << STATUS_SM_FF_FLL_OFST) +#define STATUS_STPPD_OFST (15) +#define STATUS_STPPD_MSK (0x00000001 << STATUS_STPPD_OFST) +#define STATUS_ALL_FF_EMPTY_OFST (16) +#define STATUS_ALL_FF_EMPTY_MSK (0x00000001 << STATUS_ALL_FF_EMPTY_OFST) +#define STATUS_CYCL_RN_BSY_OFST (17) +#define STATUS_CYCL_RN_BSY_MSK (0x00000001 << STATUS_CYCL_RN_BSY_OFST) +#define STATUS_FRM_RN_BSY_OFST (18) +#define STATUS_FRM_RN_BSY_MSK (0x00000001 << STATUS_FRM_RN_BSY_OFST) +#define STATUS_ADC_DESERON_OFST (19) +#define STATUS_ADC_DESERON_MSK (0x00000001 << STATUS_ADC_DESERON_OFST) +#define STATUS_PLL_RCNFG_BSY_OFST (20) +#define STATUS_PLL_RCNFG_BSY_MSK (0x00000001 << STATUS_PLL_RCNFG_BSY_OFST) +#define STATUS_DT_STRMNG_BSY_OFST (21) +#define STATUS_DT_STRMNG_BSY_MSK (0x00000001 << STATUS_DT_STRMNG_BSY_OFST) +#define STATUS_FRM_PCKR_BSY_OFST (22) +#define STATUS_FRM_PCKR_BSY_MSK (0x00000001 << STATUS_FRM_PCKR_BSY_OFST) +#define STATUS_PLL_PHS_DN_OFST (23) +#define STATUS_PLL_PHS_DN_MSK (0x00000001 << STATUS_PLL_PHS_DN_OFST) +#define STATUS_PT_CNTRL_STTS_OFF_OFST (24) +#define STATUS_PT_CNTRL_STTS_OFF_MSK (0x000000FF << STATUS_PT_CNTRL_STTS_OFF_OFST) +#define STATUS_IDLE_MSK (0x7FFFF) + +/* Look at me RO register TODO */ +#define LOOK_AT_ME_REG (0x03 << MEM_MAP_SHIFT) + +/* System Status RO register */ +#define SYSTEM_STATUS_REG (0x04 << MEM_MAP_SHIFT) + +#define SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST (0) +#define SYSTEM_STATUS_DDR3_CLBRTN_OK_MSK (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_OK_OFST) +#define SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST (1) +#define SYSTEM_STATUS_DDR3_CLBRTN_FL_MSK (0x00000001 << SYSTEM_STATUS_DDR3_CLBRTN_FL_OFST) +#define SYSTEM_STATUS_DDR3_INT_DN_OFST (2) +#define SYSTEM_STATUS_DDR3_INT_DN_MSK (0x00000001 << SYSTEM_STATUS_DDR3_INT_DN_OFST) +#define SYSTEM_STATUS_RCNFG_PLL_LCK_OFST (3) +#define SYSTEM_STATUS_RCNFG_PLL_LCK_MSK (0x00000001 << SYSTEM_STATUS_RCNFG_PLL_LCK_OFST) +#define SYSTEM_STATUS_PLL_A_LCK_OFST (4) +#define SYSTEM_STATUS_PLL_A_LCK_MSK (0x00000001 << SYSTEM_STATUS_PLL_A_LCK_OFST) + +/* PLL Param (Reconfiguratble PLL Parameter) RO register TODO FIXME: Same as PLL_PARAM_REG 0x50 */ +//#define PLL_PARAM_REG (0x05 << MEM_MAP_SHIFT) + +/* FIFO Data RO register TODO */ +#define FIFO_DATA_REG (0x06 << MEM_MAP_SHIFT) + +#define FIFO_DATA_HRDWR_SRL_NMBR_OFST (0) +#define FIFO_DATA_HRDWR_SRL_NMBR_MSK (0x0000FFFF << FIFO_DATA_HRDWR_SRL_NMBR_OFST) +//0xCACA#define FIFO_DATA_WRD_OFST (16) +//0xCACA#define FIFO_DATA_WRD_MSK (0x0000FFFF << FIFO_DATA_WRD_OFST) + +/* FIFO Status RO register TODO */ +#define FIFO_STATUS_REG (0x07 << MEM_MAP_SHIFT) + +/* FIFO Empty RO register TODO */ +#define FIFO_EMPTY_REG (0x08 << MEM_MAP_SHIFT) + +/* FIFO Full RO register TODO */ +#define FIFO_FULL_REG (0x09 << MEM_MAP_SHIFT) + +/* MCB Serial Number RO register */ +#define MOD_SERIAL_NUMBER_REG (0x0A << MEM_MAP_SHIFT) + +#define MOD_SERIAL_NUMBER_OFST (0) +#define MOD_SERIAL_NUMBER_MSK (0x000000FF << MOD_SERIAL_NUMBER_OFST) +#define MOD_SERIAL_NUMBER_VRSN_OFST (16) +#define MOD_SERIAL_NUMBER_VRSN_MSK (0x0000003F << MOD_SERIAL_NUMBER_VRSN_OFST) + +/* API Version RO register */ +#define API_VERSION_REG (0x0F << MEM_MAP_SHIFT) + +#define API_VERSION_OFST (0) +#define API_VERSION_MSK (0x00FFFFFF << API_VERSION_OFST) +#define API_VERSION_DTCTR_TYP_OFST (24) +#define API_VERSION_DTCTR_TYP_MSK (0x000000FF << API_VERSION_DTCTR_TYP_OFST) + +/* Time from Start 64 bit RO register. t = GCLK x 50 ns. Reset using CONTROL_CRST. TODO */ +#define TIME_FROM_START_LSB_REG (0x10 << MEM_MAP_SHIFT) +#define TIME_FROM_START_MSB_REG (0x11 << MEM_MAP_SHIFT) + +/* Delay Left 64 bit RO register. t = DLY x 50 ns. TODO */ +#define DELAY_LEFT_LSB_REG (0x12 << MEM_MAP_SHIFT) +#define DELAY_LEFT_MSB_REG (0x13 << MEM_MAP_SHIFT) + +/* Cycles Left 64 bit RO register TODO */ +#define CYCLES_LEFT_LSB_REG (0x14 << MEM_MAP_SHIFT) +#define CYCLES_LEFT_MSB_REG (0x15 << MEM_MAP_SHIFT) + +/* Frames Left 64 bit RO register TODO */ +#define FRAMES_LEFT_LSB_REG (0x16 << MEM_MAP_SHIFT) +#define FRAMES_LEFT_MSB_REG (0x17 << MEM_MAP_SHIFT) + +/* Period Left 64 bit RO register. t = T x 50 ns. TODO */ +#define PERIOD_LEFT_LSB_REG (0x18 << MEM_MAP_SHIFT) +#define PERIOD_LEFT_MSB_REG (0x19 << MEM_MAP_SHIFT) + +/* Exposure Time Left 64 bit RO register */ +//#define EXPTIME_LEFT_LSB_REG (0x1A << MEM_MAP_SHIFT) // Not used in FW +//#define EXPTIME_LEFT_MSB_REG (0x1B << MEM_MAP_SHIFT) // Not used in FW + +/* Gates Left 64 bit RO register */ +//#define GATES_LEFT_LSB_REG (0x1C << MEM_MAP_SHIFT) // Not used in FW +//#define GATES_LEFT_MSB_REG (0x1D << MEM_MAP_SHIFT) // Not used in FW + +/* Data In 64 bit RO register TODO */ +#define DATA_IN_LSB_REG (0x1E << MEM_MAP_SHIFT) +#define DATA_IN_MSB_REG (0x1F << MEM_MAP_SHIFT) + +/* Pattern Out 64 bit RO register */ +#define PATTERN_OUT_LSB_REG (0x20 << MEM_MAP_SHIFT) +#define PATTERN_OUT_MSB_REG (0x21 << MEM_MAP_SHIFT) + +/* Frames From Start 64 bit RO register TODO */ +//#define FRAMES_FROM_START_LSB_REG (0x22 << MEM_MAP_SHIFT) // Not used in FW +//#define FRAMES_FROM_START_MSB_REG (0x23 << MEM_MAP_SHIFT) // Not used in FW + +/* Frames From Start PG 64 bit RO register. Reset using CONTROL_CRST. TODO */ +#define FRAMES_FROM_START_PG_LSB_REG (0x24 << MEM_MAP_SHIFT) +#define FRAMES_FROM_START_PG_MSB_REG (0x25 << MEM_MAP_SHIFT) + +/* Start Frame Time (Measurement Time) 64 bit register (timestamp at a frame start until reset) TODO */ +#define START_FRAME_TIME_LSB_REG (0x26 << MEM_MAP_SHIFT) +#define START_FRAME_TIME_MSB_REG (0x27 << MEM_MAP_SHIFT) + +/* Power Status RO register */ +#define POWER_STATUS_REG (0x29 << MEM_MAP_SHIFT) + +#define POWER_STATUS_ALRT_OFST (27) +#define POWER_STATUS_ALRT_MSK (0x0000001F << POWER_STATUS_ALRT_OFST) + +/* DAC Value Out RO register */ +//#define DAC_VAL_OUT_REG (0x2A << MEM_MAP_SHIFT) + +/* ADC Value RO register */ +#define ADC_VAL_REG (0x2B << MEM_MAP_SHIFT) + +/* FIFO Digital In Status RO register */ +#define FIFO_DIN_STATUS_REG (0x3B << MEM_MAP_SHIFT) + +/* FIFO Digital In 64 bit RO register */ +#define FIFO_DIN_LSB_REG (0x3C << MEM_MAP_SHIFT) +#define FIFO_DIN_MSB_REG (0x3D << MEM_MAP_SHIFT) + +/* SPI (Serial Peripheral Interface) DAC, HV RW register */ +#define SPI_REG (0x40 << MEM_MAP_SHIFT) + +#define SPI_DAC_SRL_DGTL_OTPT_OFST (0) +#define SPI_DAC_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_DAC_SRL_DGTL_OTPT_OFST) +#define SPI_DAC_SRL_CLK_OTPT_OFST (1) +#define SPI_DAC_SRL_CLK_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CLK_OTPT_OFST) +#define SPI_DAC_SRL_CS_OTPT_OFST (2) +#define SPI_DAC_SRL_CS_OTPT_MSK (0x00000001 << SPI_DAC_SRL_CS_OTPT_OFST) +#define SPI_HV_SRL_DGTL_OTPT_OFST (8) +#define SPI_HV_SRL_DGTL_OTPT_MSK (0x00000001 << SPI_HV_SRL_DGTL_OTPT_OFST) +#define SPI_HV_SRL_CLK_OTPT_OFST (9) +#define SPI_HV_SRL_CLK_OTPT_MSK (0x00000001 << SPI_HV_SRL_CLK_OTPT_OFST) +#define SPI_HV_SRL_CS_OTPT_OFST (10) +#define SPI_HV_SRL_CS_OTPT_MSK (0x00000001 << SPI_HV_SRL_CS_OTPT_OFST) +#define SPI_IDLE_MSK (SPI_DAC_SRL_DGTL_OTPT_MSK | SPI_DAC_SRL_CLK_OTPT_MSK | SPI_DAC_SRL_CS_OTPT_MSK | SPI_HV_SRL_DGTL_OTPT_MSK | SPI_HV_SRL_CLK_OTPT_MSK | SPI_HV_SRL_CS_OTPT_MSK) + +/* ADC SPI (Serial Peripheral Interface) RW register */ +#define ADC_SPI_REG (0x41 << MEM_MAP_SHIFT) + +#define ADC_SPI_SRL_CLK_OTPT_OFST (0) +#define ADC_SPI_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SRL_CLK_OTPT_OFST) +#define ADC_SPI_SRL_DT_OTPT_OFST (1) +#define ADC_SPI_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SRL_DT_OTPT_OFST) +#define ADC_SPI_SRL_CS_OTPT_OFST (2) +#define ADC_SPI_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SRL_CS_OTPT_OFST) +#define ADC_SPI_SLOW_SRL_DT_OTPT_OFST (8) +#define ADC_SPI_SLOW_SRL_DT_OTPT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_DT_OTPT_OFST) +#define ADC_SPI_SLOW_SRL_CLK_OTPT_OFST (9) +#define ADC_SPI_SLOW_SRL_CLK_OTPT_MSK (0x00000001 << ADC_SPI_SLOW_SRL_CLK_OTPT_OFST) +#define ADC_SPI_SLOW_SRL_CS_OTPT_OFST (10) +#define ADC_SPI_SLOW_SRL_CS_OTPT_MSK (0x0000000F << ADC_SPI_SLOW_SRL_CS_OTPT_OFST) +#define ADC_SPI_IDLE_MSK (ADC_SPI_SRL_CLK_OTPT_MSK | ADC_SPI_SRL_DT_OTPT_MSK | ADC_SPI_SRL_CS_OTPT_MSK | ADC_SPI_SLOW_SRL_DT_OTPT_MSK | ADC_SPI_SLOW_SRL_CLK_OTPT_MSK | ADC_SPI_SLOW_SRL_CS_OTPT_MSK) + + +/* ADC Offset RW register */ +#define ADC_OFFSET_REG (0x42 << MEM_MAP_SHIFT) + +#define ADC_OFFSET_ADC_PPLN_OFST (0) +#define ADC_OFFSET_ADC_PPLN_MSK (0x000000FF << ADC_OFFSET_ADC_PPLN_OFST) +#define ADC_OFFSET_DBT_PPLN_OFST (16) +#define ADC_OFFSET_DBT_PPLN_MSK (0x000000FF << ADC_OFFSET_DBT_PPLN_OFST) + +/* ADC Port Invert RW register */ +#define ADC_PORT_INVERT_REG (0x43 << MEM_MAP_SHIFT) + +#define ADC_PORT_INVERT_0_INPT_OFST (0) +#define ADC_PORT_INVERT_0_INPT_MSK (0x000000FF << ADC_PORT_INVERT_0_INPT_OFST) +#define ADC_PORT_INVERT_1_INPT_OFST (8) +#define ADC_PORT_INVERT_1_INPT_MSK (0x000000FF << ADC_PORT_INVERT_1_INPT_OFST) +#define ADC_PORT_INVERT_2_INPT_OFST (16) +#define ADC_PORT_INVERT_2_INPT_MSK (0x000000FF << ADC_PORT_INVERT_2_INPT_OFST) +#define ADC_PORT_INVERT_3_INPT_OFST (24) +#define ADC_PORT_INVERT_3_INPT_MSK (0x000000FF << ADC_PORT_INVERT_3_INPT_OFST) + +/* Dummy RW register */ +#define DUMMY_REG (0x44 << MEM_MAP_SHIFT) + +#define DUMMY_FIFO_CHNNL_SLCT_OFST (0) +#define DUMMY_FIFO_CHNNL_SLCT_MSK (0x0000003F << DUMMY_FIFO_CHNNL_SLCT_OFST) +#define DUMMY_ALL_FIFO_RD_STRBE_OFST (8) +#define DUMMY_ALL_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_ALL_FIFO_RD_STRBE_OFST) +#define DUMMY_DGTL_FIFO_RD_STRBE_OFST (9) +#define DUMMY_DGTL_FIFO_RD_STRBE_MSK (0x00000001 << DUMMY_DGTL_FIFO_RD_STRBE_OFST) + +/* Receiver IP Address RW register */ +#define RX_IP_REG (0x45 << MEM_MAP_SHIFT) + +/* UDP Port RW register */ +#define UDP_PORT_REG (0x46 << MEM_MAP_SHIFT) + +#define UDP_PORT_RX_OFST (0) +#define UDP_PORT_RX_MSK (0x0000FFFF << UDP_PORT_RX_OFST) +#define UDP_PORT_TX_OFST (16) +#define UDP_PORT_TX_MSK (0x0000FFFF << UDP_PORT_TX_OFST) + +/* Receiver Mac Address 64 bit RW register */ +#define RX_MAC_LSB_REG (0x47 << MEM_MAP_SHIFT) +#define RX_MAC_MSB_REG (0x48 << MEM_MAP_SHIFT) + +#define RX_MAC_LSB_OFST (0) +#define RX_MAC_LSB_MSK (0xFFFFFFFF << RX_MAC_LSB_OFST) +#define RX_MAC_MSB_OFST (0) +#define RX_MAC_MSB_MSK (0x0000FFFF << RX_MAC_MSB_OFST) + +/* Detector/ Transmitter Mac Address 64 bit RW register */ +#define TX_MAC_LSB_REG (0x49 << MEM_MAP_SHIFT) +#define TX_MAC_MSB_REG (0x4A << MEM_MAP_SHIFT) + +#define TX_MAC_LSB_OFST (0) +#define TX_MAC_LSB_MSK (0xFFFFFFFF << TX_MAC_LSB_OFST) +#define TX_MAC_MSB_OFST (0) +#define TX_MAC_MSB_MSK (0x0000FFFF << TX_MAC_MSB_OFST) + +/* Detector/ Transmitter IP Address RW register */ +#define TX_IP_REG (0x4B << MEM_MAP_SHIFT) + +/* Detector/ Transmitter IP Checksum RW register */ +#define TX_IP_CHECKSUM_REG (0x4C << MEM_MAP_SHIFT) + +#define TX_IP_CHECKSUM_OFST (0) +#define TX_IP_CHECKSUM_MSK (0x0000FFFF << TX_IP_CHECKSUM_OFST) + +/* Configuration RW register */ +#define CONFIG_REG (0x4D << MEM_MAP_SHIFT) + +#define CONFIG_LED_DSBL_OFST (0) +#define CONFIG_LED_DSBL_MSK (0x00000001 << CONFIG_LED_DSBL_OFST) +#define CONFIG_DSBL_ANLG_OTPT_OFST (8) +#define CONFIG_DSBL_ANLG_OTPT_MSK (0x00000001 << CONFIG_DSBL_ANLG_OTPT_OFST) +#define CONFIG_ENBLE_DGTL_OTPT_OFST (9) +#define CONFIG_ENBLE_DGTL_OTPT_MSK (0x00000001 << CONFIG_ENBLE_DGTL_OTPT_OFST) +#define CONFIG_GB10_SND_UDP_OFST (12) +#define CONFIG_GB10_SND_UDP_MSK (0x00000001 << CONFIG_GB10_SND_UDP_OFST) + +/* External Signal RW register */ +#define EXT_SIGNAL_REG (0x4E << MEM_MAP_SHIFT) + +#define EXT_SIGNAL_OFST (0) +#define EXT_SIGNAL_MSK (0x00000001 << EXT_SIGNAL_OFST) +#define EXT_SIGNAL_AUTO_VAL ((0x0 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) +#define EXT_SIGNAL_TRGGR_VAL ((0x1 << EXT_SIGNAL_OFST) & EXT_SIGNAL_MSK) + +/* Control RW register */ +#define CONTROL_REG (0x4F << MEM_MAP_SHIFT) + +#define CONTROL_STRT_ACQSTN_OFST (0) +#define CONTROL_STRT_ACQSTN_MSK (0x00000001 << CONTROL_STRT_ACQSTN_OFST) +#define CONTROL_STP_ACQSTN_OFST (1) +#define CONTROL_STP_ACQSTN_MSK (0x00000001 << CONTROL_STP_ACQSTN_OFST) +//#define CONTROL_STRT_FF_TST_OFST (2) +//#define CONTROL_STRT_FF_TST_MSK (0x00000001 << CONTROL_STRT_FF_TST_OFST) +//#define CONTROL_STP_FF_TST_OFST (3) +//#define CONTROL_STP_FF_TST_MSK (0x00000001 << CONTROL_STP_FF_TST_OFST) +//#define CONTROL_STRT_RDT_OFST (4) +//#define CONTROL_STRT_RDT_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +//#define CONTROL_STP_RDT_OFST (5) +//#define CONTROL_STP_RDT_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +#define CONTROL_STRT_EXPSR_OFST (6) +#define CONTROL_STRT_EXPSR_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +//#define CONTROL_STP_EXPSR_OFST (7) +//#define CONTROL_STP_EXPSR_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +//#define CONTROL_STRT_TRN_OFST (8) +//#define CONTROL_STRT_TRN_MSK (0x00000001 << CONTROL_STRT_RDT_OFST) +//#define CONTROL_STP_TRN_OFST (9) +//#define CONTROL_STP_TRN_MSK (0x00000001 << CONTROL_STP_RDT_OFST) +#define CONTROL_CRE_RST_OFST (10) +#define CONTROL_CRE_RST_MSK (0x00000001 << CONTROL_CRE_RST_OFST) +#define CONTROL_PRPHRL_RST_OFST (11) // Only GBE10? +#define CONTROL_PRPHRL_RST_MSK (0x00000001 << CONTROL_PRPHRL_RST_OFST) +#define CONTROL_MMRY_RST_OFST (12) +#define CONTROL_MMRY_RST_MSK (0x00000001 << CONTROL_MMRY_RST_OFST) +//#define CONTROL_PLL_RCNFG_WR_OFST (13) +//#define CONTROL_PLL_RCNFG_WR_MSK (0x00000001 << CONTROL_PLL_RCNFG_WR_OFST) +#define CONTROL_SND_10GB_PCKT_OFST (14) +#define CONTROL_SND_10GB_PCKT_MSK (0x00000001 << CONTROL_SND_10GB_PCKT_OFST) +#define CONTROL_CLR_ACQSTN_FIFO_OFST (15) +#define CONTROL_CLR_ACQSTN_FIFO_MSK (0x00000001 << CONTROL_CLR_ACQSTN_FIFO_OFST) + +/* Reconfiguratble PLL Paramater RW register */ +#define PLL_PARAM_REG (0x50 << MEM_MAP_SHIFT) + +/* Reconfiguratble PLL Control RW regiser */ +#define PLL_CNTRL_REG (0x51 << MEM_MAP_SHIFT) + +#define PLL_CNTRL_RCNFG_PRMTR_RST_OFST (0) +#define PLL_CNTRL_RCNFG_PRMTR_RST_MSK (0x00000001 << PLL_CNTRL_RCNFG_PRMTR_RST_OFST) +#define PLL_CNTRL_WR_PRMTR_OFST (2) +#define PLL_CNTRL_WR_PRMTR_MSK (0x00000001 << PLL_CNTRL_WR_PRMTR_OFST) +#define PLL_CNTRL_PLL_RST_OFST (3) +#define PLL_CNTRL_PLL_RST_MSK (0x00000001 << PLL_CNTRL_PLL_RST_OFST) +#define PLL_CNTRL_ADDR_OFST (16) +#define PLL_CNTRL_ADDR_MSK (0x0000003F << PLL_CNTRL_ADDR_OFST) + +/* Pattern Control RW register */ +#define PATTERN_CNTRL_REG (0x52 << MEM_MAP_SHIFT) + +#define PATTERN_CNTRL_WR_OFST (0) +#define PATTERN_CNTRL_WR_MSK (0x00000001 << PATTERN_CNTRL_WR_OFST) +#define PATTERN_CNTRL_RD_OFST (1) +#define PATTERN_CNTRL_RD_MSK (0x00000001 << PATTERN_CNTRL_RD_OFST) +#define PATTERN_CNTRL_ADDR_OFST (16) +#define PATTERN_CNTRL_ADDR_MSK (0x0000FFFF << PATTERN_CNTRL_ADDR_OFST) + +/* Pattern Limit RW regiser */ +#define PATTERN_LIMIT_REG (0x53 << MEM_MAP_SHIFT) + +/* Pattern Loop 0 Address RW regiser */ +#define PATTERN_LOOP_0_ADDR_REG (0x54 << MEM_MAP_SHIFT) + +#define PATTERN_LOOP_0_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_0_ADDR_STRT_MSK (0x0000FFFF << PATTERN_LOOP_0_ADDR_STRT_OFST) +#define PATTERN_LOOP_0_ADDR_STP_OFST (16) +#define PATTERN_LOOP_0_ADDR_STP_MSK (0x0000FFFF << PATTERN_LOOP_0_ADDR_STP_OFST) + +/* Pattern Loop 0 Iteration RW regiser */ +#define PATTERN_LOOP_0_ITERATION_REG (0x55 << MEM_MAP_SHIFT) + +/* Pattern Loop 1 Address RW regiser */ +#define PATTERN_LOOP_1_ADDR_REG (0x56 << MEM_MAP_SHIFT) + +#define PATTERN_LOOP_1_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_1_ADDR_STRT_MSK (0x0000FFFF << PATTERN_LOOP_1_ADDR_STRT_OFST) +#define PATTERN_LOOP_1_ADDR_STP_OFST (16) +#define PATTERN_LOOP_1_ADDR_STP_MSK (0x0000FFFF << PATTERN_LOOP_1_ADDR_STP_OFST) + +/* Pattern Loop 1 Iteration RW regiser */ +#define PATTERN_LOOP_1_ITERATION_REG (0x57 << MEM_MAP_SHIFT) + +/* Pattern Loop 2 Address RW regiser */ +#define PATTERN_LOOP_2_ADDR_REG (0x58 << MEM_MAP_SHIFT) + +#define PATTERN_LOOP_2_ADDR_STRT_OFST (0) +#define PATTERN_LOOP_2_ADDR_STRT_MSK (0x0000FFFF << PATTERN_LOOP_2_ADDR_STRT_OFST) +#define PATTERN_LOOP_2_ADDR_STP_OFST (16) +#define PATTERN_LOOP_2_ADDR_STP_MSK (0x0000FFFF << PATTERN_LOOP_2_ADDR_STP_OFST) + +/* Pattern Loop 2 Iteration RW regiser */ +#define PATTERN_LOOP_2_ITERATION_REG (0x59 << MEM_MAP_SHIFT) + +/* Pattern Wait 0 RW regiser */ +#define PATTERN_WAIT_0_ADDR_REG (0x5A << MEM_MAP_SHIFT) + +#define PATTERN_WAIT_0_ADDR_OFST (0) +#define PATTERN_WAIT_0_ADDR_MSK (0x0000FFFF << PATTERN_WAIT_0_ADDR_OFST) +//FIXME: is mask 3FF + +/* Pattern Wait 1 RW regiser */ +#define PATTERN_WAIT_1_ADDR_REG (0x5B << MEM_MAP_SHIFT) + +#define PATTERN_WAIT_1_ADDR_OFST (0) +#define PATTERN_WAIT_1_ADDR_MSK (0x0000FFFF << PATTERN_WAIT_1_ADDR_OFST) + +/* Pattern Wait 2 RW regiser */ +#define PATTERN_WAIT_2_ADDR_REG (0x5C << MEM_MAP_SHIFT) + +#define PATTERN_WAIT_2_ADDR_OFST (0) +#define PATTERN_WAIT_2_ADDR_MSK (0x0000FFFF << PATTERN_WAIT_2_ADDR_OFST) + +/* Samples RW register */ +#define SAMPLES_REG (0x5D << MEM_MAP_SHIFT) + +/** Power RW register */ +#define POWER_REG (0x5E << MEM_MAP_SHIFT) + +#define POWER_ENBL_VLTG_RGLTR_OFST (16) +#define POWER_ENBL_VLTG_RGLTR_MSK (0x0000001F << POWER_ENBL_VLTG_RGLTR_OFST) +#define POWER_HV_SLCT_OFST (31) +#define POWER_HV_SLCT_MSK (0x00000001 << POWER_HV_SLCT_OFST) + +/* Number of Words RW register TODO */ +#define NUMBER_OF_WORDS_REG (0x5F << MEM_MAP_SHIFT) + + +/* Delay 64 bit RW register. t = DLY x 50 ns. */ +#define DELAY_LSB_REG (0x60 << MEM_MAP_SHIFT) +#define DELAY_MSB_REG (0x61 << MEM_MAP_SHIFT) + +/* Cycles 64 bit RW register */ +#define CYCLES_LSB_REG (0x62 << MEM_MAP_SHIFT) +#define CYCLES_MSB_REG (0x63 << MEM_MAP_SHIFT) + +/* Frames 64 bit RW register */ +#define FRAMES_LSB_REG (0x64 << MEM_MAP_SHIFT) +#define FRAMES_MSB_REG (0x65 << MEM_MAP_SHIFT) + +/* Period 64 bit RW register */ +#define PERIOD_LSB_REG (0x66 << MEM_MAP_SHIFT) +#define PERIOD_MSB_REG (0x67 << MEM_MAP_SHIFT) + +/* Period 64 bit RW register */ +//#define EXPTIME_LSB_REG (0x68 << MEM_MAP_SHIFT) // Not used in FW +//#define EXPTIME_MSB_REG (0x69 << MEM_MAP_SHIFT) // Not used in FW + +/* Gates 64 bit RW register */ +//#define GATES_LSB_REG (0x6A << MEM_MAP_SHIFT) // Not used in FW +//#define GATES_MSB_REG (0x6B << MEM_MAP_SHIFT) // Not used in FW + +/* Pattern IO Control 64 bit RW regiser + * Each bit configured as output(1)/ input(0) */ +#define PATTERN_IO_CNTRL_LSB_REG (0x6C << MEM_MAP_SHIFT) +#define PATTERN_IO_CNTRL_MSB_REG (0x6D << MEM_MAP_SHIFT) + +/* Pattern IO Clock Control 64 bit RW regiser + * When bit n enabled (1), clocked output for DIO[n] (T run clock) + * When bit n disabled (0), Dio[n] driven by its pattern output */ +#define PATTERN_IO_CLK_CNTRL_LSB_REG (0x6E << MEM_MAP_SHIFT) +#define PATTERN_IO_CLK_CNTRL_MSB_REG (0x6F << MEM_MAP_SHIFT) + +/* Pattern In 64 bit RW register */ +#define PATTERN_IN_LSB_REG (0x70 << MEM_MAP_SHIFT) +#define PATTERN_IN_MSB_REG (0x71 << MEM_MAP_SHIFT) + +/* Pattern Wait Timer 0 64 bit RW register. t = PWT1 x T run clock */ +#define PATTERN_WAIT_TIMER_0_LSB_REG (0x72 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_0_MSB_REG (0x73 << MEM_MAP_SHIFT) + +/* Pattern Wait Timer 1 64 bit RW register. t = PWT2 x T run clock */ +#define PATTERN_WAIT_TIMER_1_LSB_REG (0x74 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_1_MSB_REG (0x75 << MEM_MAP_SHIFT) + +/* Pattern Wait Timer 2 64 bit RW register. t = PWT3 x T run clock */ +#define PATTERN_WAIT_TIMER_2_LSB_REG (0x76 << MEM_MAP_SHIFT) +#define PATTERN_WAIT_TIMER_2_MSB_REG (0x77 << MEM_MAP_SHIFT) + +/* ADC Disable RW register TODO */ +#define ADC_DISABLE_REG (0x78 << MEM_MAP_SHIFT) + +/* DAC Value RW register TODO */ +//#define DAC_VALUE_REG (0x79 << MEM_MAP_SHIFT) + +/* DAC Number RW register TODO */ +//#define DAC_NUMBER_REG (0x7A << MEM_MAP_SHIFT) + +/* Digital Bit External Trigger RW register */ +#define DBIT_EXT_TRG_REG (0x7B << MEM_MAP_SHIFT) + +#define DBIT_EXT_TRG_SRC_OFST (0) +#define DBIT_EXT_TRG_SRC_MSK (0x0000003F << DBIT_EXT_TRG_SRC_OFST) +#define DBIT_EXT_TRG_OPRTN_MD_OFST (16) +#define DBIT_EXT_TRG_OPRTN_MD_MSK (0x00000001 << DBIT_EXT_TRG_OPRTN_MD_OFST) + +/* Pin Delay 0 RW register */ +#define PIN_DELAY_0_REG (0x7C << MEM_MAP_SHIFT) + +#define PIN_DELAY_0_OTPT_STTNG_OFST (0) //t = OTPT_STTNG * 25 ps, max for Cyclone V = 775 ps +#define PIN_DELAY_0_OTPT_STTNG_MSK (0x0000001F << PIN_DELAY_0_OFST) +#define PIN_DELAY_0_OTPT_TRGGR_OFST (31) +#define PIN_DELAY_0_OTPT_TRGGR_MSK (0x00000001 << PIN_DELAY_0_OFST) +#define PIN_DELAY_0_OTPT_TRGGR_LD_VAL (1) +#define PIN_DELAY_0_OTPT_TRGGR_STRT_VAL (0) + +/* Pin Delay 1 RW register + * Each bit configured as enable for dynamic output delay configuration */ +#define PIN_DELAY_1_REG (0x7D << MEM_MAP_SHIFT) + +/** I2C Control register */ +#define I2C_TRANSFER_COMMAND_FIFO_REG (0x100 << MEM_MAP_SHIFT) +#define I2C_CONTROL_REG (0x102 << MEM_MAP_SHIFT) +#define I2C_RX_DATA_FIFO_LEVEL_REG (0x107 << MEM_MAP_SHIFT) +#define I2C_SCL_LOW_COUNT_REG (0x108 << MEM_MAP_SHIFT) +#define I2C_SCL_HIGH_COUNT_REG (0x109 << MEM_MAP_SHIFT) +#define I2C_SDA_HOLD_REG (0x10A << MEM_MAP_SHIFT) +//fixme: upto 0x10f + + + + + + + diff --git a/slsDetectorServers/ctbDetectorServer/ansi.h b/slsDetectorServers/ctbDetectorServer/ansi.h new file mode 120000 index 000000000..4a82d0575 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/ansi.h @@ -0,0 +1 @@ +../../slsSupportLib/include/ansi.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/blackfin.h b/slsDetectorServers/ctbDetectorServer/blackfin.h new file mode 120000 index 000000000..2873c7dc6 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/blackfin.h @@ -0,0 +1 @@ +../slsDetectorServer/blackfin.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/commonServerFunctions.h b/slsDetectorServers/ctbDetectorServer/commonServerFunctions.h new file mode 120000 index 000000000..33bdd8d53 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/commonServerFunctions.h @@ -0,0 +1 @@ +../slsDetectorServer/commonServerFunctions.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/communication_funcs.c b/slsDetectorServers/ctbDetectorServer/communication_funcs.c new file mode 120000 index 000000000..30435fdc4 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/communication_funcs.c @@ -0,0 +1 @@ +../slsDetectorServer/communication_funcs.c \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/communication_funcs.h b/slsDetectorServers/ctbDetectorServer/communication_funcs.h new file mode 120000 index 000000000..c0c144994 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/communication_funcs.h @@ -0,0 +1 @@ +../slsDetectorServer/communication_funcs.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/gitInfoCtb.h b/slsDetectorServers/ctbDetectorServer/gitInfoCtb.h new file mode 100644 index 000000000..07e4aa9c6 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/gitInfoCtb.h @@ -0,0 +1,6 @@ +#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git" +#define GITREPUUID "91dd176a0fb314f583ca6e29140053f1eb742896" +#define GITAUTH "Dhanya_Thattil" +#define GITREV 0x4166 +#define GITDATE 0x20181108 +#define GITBRANCH "refactor" diff --git a/slsDetectorServers/jctbDetectorServer/gitInfoMoenchTmp.h b/slsDetectorServers/ctbDetectorServer/gitInfoCtbTmp.h similarity index 100% rename from slsDetectorServers/jctbDetectorServer/gitInfoMoenchTmp.h rename to slsDetectorServers/ctbDetectorServer/gitInfoCtbTmp.h diff --git a/slsDetectorServers/ctbDetectorServer/logger.h b/slsDetectorServers/ctbDetectorServer/logger.h new file mode 120000 index 000000000..ff1930ce3 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/logger.h @@ -0,0 +1 @@ +../slsDetectorServer/logger.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/programfpga.h b/slsDetectorServers/ctbDetectorServer/programfpga.h new file mode 120000 index 000000000..72c54d21d --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/programfpga.h @@ -0,0 +1 @@ +../slsDetectorServer/programfpga.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c new file mode 100644 index 000000000..a794942fd --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.c @@ -0,0 +1,2353 @@ +#include "slsDetectorFunctionList.h" +#include "gitInfoCtb.h" +#include "versionAPI.h" +#include "logger.h" + +#ifndef VIRTUAL +#include "AD9257.h" // commonServerFunctions.h, blackfin.h, ansi.h +#include "AD7689.h" // slow adcs +#include "INA226.h" // i2c +#include "programfpga.h" +#else +#include "blackfin.h" +#include +#include // usleep +#include +#include +#endif + +// Global variable from slsDetectorServer_funcs +extern int debugflag; +extern int dataBytes; +extern uint16_t *ramValues; + +int firmware_compatibility = OK; +int firmware_check_done = 0; +char firmware_message[MAX_STR_LENGTH]; + +#ifdef VIRTUAL +pthread_t pthread_virtual_tid; +int virtual_status = 0; +int virtual_stop = 0; +#endif + + +int32_t clkPhase[NUM_CLOCKS] = {0, 0, 0, 0}; +uint32_t clkDivider[NUM_CLOCKS] = {40, 20, 20, 200}; + +int dacValues[NDAC] = {0}; +// software limit that depends on the current chip on the ctb +int vLimit = 0; + +int highvoltage = 0; +ROI rois[MAX_ROIS]; +int nROI = 0; +uint32_t adcDisableMask = 0; +int analogEnable = 1; +int digitalEnable = 0; +int nSamples = 1; +char volatile *now_ptr = 0; + +int isFirmwareCheckDone() { + return firmware_check_done; +} + +int getFirmwareCheckResult(char** mess) { + *mess = firmware_message; + return firmware_compatibility; +} + +void basictests() { + firmware_compatibility = OK; + firmware_check_done = 0; + memset(firmware_message, 0, MAX_STR_LENGTH); +#ifdef VIRTUAL + FILE_LOG(logINFOBLUE, ("******** %s Virtual Server *****************\n", DETNAME)); + if (mapCSP0() == FAIL) { + strcpy(firmware_message, + "Could not map to memory. Dangerous to continue.\n"); + FILE_LOG(logERROR, (firmware_message)); + firmware_compatibility = FAIL; + firmware_check_done = 1; + return; + } + firmware_check_done = 1; + return; +#else + + defineGPIOpins(); + resetFPGA(); + if (mapCSP0() == FAIL) { + strcpy(firmware_message, + "Could not map to memory. Dangerous to continue.\n"); + FILE_LOG(logERROR, ("%s\n\n", firmware_message)); + firmware_compatibility = FAIL; + firmware_check_done = 1; + return; + } + + // does check only if flag is 0 (by default), set by command line + if ((!debugflag) && ((checkType() == FAIL) || (testFpga() == FAIL) || (testBus() == FAIL))) { + strcpy(firmware_message, + "Could not pass basic tests of FPGA and bus. Dangerous to continue.\n"); + FILE_LOG(logERROR, ("%s\n\n", firmware_message)); + firmware_compatibility = FAIL; + firmware_check_done = 1; + return; + } + + uint16_t hversion = getHardwareVersionNumber(); + uint16_t hsnumber = getHardwareSerialNumber(); + uint32_t ipadd = getDetectorIP(); + uint64_t macadd = getDetectorMAC(); + int64_t fwversion = getDetectorId(DETECTOR_FIRMWARE_VERSION); + int64_t swversion = getDetectorId(DETECTOR_SOFTWARE_VERSION); + int64_t sw_fw_apiversion = 0; + int64_t client_sw_apiversion = getDetectorId(CLIENT_SOFTWARE_API_VERSION); + + + if (fwversion >= MIN_REQRD_VRSN_T_RD_API) + sw_fw_apiversion = getDetectorId(SOFTWARE_FIRMWARE_API_VERSION); + FILE_LOG(logINFOBLUE, ("************ %s Server *********************\n" + "Hardware Version:\t\t 0x%x\n" + "Hardware Serial Nr:\t\t 0x%x\n" + + "Detector IP Addr:\t\t 0x%x\n" + "Detector MAC Addr:\t\t 0x%llx\n\n" + + "Firmware Version:\t\t 0x%llx\n" + "Software Version:\t\t 0x%llx\n" + "F/w-S/w API Version:\t\t 0x%llx\n" + "Required Firmware Version:\t 0x%x\n" + "Client-Software API Version:\t 0x%llx\n" + "********************************************************\n", + DETNAME, + hversion, hsnumber, + ipadd, + (long long unsigned int)macadd, + (long long int)fwversion, + (long long int)swversion, + (long long int)sw_fw_apiversion, + REQRD_FRMWR_VRSN, + (long long int)client_sw_apiversion + )); + + // return if flag is not zero, debug mode + if (debugflag) { + firmware_check_done = 1; + return; + } + + + //cant read versions + FILE_LOG(logINFO, ("Testing Firmware-software compatibility:\n")); + if(!fwversion || !sw_fw_apiversion){ + strcpy(firmware_message, + "Cant read versions from FPGA. Please update firmware.\n"); + FILE_LOG(logERROR, (firmware_message)); + firmware_compatibility = FAIL; + firmware_check_done = 1; + return; + } + + //check for API compatibility - old server + if(sw_fw_apiversion > REQRD_FRMWR_VRSN){ + sprintf(firmware_message, + "This detector software software version (0x%llx) is incompatible.\n" + "Please update detector software (min. 0x%llx) to be compatible with this firmware.\n", + (long long int)sw_fw_apiversion, + (long long int)REQRD_FRMWR_VRSN); + FILE_LOG(logERROR, (firmware_message)); + firmware_compatibility = FAIL; + firmware_check_done = 1; + return; + } + + //check for firmware compatibility - old firmware + if( REQRD_FRMWR_VRSN > fwversion) { + sprintf(firmware_message, + "This firmware version (0x%llx) is incompatible.\n" + "Please update firmware (min. 0x%llx) to be compatible with this server.\n", + (long long int)fwversion, + (long long int)REQRD_FRMWR_VRSN); + FILE_LOG(logERROR, (firmware_message)); + firmware_compatibility = FAIL; + firmware_check_done = 1; + return; + } + FILE_LOG(logINFO, ("Compatibility - success\n")); + firmware_check_done = 1; +#endif +} + +int checkType() { +#ifdef VIRTUAL + return OK; +#endif + uint32_t type = ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_DTCTR_TYP_MSK) >> FPGA_VERSION_DTCTR_TYP_OFST); + + uint32_t expectedType = FPGA_VERSION_DTCTR_TYP_CTB_VAL; +#ifdef JCTB + expectedType = FPGA_VERSION_DTCTR_TYP_JCTB_VAL; +#endif + + if (type != expectedType) { + FILE_LOG(logERROR, ("This is not a %s Server (read %d, expected %d)\n", + DETNAME, type, expectedType)); + return FAIL; + } + return OK; +} + +uint32_t testFpga(void) { +#ifdef VIRTUAL + return OK; +#endif + FILE_LOG(logINFO, ("Testing FPGA:\n")); + + //fixed pattern + int ret = OK; + uint32_t val = bus_r(FIX_PATT_REG); + if (val == FIX_PATT_VAL) { + FILE_LOG(logINFO, ("Fixed pattern: successful match (0x%08x)\n",val)); + } else { + FILE_LOG(logERROR, ("Fixed pattern does not match! Read 0x%08x, expected 0x%08x\n", val, FIX_PATT_VAL)); + ret = FAIL; + } + + if (ret == OK) { + // Delay LSB reg + FILE_LOG(logINFO, ("\tTesting Delay LSB Register:\n")); + uint32_t addr = DELAY_LSB_REG; + + // store previous delay value + uint32_t previousValue = bus_r(addr); + + volatile uint32_t val = 0, readval = 0; + int times = 1000 * 1000; + int i = 0; + for (i = 0; i < times; ++i) { + val = 0x5A5A5A5A - i; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + FILE_LOG(logERROR, ("1:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + val = (i + (i << 10) + (i << 20)); + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + FILE_LOG(logERROR, ("2:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + val = 0x0F0F0F0F; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + FILE_LOG(logERROR, ("3:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + val = 0xF0F0F0F0; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + FILE_LOG(logERROR, ("4:Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + break; + } + } + // write back previous value + bus_w(addr, previousValue); + if (ret == OK) { + FILE_LOG(logINFO, ("Successfully tested FPGA Delay LSB Register %d times\n", times)); + } + } + + return ret; +} + +int testBus() { +#ifdef VIRTUAL + return OK; +#endif + FILE_LOG(logINFO, ("Testing Bus:\n")); + + int ret = OK; + uint32_t addr = DELAY_LSB_REG; + + // store previous delay value + uint32_t previousValue = bus_r(addr); + + volatile uint32_t val = 0, readval = 0; + int times = 1000 * 1000; + int i = 0; + + for (i = 0; i < times; ++i) { + val += 0xbbbbb; + bus_w(addr, val); + readval = bus_r(addr); + if (readval != val) { + FILE_LOG(logERROR, ("Mismatch! Loop(%d): Wrote 0x%x, read 0x%x\n", + i, val, readval)); + ret = FAIL; + } + } + + // write back previous value + bus_w(addr, previousValue); + + if (ret == OK) { + FILE_LOG(logINFO, ("Successfully tested bus %d times\n", times)); + } + return ret; +} + +int detectorTest( enum digitalTestMode arg){ +#ifdef VIRTUAL + return OK; +#endif + switch(arg){ + case DETECTOR_FIRMWARE_TEST: return testFpga(); + case DETECTOR_BUS_TEST: return testBus(); + default: + FILE_LOG(logERROR, ("Test %s not implemented for this detector\n", (int)arg)); + break; + } + return OK; +} + + +/* Ids */ + +int64_t getDetectorId(enum idMode arg){ + int64_t retval = -1; + + switch(arg){ + case DETECTOR_SERIAL_NUMBER: + return getDetectorNumber(); + case DETECTOR_FIRMWARE_VERSION: + return getFirmwareVersion(); + case SOFTWARE_FIRMWARE_API_VERSION: + return getFirmwareAPIVersion(); + case DETECTOR_SOFTWARE_VERSION: + return (GITDATE & 0xFFFFFF); + case CLIENT_SOFTWARE_API_VERSION: + return APICTB; + default: + return retval; + } +} + +uint64_t getFirmwareVersion() { +#ifdef VIRTUAL + return 0; +#endif + return ((bus_r(FPGA_VERSION_REG) & FPGA_VERSION_BRD_RVSN_MSK) >> FPGA_VERSION_BRD_RVSN_OFST); +} + +uint64_t getFirmwareAPIVersion() { +#ifdef VIRTUAL + return 0; +#endif + return ((bus_r(API_VERSION_REG) & API_VERSION_MSK) >> API_VERSION_OFST); +} + +uint16_t getHardwareVersionNumber() { +#ifdef VIRTUAL + return 0; +#endif + return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_VRSN_MSK) >> MOD_SERIAL_NUMBER_VRSN_OFST); +} + +uint16_t getHardwareSerialNumber() { +#ifdef VIRTUAL + return 0; +#endif + return ((bus_r(MOD_SERIAL_NUMBER_REG) & MOD_SERIAL_NUMBER_MSK) >> MOD_SERIAL_NUMBER_OFST); +} + +uint32_t getDetectorNumber(){ +#ifdef VIRTUAL + return 0; +#endif + return bus_r(MOD_SERIAL_NUMBER_REG); +} + +uint64_t getDetectorMAC() { +#ifdef VIRTUAL + return 0; +#else + char output[255],mac[255]=""; + uint64_t res=0; + FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + //getting rid of ":" + char * pch; + pch = strtok (output,":"); + while (pch != NULL){ + strcat(mac,pch); + pch = strtok (NULL, ":"); + } + sscanf(mac,"%llx",&res); + return res; +#endif +} + +uint32_t getDetectorIP(){ +#ifdef VIRTUAL + return 0; +#endif + char temp[50]=""; + uint32_t res=0; + //execute and get address + char output[255]; + FILE* sysFile = popen("ifconfig | grep 'inet addr:'| grep -v '127.0.0.1' | cut -d: -f2", "r"); + fgets(output, sizeof(output), sysFile); + pclose(sysFile); + + //converting IPaddress to hex. + char* pcword = strtok (output,"."); + while (pcword != NULL) { + sprintf(output,"%02x",atoi(pcword)); + strcat(temp,output); + pcword = strtok (NULL, "."); + } + strcpy(output,temp); + sscanf(output, "%x", &res); + //FILE_LOG(logINFO, ("ip:%x\n",res); + + return res; +} + + +/* initialization */ + +void initControlServer(){ + setupDetector(); +} + +void initStopServer() { + + usleep(CTRL_SRVR_INIT_TIME_US); + if (mapCSP0() == FAIL) { + FILE_LOG(logERROR, ("Stop Server: Map Fail. Dangerous to continue. Goodbye!\n")); + exit(EXIT_FAILURE); + } +} + + +/* set up detector */ + +void setupDetector() { + FILE_LOG(logINFO, ("This Server is for 1 Jungfrau module (500k)\n")); + + // default variables + dataBytes = 0; + if (ramValues) { + free(ramValues); + ramValues = 0; + } + { + int i = 0; + for (i = 0; i < NUM_CLOCKS; ++i) { + clkPhase[i] = 0; + clkDivider[i] = 0; + } + for (i = 0; i < NDAC; ++i) + dacValues[i] = -1; + } + vLimit = DEFAULT_VLIMIT; + highvoltage = 0; + nROI = 0; + adcDisableMask = 0; + analogEnable = 1; + digitalEnable = 0; + nSamples = 1; + now_ptr = 0; + + + resetPLL(); + resetCore(); + resetPeripheral(); + cleanFifos(); + + // disable spi + bus_w(SPI_REG, SPI_IDLE_MSK); + bus_w(ADC_SPI_REG, ADC_SPI_IDLE_MSK); + + // prepare ADCs +#ifndef VIRTUAL + prepareADC9257(); + // slow ADCs + prepareAD7689(); + // I2C + I2C_ConfigureI2CCore(I2C_SCL_LOW_COUNT_REG, I2C_SCL_HIGH_COUNT_REG, I2C_SDA_HOLD_REG, I2C_CONTROL_REG); + INA226_CalibrateCurrentRegister(I2C_SHUNT_RESISTER_OHMS, I2C_TRANSFER_COMMAND_FIFO_REG, I2C_POWER_VIO_DEVICE_ID); + INA226_CalibrateCurrentRegister(I2C_SHUNT_RESISTER_OHMS, I2C_TRANSFER_COMMAND_FIFO_REG, I2C_POWER_VA_DEVICE_ID); + INA226_CalibrateCurrentRegister(I2C_SHUNT_RESISTER_OHMS, I2C_TRANSFER_COMMAND_FIFO_REG, I2C_POWER_VB_DEVICE_ID); + INA226_CalibrateCurrentRegister(I2C_SHUNT_RESISTER_OHMS, I2C_TRANSFER_COMMAND_FIFO_REG, I2C_POWER_VC_DEVICE_ID); + INA226_CalibrateCurrentRegister(I2C_SHUNT_RESISTER_OHMS, I2C_TRANSFER_COMMAND_FIFO_REG, I2C_POWER_VD_DEVICE_ID); +#endif + + // initialize dac series + initDac(0); + initDac(8); + initDac(16); + + // switch off power regulators + powerChip(0); + //FIXME: + // switch off dacs (power regulators most likely only sets to minimum (if power enable on)) + { + int idac = 0; + int retval[2] = {0, 0}; + for (idac = 0; idac < NDAC; ++idac) { + setDac(idac, -100, 0, retval); + } + } + + bus_w(ADC_PORT_INVERT_REG, ADC_PORT_INVERT_VAL);//FIXME: got from moench config file + setvchip(VCHIP_MIN_MV); + setHighVoltage(DEFAULT_HIGH_VOLTAGE); + + FILE_LOG(logINFOBLUE, ("Setting Default parameters\n")); + cleanFifos(); // FIXME: why twice? + resetCore(); + + //Initialization of acquistion parameters + setTimer(SAMPLES_JCTB, DEFAULT_NUM_SAMPLES); // update databytes and allocate ram + setTimer(FRAME_NUMBER, DEFAULT_NUM_FRAMES); + setTimer(CYCLES_NUMBER, DEFAULT_NUM_CYCLES); + setTimer(FRAME_PERIOD, DEFAULT_PERIOD); + setTimer(DELAY_AFTER_TRIGGER, DEFAULT_DELAY); + selectStoragecellStart(DEFAULT_STRG_CLL_STRT); + setTiming(DEFAULT_TIMING_MODE); + + // send via tcp (moench via udp with configuremac) + sendUDP(0); + // clear roi + { + int ret = OK, retvalsize = 0; + setROI(0, rois, &ret, &retvalsize); + } +} + +int allocateRAM() { + int oldDataBytes = dataBytes; + updateDataBytes(); + + // update only if change in databytes + if (dataBytes == dataBytes) { + FILE_LOG(logDEBUG1, ("RAM of size %d already allocated. Nothing to be done.\n", dataBytes)); + return OK; + } + // Zero databytes + if (dataBytes <= 0) { + FILE_LOG(logERROR, ("Can not allocate RAM for 0 bytes (databytes: 0).\n")); + return FAIL; + } + // clear RAM + if (ramValues) { + free(ramValues); + ramValues = 0; + } + // allocate RAM + ramValues = malloc(dataBytes); + // cannot malloc + if (ramValues == NULL) { + FILE_LOG(logERROR, ("Can not allocate RAM for even 1 frame. " + "Probably cause: Memory Leak.\n")); + return FAIL; + } + FILE_LOG(logINFO, ("RAM allocated to %d bytes\n", dataBytes)); + return OK; +} + +void updateDataBytes() { + int oldDataBytes = dataBytes; + dataBytes = NCHIP * getChannels() * NUM_BYTES_PER_PIXEL * nSamples; + if (dataBytes != dataBytes) + FILE_LOG(logINFO, ("Updating Databytes: %d\n", dataBytes)); +} + +int getChannels() { + int nchans = 0; + + if (analogEnable) { + nchans += NCHAN_ANALOG; + // remove the channels disabled + int ichan = 0; + for (ichan = 0; ichan < NCHAN_ANALOG; ++ichan) { + if (adcDisableMask & (1 << ichan)) + --nchans; + } + } + if (digitalEnable) + nchan += NCHAN_DIGITAL; + return nchan; +} + + +/* firmware functions (resets) */ + +void cleanFifos() { +#ifdef VIRTUAL + return; +#endif + FILE_LOG(logINFO, ("Clearing Acquisition Fifos\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CLR_ACQSTN_FIFO_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CLR_ACQSTN_FIFO_MSK); +} + +void resetCore() { +#ifdef VIRTUAL + return; +#endif + FILE_LOG(logINFO, ("Resetting Core\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_CRE_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_CRE_RST_MSK); +} + +void resetPeripheral() { +#ifdef VIRTUAL + return; +#endif + FILE_LOG(logINFO, ("Resetting Peripheral\n")); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_PRPHRL_RST_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PRPHRL_RST_MSK); +} + + +/* set parameters - dr, roi */ + +int setDynamicRange(int dr){ + return DYNAMIC_RANGE; +} + +ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) { + uint32_t addr = ADC_DISABLE_REG; + + // set ROI + if(n >= 0) { + // clear roi + if (!n) { + FILE_LOG(logINFO, ("Clearing ROI\n")); + adcDisableMask = 0; + } + // set roi + else { + FILE_LOG(logINFO, ("Setting ROI:\n")); + adcDisableMask = 0xffffffff; + int iroi = 0; + // for every roi + for (iroi = 0; iroi < n; ++iroi) { + FILE_LOG(logINFO, ("\t%d: (%d, %d)\n", arg[iroi].xmin, arg[iroi].xmax)); + // swap if xmin > xmax + if (arg[iroi].xmin > arg[iroi].xmax) { + int temp = xmin; + arg[iroi].xmin = arg[iroi].xmax; + arg[iroi].xmax = arg[iroi].temp; + FILE_LOG(logINFORED, ("\tCorrected %d: (%d, %d)\n", arg[iroi].xmin, arg[iroi].xmax)); + } + int ich = 0; + // for the roi specified + for (ich = arg[iroi].xmin; ich <= arg[iroi].xmax; ++ich) { + // valid channel (disable) + if (ich >= 0 && ich < NCHAN_ANALOG) + adcDisableMask &= ~(1 << ich); + + FILE_LOG(logDEBUG1, ("\t%d: ich:%d adcDisableMask:0x%08x\n", + iroi, ich, adcDisableMask)); + } + } + } + FILE_LOG(logINFO, ("\tSetting adcDisableMask to 0x%08x\n", adcDisableMask)); + bus_w(addr, adcDisableMask); + } + + // get roi + adcDisableMask = bus_r(addr); + FILE_LOG(logDEBUG1, ("\tGetting adcDisableMask: 0x%08x\n", adcDisableMask)); + + nROI = 0; + if (adcDisableMask) { + int ich = 0; + // loop through channels + for (ich = 0; ich < NCHAN_ANALOG; ++ich) { + // channel disabled + if ((~adcDisableMask) & (1 << ich)) { + // first channel + if (ich == 0) { + ++nROI; + rois[nROI - 1].xmin = ich; + rois[nROI - 1].xmax = ich; + rois[nROI - 1].ymin = -1; + rois[nROI - 1].ymax = -1; + } + // not first channel + else { + // previous channel enabled (so increase roi) + if ((adcDisableMask) & (1 << (ich - 1))) { + ++nROI; + // max roi level + if (nROI > MAX_ROIS) { + nROI = -1; + *ret = FAIL; + FILE_LOG(logERROR, ("Max ROI reached!\n")); + break; + } + rois[nROI - 1].xmin = ich; + rois[nROI - 1].ymin = -1; + rois[nROI - 1].ymax = -1; + } + // set max as current one each time + rois[nROI - 1].xmax = ich; + } + } + } + } + + // print + if (!nROI) { + FILE_LOG(logINFO, ("\tROI: None\n")); + } else { + FILE_LOG(logINFO, ("ROI:\n")); + int i = 0; + for (i = 0; i < nROI; ++i) { + FILE_LOG(logINFO, ("\t%d: (%d, %d)\n", i, rois[i].xmin, rois[i].xmax)); + + } + } + + // validate and update databytes + if (n >= 0) { + // validate + if((n != 0) && ((arg[0].xmin != rois[0].xmin)|| + (arg[0].xmax != rois[0].xmax)|| + (arg[0].ymin != rois[0].ymin)|| + (arg[0].ymax != rois[0].ymax))) { + *ret = FAIL; + FILE_LOG(logERROR, ("\tCould not set given ROI\n")); + } + if(n != nROI) { + *ret = FAIL; + FILE_LOG(logERROR, ("\tCould not set or clear ROIs\n")); + } + // update databytes (now that mask is up to date from fpga) and allocate ram + if (allocateRAM() == FAIL) { + *ret = FAIL; + nROI = -2; + } + } + + *retvalsize = nROI; + return rois; +} + + +/* parameters - speed, readout */ + +void setSpeed(enum speedVariable ind, int val) { + switch(ind) { + case ADC_PHASE: + case PHASE_SHIFT: + FILE_LOG(logINFO, ("Configuring ADC Phase\n")); + configurePhase(RUN_CLK, val); + break; + case DBIT_PHASE: + FILE_LOG(logINFO, ("Configuring Dbit Phase\n")); + configurePhase(DBIT_CLK, val); + break; + case ADC_CLOCK: + FILE_LOG(logINFO, ("Configuring ADC Clock\n")); + configureFrequency(ADC_CLK, val); + configureSyncFrequency(ADC_CLK); + break; + case DBIT_CLOCK: + FILE_LOG(logINFO, ("Configuring Dbit Clock\n")); + configureFrequency(DBIT_CLK, val); + configureSyncFrequency(DBIT_CLK); + break; + case ADC_PIPELINE: + setAdcOffsetRegister(1, val); + break; + case DBIT_PIPELINE: + setAdcOffsetRegister(0, val); + break; + case CLOCK_DIVIDER: + FILE_LOG(logINFO, ("Configuring Run Clock\n")); + configureFrequency(RUN_CLK, val); + configureSyncFrequency(RUN_CLK); + break; + default: + return; + } +} + +int getSpeed(enum speedVariable ind) { + switch(ind) { + case ADC_PHASE: + case PHASE_SHIFT: + return getPhase(RUN_CLK); + case DBIT_PHASE: + return clkPhase[DBIT_CLK]; + case ADC_CLOCK: + return getFrequency(ADC_CLK); + case DBIT_CLOCK: + return getFrequency(DBIT_CLK); + case ADC_PIPELINE: + return getAdcOffsetRegister(1); + case DBIT_PIPELINE: + return getAdcOffsetRegister(0); + case CLOCK_DIVIDER: + return getFrequency(RUN_CLK); + default: + return -1; + } +} + +enum readOutFlags setReadOutFlags(enum readOutFlags val) { + enum readOutFlags retval = GET_READOUT_FLAGS; + uint32_t addr = CONFIG_REG; + + // set + if (val != GET_READOUT_FLAGS) { + switch(val) { + case NORMAL_READOUT: + FILE_LOG(logINFO, ("Setting Normal Readout\n")); + bus_w(bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) & (~CONFIG_ENBLE_DGTL_OTPT_MSK)); + break; + case DIGITAL_ONLY: + FILE_LOG(logINFO, ("Setting Digital Only Readout\n")); + bus_w(bus_r(addr) | CONFIG_DSBL_ANLG_OTPT_MSK | CONFIG_ENBLE_DGTL_OTPT_MSK); + break; + case ANALOG_AND_DIGITAL: + FILE_LOG(logINFO, ("Setting Analog & Digital Readout\n")); + bus_w(bus_r(addr) & (~CONFIG_DSBL_ANLG_OTPT_MSK) | CONFIG_ENBLE_DGTL_OTPT_MSK); + break; + default: + FILE_LOG(logERROR, ("Cannot set unknown readout flag. 0x%x\n", val)); + return retval; + } + } + + // get + uint32_t regval = bus_r(addr); + FILE_LOG(logDEBUG1, ("Config Reg: 0x%08x\n", regval)); + // this bit reads analog disable, so inverse + analogEnable = (((regval & CONFIG_DSBL_ANLG_OTPT_MSK) >> CONFIG_DSBL_ANLG_OTPT_OFST) ? 0 : 1); + digitalEnable = ((regval & CONFIG_ENBLE_DGTL_OTPT_MSK) >> CONFIG_ENBLE_DGTL_OTPT_OFST); + + if (analogEnable && digitalEnable) { + FILE_LOG(logDEBUG1, ("\tGetting readout: Analog & Digital\n")); + retval = ANALOG_AND_DIGITAL; + } else if (analogEnable && !digitalEnable) { + FILE_LOG(logDEBUG1, ("\tGetting readout: Normal\n")); + retval = NORMAL_READOUT; + } else if (!analogEnable && digitalEnable) { + FILE_LOG(logDEBUG1, ("\tGetting readout: Digital Only\n")); + retval = DIGITAL_ONLY; + } else { + FILE_LOG(logERROR, ("Read unknown readout (Both digital and analog are disabled). " + "Config reg: 0x%x\n", regval)); + return retval; + } + + // update databytes and allocate ram + if (allocateRAM() == FAIL) { + return -2; + } + + return retval; +} + + + +/* parameters - timer */ +int selectStoragecellStart(int pos) { + if (pos >= 0) { + FILE_LOG(logINFO, ("Setting storage cell start: %d\n", pos)); + bus_w(DAQ_REG, bus_r(DAQ_REG) & ~DAQ_STRG_CELL_SLCT_MSK); + bus_w(DAQ_REG, bus_r(DAQ_REG) | ((pos << DAQ_STRG_CELL_SLCT_OFST) & DAQ_STRG_CELL_SLCT_MSK)); + } + return ((bus_r(DAQ_REG) & DAQ_STRG_CELL_SLCT_MSK) >> DAQ_STRG_CELL_SLCT_OFST); +} + + + +int64_t setTimer(enum timerIndex ind, int64_t val) { + + int64_t retval = -1; + switch(ind){ + + case FRAME_NUMBER: + if(val >= 0) { + FILE_LOG(logINFO, ("Setting #frames: %lld\n",(long long int)val)); + } + retval = set64BitReg(val, FRAMES_LSB_REG, FRAMES_MSB_REG); + FILE_LOG(logDEBUG1, ("Getting #frames: %lld\n", (long long int)retval)); + break; + + case FRAME_PERIOD: + if(val >= 0){ + FILE_LOG(logINFO, ("Setting period: %lldns\n",(long long int)val)); + val *= (1E-3 * clkDivider[ADC_CLK]); + // make period odd + //FIXME to be tested + /*if (val % 2 == 0) { //fIXME: period is even here, not other way round? + FILE_LOG(logINFO, ("\tPeriod %lld not even, adding 1\n", (long long int)val)); + ++val; + FILE_LOG(logINFO, ("\tNew Period:%lld\n", (long long int)val)) + } else { + FILE_LOG(logINFO, ("\tPeriod already even:%lld\n", (long long int)val)) + }*/ + } + retval = set64BitReg(val, PERIOD_LSB_REG, PERIOD_MSB_REG )/ (1E-3 * clkDivider[ADC_CLK]); + FILE_LOG(logDEBUG1, ("Getting period: %lldns\n", (long long int)retval)); + break; + + case DELAY_AFTER_TRIGGER: + if(val >= 0){ + FILE_LOG(logINFO, ("Setting delay: %lldns\n", (long long int)val)); + val *= (1E-3 * clkDivider[ADC_CLK]); + } + retval = set64BitReg(val, DELAY_LSB_REG, DELAY_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]); + FILE_LOG(logDEBUG1, ("Getting delay: %lldns\n", (long long int)retval)); + break; + + case CYCLES_NUMBER: + if(val >= 0) { + FILE_LOG(logINFO, ("Setting #cycles: %lld\n", (long long int)val)); + } + retval = set64BitReg(val, CYCLES_LSB_REG, CYCLES_MSB_REG); + FILE_LOG(logDEBUG1, ("Getting #cycles: %lld\n", (long long int)retval)); + break; + + case SAMPLES_JCTB: + if(val >= 0) { + FILE_LOG(logINFO, ("Setting #samples: %lld\n", (long long int)val)); + nSamples = val; + bus_w(SAMPLES_REG, val); + if (allocateRAM() == FAIL) { + return -1; + } + } + retval = nSamples; + FILE_LOG(logDEBUG1, ("Getting #samples: %lld\n", (long long int)retval)); + + break; + + default: + FILE_LOG(logERROR, ("Timer Index not implemented for this detector: %d\n", ind)); + break; + } + + return retval; + +} + + + +int64_t getTimeLeft(enum timerIndex ind){ +#ifdef VIRTUAL + return 0; +#endif + int64_t retval = -1; + switch(ind){ + + case FRAME_NUMBER: + retval = get64BitReg(FRAMES_LEFT_LSB_REG, FRAMES_LEFT_MSB_REG); + FILE_LOG(logINFO, ("Getting number of frames left: %lld\n",(long long int)retval)); + break; + + case FRAME_PERIOD: + retval = get64BitReg(GET_PERIOD_LSB_REG, PERIOD_LEFT_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]); + FILE_LOG(logINFO, ("Getting period left: %lldns\n", (long long int)retval)); + break; + + case DELAY_AFTER_TRIGGER: + retval = get64BitReg(DELAY_LEFT_LSB_REG, DELAY_LEFT_MSB_REG) / (1E-3 * clkDivider[ADC_CLK]); + FILE_LOG(logINFO, ("Getting delay left: %lldns\n", (long long int)retval)); + break; + + case CYCLES_NUMBER: + retval = get64BitReg(CYCLES_LEFT_LSB_REG, CYCLES_LEFT_MSB_REG); + FILE_LOG(logINFO, ("Getting number of cycles left: %lld\n", (long long int)retval)); + break; + + case ACTUAL_TIME: + retval = get64BitReg(TIME_FROM_START_LSB_REG, TIME_FROM_START_MSB_REG) / (1E-3 * CLK_FREQ); + FILE_LOG(logINFO, ("Getting actual time (time from start): %lld\n", (long long int)retval)); + break; + + case MEASUREMENT_TIME: + retval = get64BitReg(START_FRAME_TIME_LSB_REG, START_FRAME_TIME_MSB_REG) / (1E-3 * CLK_FREQ); + FILE_LOG(logINFO, ("Getting measurement time (timestamp/ start frame time): %lld\n", (long long int)retval)); + break; + + case FRAMES_FROM_START: + case FRAMES_FROM_START_PG: + retval = get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG); + FILE_LOG(logINFO, ("Getting frames from start run control %lld\n", (long long int)retval)); + break; + + default: + FILE_LOG(logERROR, ("Remaining Timer index not implemented for this detector: %d\n", ind)); + break; + } + + return retval; +} + + +int validateTimer(enum timerIndex ind, int64_t val, int64_t retval) { + if (val < 0) + return OK; + switch(ind) { + case FRAME_PERIOD: + case DELAY_AFTER_TRIGGER: + // convert to freq + val *= (1E-3 * CLK_SYNC); + // convert back to timer + val = (val) / (1E-3 * CLK_SYNC); + if (val != retval) + return FAIL; + default: + break; + } + return OK; +} + + +/* parameters - dac, adc, hv */ + +void initDac(int dacnum) { +#ifdef VIRTUAL + return; +#endif + FILE_LOG(logINFOBLUE, ("Initializing dac %d\n",dacnum)); + + uint32_t codata; + int csdx = dacnum / NDAC + SPI_DAC_SRL_CS_OTPT_MSK; + int dacchannel = 0xf; // all channels + int dacvalue = 0x6; // (low value) can be any random value (just writing to power up) + FILE_LOG(logINFO, ("\tWrite to Input Register\n" + "\tChip select bit: %d\n" + "\tDac Channel: 0x%x\n" + "\tDac Value: 0x%x\n", + csdx, dacchannel, dacvalue)); + + codata = LTC2620_DAC_CMD_WRITE + // command to write to input register + ((dacchannel << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) + // all channels + ((dacvalue << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK); // any random value + serializeToSPI(SPI_REG, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS, + SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST); +} + + +int voltageToDac(int value){ + return generalVoltageToDac(value, 0, DAC_MAX_VOLTAGE_MV, 1); +} + +int dacToVoltage(unsigned int digital){ + return generalDacToVoltage(digital, 0, DAC_MAX_VOLTAGE_MV, 1); +} + +int generalVoltageToDac(int value, int vmin, int vmax, int check) { + int nsteps = MAX_DAC_UNIT_VALUE; + if (check && ((value < vmin) || (value > vmax))) { + FILE_LOG(logERROR, ("Voltage value (to convert to dac value) is outside bounds: %d\n", value)); + return -1; + } + return (int)(((value - vmin) / (vmax - vmin)) * (nsteps - 1) + 0.5); +} + +int generalDacToVoltage(unsigned int digital, int vmin, int vmax, int check) { + int nsteps = MAX_DAC_UNIT_VALUE; + int v = vmin + (vmax - vmin) * digital / (nsteps - 1); + if (check && ((v < 0) || (v > vmax))) { + FILE_LOG(logERROR, ("Voltage value (converted from dac value) is outside bounds: %d\n", v)); + return -1; + } + return v; +} + +void setDAC(enum DACINDEX ind, int val, int mV, int retval[]) { + // validate index + if (ind < 0 || ind >= NDAC) { + FILE_LOG(logERROR, ("Dac index %d is not defined\n", ind)); + retval[0] = -1; + return; + } + + int dacmV = val; + + //if set and mv, convert to dac + if (val > 0) { + if (mV) + val = voltageToDac(val); + else + dacmV = dacToVoltage(val); + // conversion out of bounds + if (val == -1 || dacmV == -1) { + FILE_LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", ind, (mV ? "mV" : "dac units"));) + return; + } + } + + if ( (val >= 0) || (val == -100)) { +#ifdef VIRTUAL + dacValues[ind] = val; +#else + uint32_t codata; + int csdx = ind / NDAC + SPI_DAC_SRL_CS_OTPT_MSK; + int dacchannel = ind % NDAC; + + FILE_LOG(logINFO, ("Setting DAC %d: %d dac (%d mV)\n",ind, val, dacmV)); + // command + if (val >= 0) { + FILE_LOG(logDEBUG1,("\tWrite to Input Register and Update\n")); + codata = LTC2620_DAC_CMD_SET; + + } else if (val == -100) { + FILE_LOG(logDEBUG1, ("\tPOWER DOWN\n")); + codata = LTC2620_DAC_CMD_POWER_DOWN; + } + // address + FILE_LOG(logDEBUG1, ("\tChip select bit:%d\n" + "\tDac Channel:0x%x\n" + "\tDac Value:0x%x\n", + csdx, dacchannel, val)); + codata += ((dacchannel << LTC2620_DAC_ADDR_OFST) & LTC2620_DAC_ADDR_MSK) + + ((val << LTC2620_DAC_DATA_OFST) & LTC2620_DAC_DATA_MSK); + // to spi + serializeToSPI(SPI_REG, codata, (0x1 << csdx), LTC2620_DAC_NUMBITS, + SPI_DAC_SRL_CLK_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_MSK, SPI_DAC_SRL_DGTL_OTPT_OFST); + + dacValues[ind] = val; +#endif + } + + retval[0] = dacValues[ind]; + retval[1] = dacToVoltage(retval[0]); + FILE_LOG(logDEBUG1, ("Getting DAC %d : %d dac (%d mV)\n",ind, retval[0], retval[1])); +} + +int checkVLimitCompliant(int mV) { + if (vLimit > 0 && mv > vLimit) + return FAIL; + return OK; +} + +int getVLimit() { + return vLimit; +} + +void setVLimit(int l) { + if (l >= 0) + vLimit = l; +} + +int isVchipValid(int val) { + if (val < VCHIP_MIN_MV || val > VCHIP_MAX_MV) { + return 0; + } + return 1; +} + +int getVchip() { + // not set yet + if (dacValues[D_PWR_CHIP] == -1 || dacValues[D_PWR_CHIP] == -100) + return dacValues[D_PWR_CHIP]; + return generalDacToVoltage(dacValues[D_PWR_CHIP], VCHIP_MIN_MV, VCHIP_MAX_MV, 1); +} + +void setVchip(int val) { + // set vchip + if (val != -1) { + FILE_LOG(logINFO, ("Setting Vchip to %d mV\n", val)); + + int dacval = -100; + + // validate & convert it to dac + if (val != -100) { + // convert it to dac + dacval = generalVoltageToDac(val, VCHIP_MIN_MV, VCHIP_MAX_MV, 1); + + // validity (already checked at tcp) + if (dacval == -1) { + FILE_LOG(logERROR, ("\tVChip %d mV invalid. Is not between %d and %d mV\n", val, VCHIP_MIN_MV, VCHIP_MAX_MV)); + return; + } + } + + // set + int retval[2] = {0, 0}; + setDAC(D_PWR_CHIP, dacval, 0, retval); + } +} + +int getVChipToSet(enum DACINDEX ind, int val) { + // validate index & get adc index + int adcIndex = getADCIndexFromDACIndex(ind); + if (adcIndex == -1) { + return -1; + } + + // get maximum value of the adc values (minimum is 0) + int max = 0; + + int ipwr = 0; + // loop through the adcs + for (ipwr = 0; ipwr < PWR -1; ++ipwr) { + + // get the dac values for each adc + int dacVal = dacValues[getDACIndexFromADCIndex(i)]; + + // if current index, replace with value to be set + if (ipwr == adcIndex) + dacVal = val; + + // if power enable off for that adc, dont take the value + if (!(bus_r(POWER_REG) & (1 << (POWER_ENBL_VLTG_RGLTR_OFST + ipwr)))) + dacVal = 0; + + // update max + max = (dacVal > max) ? dacVal : max; + } + + // increment to get vchip value + max += VCHIP_POWER_INCRMNT; + + // validate with vchip minimum value + if (max < VCHIP_MIN_MV) + max = VCHIP_MIN_MV; + return max; +} + +int getDACIndexFromADCIndex(enum ADCINDEX ind) { + switch (ind) { + case V_PWR_IO: + return D_PWR_IO; + case V_PWR_A: + return D_PWR_A; + case V_PWR_B: + return D_PWR_B; + case V_PWR_C: + return D_PWR_C; + case V_PWR_D: + return D_PWR_D; + default: + FILE_LOG(logERROR, ("ADC index %d is not defined to get DAC index\n", ind)); + return -1; + } +} + +int getADCIndexFromDACIndex(enum DACINDEX ind) { + switch (ind) { + case D_PWR_IO: + return V_PWR_IO; + case D_PWR_A: + return V_PWR_A; + case D_PWR_B: + return V_PWR_B; + case D_PWR_C: + return V_PWR_C; + case D_PWR_D: + return V_PWR_D; + default: + FILE_LOG(logERROR, ("DAC index %d is not defined to get ADC index\n", ind)); + return -1; + } +} + +int isPowerValid(int val) { + if (val < POWER_RGLTR_MIN || val > POWER_RGLTR_MAX) { + return 0; + } + return 1; +} + +int getPower(enum DACINDEX ind) { + // validate index & get adc index + int adcIndex = getADCIndexFromDACIndex(ind); + if (adcIndex == -1) { + return -1; + } + + // powered enable off + { + uint32_t addr = POWER_REG; + uint32_t offset = POWER_ENBL_VLTG_RGLTR_OFST + adcIndex; + uint32_t mask = (1 << offset); + if (!(bus_r(addr) & mask)) + return 0; + } + + // not set yet + if (dacValues[ind] == -1) { + FILE_LOG(logERROR, ("Power enabled, but unknown dac value for power index %d!", ind)); + return -1; + } + + // dac powered off + if (dacValues[ind] == -100) { + FILE_LOG(logWARNING, ("Power %d enabled, dac value -100, voltage at minimum or 0\n", ind)); + return -100; + } + + // vchip not set, weird error, should not happen (as vchip set to max in the beginning) + // unless user set vchip to -100 and then tried to get a power regulator value + if (dacValues[D_PWR_CHIP] == -1 || dacValues[D_PWR_CHIP] == -100) { + FILE_LOG(logERROR, ("Cannot read power regulator %d (vchip not set)." + "Set a power regulator, which will also set vchip.\n")); + return -1; + } + + // voltage value + int retval = generalDacToVoltage(dacValues[ind], POWER_RGLTR_MIN, (getVchip() - VCHIP_POWER_INCRMNT), 1); + +} + +void setPower(enum DACINDEX ind, int val) { + // validate index & get adc index + int adcIndex = getADCIndexFromDACIndex(ind); + if (adcIndex == -1) { + return -1; + } + + uint32_t addr = POWER_REG; + uint32_t offset = POWER_ENBL_VLTG_RGLTR_OFST + adcIndex; + uint32_t mask = (1 << offset); + + // set power + if (val != -1) { + FILE_LOG(logINFO, ("Setting Power to %d mV\n", val)); + + // validate value (already checked at tcp) + if (!isPowerValid(val)) { + FILE_LOG(logERROR, ("\Invalid value of %d mV for Power %d. Is not between %d and %d mV\n", val, ind, POWER_RGLTR_MIN, POWER_RGLTR_MAX)); + return; + } + + // dummy variable to set dac + int retval[2] = {0, 0}; + // get vchip to set vchip (calculated now before switching off power enable) + int vchip = getVChipToSet(ind, val); + + // Switch off power enable + bus_w(addr, bus_r(addr) & ~(mask)); + + // power down dac + setDac(ind, -100, 0, retval); + + // set vchip + setVchip(vchip); + if (getvchip() != vchip) { + FILE_LOG(logERROR, ("Weird, Could not set vchip. Set %d, read %d\n.", vchip, getvchip())); + return; + } + + // convert it to dac + if (val != -100) { + // convert it to dac + int dacval = generalVoltageToDac(val, POWER_RGLTR_MIN, vchip - VCHIP_POWER_INCRMNT, 1); + + // set and power on/ update dac + setDAC(ind, dacval, 0, retval); + + // to be sure of valid conversion + if (dacval >= 0) + bus_w(addr, bus_r(addr) | mask); + } + } +} + +int getADC(enum ADCINDEX ind){ +#ifdef VIRTUAL + return 0; +#endif + int idac = (int)ind; + switch(ind) { + case V_PWR_IO: + case V_PWR_A: + case V_PWR_B: + case V_PWR_C: + case V_PWR_D: + return INA226_ReadVoltage(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG, + I2C_POWER_VIO_DEVICE_ID + (int)ind); + case I_PWR_IO: + case I_PWR_A: + case I_PWR_B: + case I_PWR_C: + case I_PWR_D: + return INA226_ReadCurrent(I2C_TRANSFER_COMMAND_FIFO_REG, I2C_RX_DATA_FIFO_LEVEL_REG, + I2C_POWER_VIO_DEVICE_ID + (int)(ind - I_PWR_IO)); + default: + if (ind >= SLOW_ADC_START_INDEX && ind <= SLOW_ADC_END_INDEX) { + return getAD7689(ind - SLOW_ADC_START_INDEX); + } + FILE_LOG(logERROR, ("Adc Index %d not defined \n", (int)ind)); + return -1; + } +} + +int getVoltage(int idac) { +// FIXME: to be implemented + return 0;//ina226 +} + +int getCurrent(int idac) { + // FIXME: to be implemented + return 0; +} + +int setHighVoltage(int val){ +#ifdef VIRTUAL + if (val >= 0) + highvoltage = val; + return highvoltage; +#endif + uint32_t dacvalue; + float alpha = 0.55; + // setting hv + if (val >= 0) { + // limit values + if (val < 60) { + dacvalue = 0; + val = 0; + } else if (val >= 200) { + dacvalue = 0x1; + val = 200; + } else { + dacvalue = 1. + (200.-val) / alpha; + val = 200.-(dacvalue-1)*alpha; + } + FILE_LOG(logINFO, ("Setting High voltage: %d (dacval %d)\n",val, dacvalue)); + dacvalue &= MAX1932_HV_DATA_MSK; + uint32_t addr = POWER_REG; + + // switch off high voltage + bus_w(addr, bus_r(addr) & (~POWER_HV_SLCT_MSK)); + + serializeToSPI(SPI_REG, dacvalue, HV_SERIAL_CS_OUT_MSK, MAX1932_HV_NUMBITS, + HV_SERIAL_CLK_OUT_MSK, HV_SERIAL_DIGITAL_OUT_MSK, HV_SERIAL_DIGITAL_OUT_OFST); + + // switch on high voltage if val > 0 + if (val > 0) + bus_w(addr, bus_r(addr) | POWER_HV_SLCT_MSK); + + highvoltage = val; + } + return highvoltage; +} + + + + + + +/* parameters - timing, extsig */ + + +void setTiming( enum externalCommunicationMode arg){ + + if(arg != GET_EXTERNAL_COMMUNICATION_MODE){ + switch((int)arg){ + case AUTO_TIMING: + FILE_LOG(logINFO, ("Set Timing: Auto\n")); + bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) & ~EXT_SIGNAL_MSK); + break; + case TRIGGER_EXPOSURE: + FILE_LOG(logINFO, ("Set Timing: Trigger\n")); + bus_w(EXT_SIGNAL_REG, bus_r(EXT_SIGNAL_REG) | EXT_SIGNAL_MSK); + break; + default: + FILE_LOG(logERROR, ("Unknown timing mode %d\n", arg)); + return; + } + } +} + + +enum externalCommunicationMode getTiming() { + if (bus_r(EXT_SIGNAL_REG) == EXT_SIGNAL_MSK) + return TRIGGER_EXPOSURE; + return AUTO_TIMING; +} + + + +/* configure mac */ + + +long int calcChecksum(int sourceip, int destip) { + ip_header ip; + ip.ip_ver = 0x4; + ip.ip_ihl = 0x5; + ip.ip_tos = 0x0; + ip.ip_len = IP_PACKETSIZE; + ip.ip_ident = 0x0000; + ip.ip_flag = 0x2; //not nibble aligned (flag& offset + ip.ip_offset = 0x000; + ip.ip_ttl = 0x40; + ip.ip_protocol = 0x11; + ip.ip_chksum = 0x0000 ; // pseudo + ip.ip_sourceip = sourceip; + ip.ip_destip = destip; + + int count = sizeof(ip); + + unsigned short *addr; + addr = (unsigned short*) &(ip); /* warning: assignment from incompatible pointer type */ + + long int sum = 0; + while( count > 1 ) { + sum += *addr++; + count -= 2; + } + if (count > 0) + sum += *addr; // Add left-over byte, if any + while (sum>>16) + sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits + long int checksum = (~sum) & 0xffff; + FILE_LOG(logINFO, ("IP checksum is 0x%lx\n",checksum)); + return checksum; +} + + + +int configureMAC(uint32_t destip, uint64_t destmac, uint64_t sourcemac, uint32_t sourceip, uint32_t udpport, uint32_t udpport2){ +#ifdef VIRTUAL + return OK; +#endif + FILE_LOG(logINFOBLUE, ("Configuring MAC\n")); + uint32_t sourceport = DEFAULT_TX_UDP_PORT; + + FILE_LOG(logINFO, ("\tSource IP : %d.%d.%d.%d \t\t(0x%08x)\n", + (sourceip>>24)&0xff,(sourceip>>16)&0xff,(sourceip>>8)&0xff,(sourceip)&0xff, sourceip)); + FILE_LOG(logINFO, ("\tSource MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n", + (unsigned int)((sourcemac>>40)&0xFF), + (unsigned int)((sourcemac>>32)&0xFF), + (unsigned int)((sourcemac>>24)&0xFF), + (unsigned int)((sourcemac>>16)&0xFF), + (unsigned int)((sourcemac>>8)&0xFF), + (unsigned int)((sourcemac>>0)&0xFF), + (long long unsigned int)sourcemac)); + FILE_LOG(logINFO, ("\tSource Port : %d \t\t\t(0x%08x)\n",sourceport, sourceport)); + + FILE_LOG(logINFO, ("\tDest. IP : %d.%d.%d.%d \t\t(0x%08x)\n", + (destip>>24)&0xff,(destip>>16)&0xff,(destip>>8)&0xff,(destip)&0xff, destip)); + FILE_LOG(logINFO, ("\tDest. MAC : %02x:%02x:%02x:%02x:%02x:%02x \t(0x%010llx)\n", + (unsigned int)((destmac>>40)&0xFF), + (unsigned int)((destmac>>32)&0xFF), + (unsigned int)((destmac>>24)&0xFF), + (unsigned int)((destmac>>16)&0xFF), + (unsigned int)((destmac>>8)&0xFF), + (unsigned int)((destmac>>0)&0xFF), + (long long unsigned int)destmac)); + FILE_LOG(logINFO, ("\tDest. Port : %d \t\t\t(0x%08x)\n",udpport, udpport)); + + long int checksum=calcChecksum(sourceip, destip); + bus_w(TX_IP_REG, sourceip); + bus_w(RX_IP_REG, destip); + + uint32_t val = 0; + + val = ((sourcemac >> LSB_OF_64_BIT_REG_OFST) & BIT_32_MSK); + bus_w(TX_MAC_LSB_REG, val); + FILE_LOG(logDEBUG1, ("Read from TX_MAC_LSB_REG: 0x%08x\n", bus_r(TX_MAC_LSB_REG))); + + val = ((sourcemac >> MSB_OF_64_BIT_REG_OFST) & BIT_32_MSK); + bus_w(TX_MAC_MSB_REG,val); + FILE_LOG(logDEBUG1, ("Read from TX_MAC_MSB_REG: 0x%08x\n", bus_r(TX_MAC_MSB_REG))); + + val = ((destmac >> LSB_OF_64_BIT_REG_OFST) & BIT_32_MSK); + bus_w(RX_MAC_LSB_REG, val); + FILE_LOG(logDEBUG1, ("Read from RX_MAC_LSB_REG: 0x%08x\n", bus_r(RX_MAC_LSB_REG))); + + val = ((destmac >> MSB_OF_64_BIT_REG_OFST) & BIT_32_MSK); + bus_w(RX_MAC_MSB_REG, val); + FILE_LOG(logDEBUG1, ("Read from RX_MAC_MSB_REG: 0x%08x\n", bus_r(RX_MAC_MSB_REG))); + + val = (((sourceport << UDP_PORT_TX_OFST) & UDP_PORT_TX_MSK) | + ((udpport << UDP_PORT_RX_OFST) & UDP_PORT_RX_MSK)); + bus_w(UDP_PORT_REG, val); + FILE_LOG(logDEBUG1, ("Read from UDP_PORT_REG: 0x%08x\n", bus_r(UDP_PORT_REG))); + + bus_w(TX_IP_CHECKSUM_REG,(checksum << TX_IP_CHECKSUM_OFST) & TX_IP_CHECKSUM_MSK); + FILE_LOG(logDEBUG1, ("Read from TX_IP_CHECKSUM_REG: 0x%08x\n", bus_r(TX_IP_CHECKSUM_REG))); + + cleanFifos();//FIXME: resetPerpheral() for ctb? + resetPerpheral(); + usleep(WAIT_TIME_CONFIGURE_MAC); /* todo maybe without */ + sendUDP(1); + + return OK; +} + + + +/* jungfrau specific - pll, flashing fpga */ + +// only for moench +int powerChip(int on) { + uint32_t addr = POWER_REG; + if (on >= 0) { + FILE_LOG(logINFO, ("Powering %s\n", (on > 0 ? "on" : "off"))); + if (on) + bus_w(addr, bus_r(addr) | POWER_ENBL_VLTG_RGLTR_MSK); + else + bus_w(addr, bus_r(addr) & (~POWER_ENBL_VLTG_RGLTR_MSK)); + } + + uint32_t regval = bus_r(addr); + FILE_LOG(logDEBUG1, ("\tPower Register: 0x%08x\n", regval)); + + if (regval & POWER_ENBL_VLTG_RGLTR_MSK) + return 1; + return 0; +} + + +int sendUDP(int enable) { + FILE_LOG(logINFO, ("Sending via %s\n", (enable ? "Receiver" : "CPU"))); + + uint32_t addr = CONFIG_REG; + if (enable > 0) + bus_w(addr, bus_r(addr) | CONFIG_GB10_SND_UDP_MSK); + else if (enable == 0) + bus_w(addr, bus_r(addr) & (~CONFIG_GB10_SND_UDP_MSK)); + + FILE_LOG(logDEBUG, ("\tConfig Reg: 0x%x\n", bus_r(addr))); + return ((bus_r(addr) & CONFIG_GB10_SND_UDP_MSK) >> CONFIG_GB10_SND_UDP_OFST); +} + +void resetPLL() { +#ifdef VIRTUAL + return; +#endif + FILE_LOG(logINFO, ("Resetting PLL\n")); + // reset PLL Reconfiguration and PLL + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) | PLL_CNTRL_RCNFG_PRMTR_RST_MSK | PLL_CNTRL_PLL_RST_MSK); + usleep(WAIT_TIME_US_PLL); + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) & ~PLL_CNTRL_RCNFG_PRMTR_RST_MSK & ~PLL_CNTRL_PLL_RST_MSK); +} + +void setPllReconfigReg(uint32_t reg, uint32_t val) { +#ifdef VIRTUAL + return val; +#endif + FILE_LOG(logINFO, ("Setting PLL Reconfig Reg\n")); + // set parameter + bus_w(PLL_PARAM_REG, val); + + // set address + bus_w(PLL_CNTRL_REG, (reg << PLL_CNTRL_ADDR_OFST) & PLL_CNTRL_ADDR_MSK); + usleep(WAIT_TIME_US_PLL); + + //write parameter + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) | PLL_CNTRL_WR_PRMTR_MSK); + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) & ~PLL_CNTRL_WR_PRMTR_MSK); + usleep(WAIT_TIME_US_PLL); +} + +// ind can only be ADC_CLK or DBIT_CLK +void configurePhase(CLKINDEX ind, int val) { + if (st > 65535 || st < -65535) { + FILE_LOG(logERROR, ("\tPhase provided outside limits\n")); + return; + } + + FILE_LOG(logINFO, ("Configuring Phase of C%d to %d\n", ind, val)); + + // reset only pll + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) | PLL_CNTRL_PLL_RST_MSK); + usleep(WAIT_TIME_US_PLL); + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) & ~PLL_CNTRL_PLL_RST_MSK); + + // set mode register to polling mode + setPllReconfigReg(PLL_MODE_REG, PLL_MODE_PLLNG_MD_VAL); + + int phase = 0, inv = 0; + if (val > 0) { + inv = 0; + phase = val; + } else { + inv = 1; + val = -1 * val; + phase = (~val); + } + FILE_LOG(logINFO, ("\tphase out %d (0x%08x), inv:%d\n", phase, phase, inv)); + + uint32_t value = (((phase << PLL_SHIFT_NUM_SHIFTS_OFST) & PLL_SHIFT_NUM_SHIFTS_MSK) | + (((int)ind << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK)); + FILE_LOG(logDEBUG1, ("\tC%d phase word:0x%08x\n", ind, value)); + + // write phase shift + setPllReconfigReg(PLL_PHASE_SHIFT_REG, value); + usleep(WAIT_TIME_US_PLL); + + clkPhase[ind] = val; +} + +int getPhase(CLKINDEX ind) { + return clkPhase[ind]; +} + +void configureFrequency(CLKINDEX ind, int val) { + if (val < 0) + return; + + FILE_LOG(logINFO, ("\tConfiguring Frequency of C%d to %d MHz\n", ind, val)); + + // check adc clk too high + if (ind == ADC_CLK && val > MAXIMUM_ADC_CLK) { + FILE_LOG(logERROR, ("Frequency %d MHz too high for ADC\n", val)); + return getPhase(ind); + } + + // calculate output frequency + uint32_t total_div = PLL_VCO_FREQ_MHZ / val; + + // assume 50% duty cycle + uint32_t low_count = total_div / 2; + uint32_t high_count = low_count; + uint32_t odd_division = 0; + + // odd division + if (total_div > (2 * low_count)) { + ++high_count; + odd_division = 1; + } + FILE_LOG(logINFO, ("\tC%d: Low:%d, High:%d, Odd:%d\n", ind, low_count, high_count, odd_division)); + + uint32_t val = (((low_count << PLL_C_COUNTER_LW_CNT_OFST) & PLL_C_COUNTER_LW_CNT_MSK) | + ((high_count << PLL_C_COUNTER_HGH_CNT_OFST) & PLL_C_COUNTER_HGH_CNT_MSK) | + ((odd_division << PLL_C_COUNTER_ODD_DVSN_OFST) & PLL_C_COUNTER_ODD_DVSN_MSK) | + (((int)ind << PLL_C_COUNTER_SLCT_OFST) & PLL_C_COUNTER_SLCT_MSK)); + FILE_LOG(logDEBUG1, ("\tC%d word:0x%08x\n", ind, val)); + + // write frequency (post-scale output counter C) + setPllReconfigReg(PLL_C_COUNTER_REG, val); + usleep(WAIT_TIME_US_PLL); + + // reset only PLL + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) | PLL_CNTRL_PLL_RST_MSK); + usleep(WAIT_TIME_US_PLL); + bus_w(PLL_CNTRL_REG, bus_r(PLL_CNTRL_REG) & ~PLL_CNTRL_PLL_RST_MSK); + + clkDivider[ind] = PLL_VCO_FREQ_MHZ / (low_count + high_count); + FILE_LOG(logINFO, ("\tC%d: Frequency set to %d MHz\n", ind, clkDivider[ind])); +} + +int getFrequency(CLKINDEX ind) { + return clkDivider[ind]; +} + +void configureSyncFrequency(CLKINDEX ind) { + int clka = 0, clkb = 0; + switch(ind) { + case ADC_CLOCK: + clka = DBIT_CLK; + clkb = RUN_CLK; + break; + case DBIT_CLOCK: + clka = ADC_CLK; + clkb = RUN_CLK; + break; + case CLOCK_DIVIDER: + clka = DBIT_CLK; + clkb = ADC_CLK; + break; + default: + return; + } + + int clksync = getFrequency(SYNC_CLK); + int retval = getFrequency(ind); + int configure = 0; + + // sync is greater than current + if (clksync > retval) { + FILE_LOG(logINFO, ("\t--Configuring Sync Clock\n")); + configure = 1; + } + + // the others are both greater than current + else if ((clka > retval && clkb > retval)) { + FILE_LOG(logINFO, ("\t++Configuring Sync Clock\n")); + configure = 1; + } + + // configure sync to current + if (configure) + configureFrequency(SYNC_CLK, retval); +} + +void setAdcOffsetRegister(int adc, int val) { + if (val < 0) + return; + + FILE_LOG(logINFO, ("Setting %s Pipeline to %d\n", (adc ? "ADC" : "Dbit"), val)); + uint32_t offset = ADC_OFFSET_ADC_PPLN_OFST; + uint32_t mask = ADC_OFFSET_ADC_PPLN_MSK; + if (!adc) { + offset = ADC_OFFSET_DBT_PPLN_OFST; + mask = ADC_OFFSET_DBT_PPLN_MSK; + } + + uint32_t addr = ADC_OFFSET_REG; + // reset value + bus_w(bus_r(addr) & ~ mask); + // set value + bus_w(bus_r(addr) | ((val << offset) & mask)); + FILE_LOG(logDEBUG1, ("\t %s Offset: 0x%8x\n", (adc ? "ADC" : "Dbit"), bus_r(addr))); +} + +void getAdcOffsetRegister(int adc) { + if (adc) + return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_ADC_PPLN_MSK) >> ADC_OFFSET_ADC_PPLN_OFST); + return ((bus_r(ADC_OFFSET_REG) & ADC_OFFSET_DBT_PPLN_MSK) >> ADC_OFFSET_DBT_PPLN_OFST); +} + +uint64_t writePatternIOControl(uint64_t word) { + if (word != -1) { + FILE_LOG(logINFO, ("Setting Pattern - I/O Control: 0x%llx\n", (long long int) word)); + set64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); + } + uint64_t retval = get64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG); + FILE_LOG(logDEBUG1, ("\tI/O Control: 0x%llx\n", (long long int) retval)); + return retval; +} + +uint64_t writePatternClkControl(uint64_t word) { + if (word != -1) { + FILE_LOG(logINFO, ("Setting Pattern - Clock Control: 0x%llx\n", (long long int) word)); + set64BitReg(word, PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); + } + uint64_t retval = get64BitReg(PATTERN_IO_CLK_CNTRL_LSB_REG, PATTERN_IO_CLK_CNTRL_MSB_REG); + FILE_LOG(logDEBUG1, ("\tClock Control: 0x%llx\n", (long long int) retval)); + return retval; +} + +uint64_t readPatternWord(int addr) { + // error (handled in tcp) + if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { + FILE_LOG(logERROR, ("Cannot get Pattern - Word. Invalid addr %d. " + "Should be within %d\n", addr, MAX_PATTERN_LENGTH)); + return -1; + } + + FILE_LOG(logDEBUG1, ("Reading Pattern - Word (addr:%d)\n", addr)); + uint32_t addr = PATTERN_CNTRL_REG; + + // overwrite with only addr + bus_w(addr, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK)); + + // set read strobe + bus_w(addr, bus_r(addr) | PATTERN_CNTRL_RD_MSK); + + // read value + uint64_t retval = get64BitReg(PATTERN_OUT_LSB_REG, PATTERN_OUT_MSB_REG); + FILE_LOG(logDEBUG1, ("\tWord(addr:%d): 0x%llx\n", addr, (long long int) retval)); + + // unset read strobe + bus_w(addr, bus_r(addr) & (~PATTERN_CNTRL_RD_MSK)); + + return retval; +} + +uint64_t writePatternWord(int addr, uint64_t word) { + // get + if (word != -1) + return readPatternWord(addr); + + // error (handled in tcp) + if (addr < 0 || addr >= MAX_PATTERN_LENGTH) { + FILE_LOG(logERROR, ("Cannot set Pattern - Word. Invalid addr %d. " + "Should be within %d\n", addr, MAX_PATTERN_LENGTH)); + return -1; + } + + FILE_LOG(logINFO, ("Setting Pattern - Word (addr:%d, word:0x%llx)\n", addr, (long long int) word)); + uint32_t addr = PATTERN_CNTRL_REG; + + // write word + set64BitReg(word, PATTERN_IN_LSB_REG, PATTERN_IN_MSB_REG); + + // overwrite with only addr + bus_w(addr, ((addr << PATTERN_CNTRL_ADDR_OFST) & PATTERN_CNTRL_ADDR_MSK)); + + // set write strobe + bus_w(addr, bus_r(addr) | PATTERN_CNTRL_WR_MSK); + + // unset write strobe + bus_w(addr, bus_r(addr) & (~PATTERN_CNTRL_WR_MSK)); + + return readPatternWord(addr); +} + +int setPatternWaitAddress(int level, int addr) { + + // error (handled in tcp) + if (addr >= (MAX_PATTERN_LENGTH + 1)) { + FILE_LOG(logERROR, ("Cannot set Pattern - Wait Address. Invalid addr %d. " + "Should be within %d\n", addr, MAX_PATTERN_LENGTH + 1)); + return -1; + } + + uint32_t reg = 0; + uint32_t offset = 0; + uint32_t mask = 0; + + switch (level) { + case 0: + reg = PATTERN_WAIT_0_ADDR_REG; + offset = PATTERN_WAIT_0_ADDR_OFST; + mask = PATTERN_WAIT_0_ADDR_MSK; + break; + case 1: + reg = PATTERN_WAIT_1_ADDR_REG; + offset = PATTERN_WAIT_1_ADDR_OFST; + mask = PATTERN_WAIT_1_ADDR_MSK; + break; + case 2: + reg = PATTERN_WAIT_2_ADDR_REG; + offset = PATTERN_WAIT_2_ADDR_OFST; + mask = PATTERN_WAIT_2_ADDR_MSK; + break; + default: + FILE_LOG(logERROR, ("Cannot set Pattern - Wait Address. Invalid level %d. " + "Should be between 0 and 2.\n", level)); + return -1; + } + + // set + if (addr >= 0) { + FILE_LOG(logINFO, ("Setting Pattern - Wait Address (level:%d, addr:%d)\n", level, addr)); + bus_w(reg, ((addr << offset) & mask)); + } + + // get + uint32_t regval = bus_r((reg & mask) >> offset); + FILE_LOG(logDEBUG1, ("\tWait Address (level:%d, addr:%d)\n", level, regval)); + return regval; +} + +uint64_t setPatternWaitTime(int level, uint64_t t) { + uint32_t regl = 0; + uint32_t regm = 0; + + switch (level) { + case 0: + regl = PATTERN_WAIT_TIMER_0_LSB_REG; + regm = PATTERN_WAIT_TIMER_0_MSB_REG; + break; + case 1: + regl = PATTERN_WAIT_TIMER_1_LSB_REG; + regm = PATTERN_WAIT_TIMER_1_MSB_REG; + break; + case 2: + regl = PATTERN_WAIT_TIMER_2_LSB_REG; + regm = PATTERN_WAIT_TIMER_2_MSB_REG; + break; + default: + FILE_LOG(logERROR, ("Cannot set Pattern - Wait Time. Invalid level %d. " + "Should be between 0 and 2.\n", level)); + return -1; + } + + // set + if (t >= 0) { + FILE_LOG(logINFO, ("Setting Pattern - Wait Time (level:%d, t:%lld)\n", level, (long long int)t)); + set64BitReg(t, regl, regm); + } + + // get + uint32_t regval = get64BitReg(regl, regm); + FILE_LOG(logDEBUG1, ("\tWait Time (level:%d, t:%lld)\n", level, (long long int)regval)); + return regval; +} + +void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop) { + + // level 0-2, addr upto patternlength + 1 (checked at tcp) + if ((level != -1) && (*startAddr > (MAX_PATTERN_LENGTH + 1) || *stopAddr > (MAX_PATTERN_LENGTH + 1))) { + FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n", + level, addr, MAX_PATTERN_LENGTH + 1)); + } + + //level -1, addr upto patternlength (checked at tcp) + else if ((level == -1) && (*startAddr > MAX_PATTERN_LENGTH || *stopAddr > MAX_PATTERN_LENGTH)) { + FILE_LOG(logERROR, ("Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n", + addr, MAX_PATTERN_LENGTH)); + } + + uint32_t addr = 0; + uint32_t nLoopReg = 0; + uint32_t startOffset = 0; + uint32_t startMask = 0; + uint32_t stopOffset = 0; + uint32_t stopMask = 0; + + switch (level) { + case 0: + addr = PATTERN_LOOP_0_ADDR_REG; + nLoopReg = PATTERN_LOOP_0_ITERATION_REG; + startOffset = PATTERN_LOOP_0_ADDR_STRT_OFST; + startMask = PATTERN_LOOP_0_ADDR_STRT_MSK; + stopOffset = PATTERN_LOOP_0_ADDR_STP_OFST; + stopMask = PATTERN_LOOP_0_ADDR_STP_MSK; + break; + case 1: + addr = PATTERN_LOOP_1_ADDR_REG; + nLoopReg = PATTERN_LOOP_1_ITERATION_REG; + startOffset = PATTERN_LOOP_1_ADDR_STRT_OFST; + startMask = PATTERN_LOOP_1_ADDR_STRT_MSK; + stopOffset = PATTERN_LOOP_1_ADDR_STP_OFST; + stopMask = PATTERN_LOOP_1_ADDR_STP_MSK; + break; + case 2: + addr = PATTERN_LOOP_2_ADDR_REG; + nLoopReg = PATTERN_LOOP_2_ITERATION_REG; + startOffset = PATTERN_LOOP_2_ADDR_STRT_OFST; + startMask = PATTERN_LOOP_2_ADDR_STRT_MSK; + stopOffset = PATTERN_LOOP_2_ADDR_STP_OFST; + stopMask = PATTERN_LOOP_2_ADDR_STP_MSK; + break; + case -1: + // complete pattern + addr = PATTERN_LIMIT_REG; + nLoopReg = -1; + break; + default: + // already checked at tcp interface + FILE_LOG(logERROR, ("Cannot set Pattern - Pattern loop. Invalid level %d. " + "Should be between -1 and 2.\n", level)); + *startAddr = 0; + *stopAddr = 0; + *nLoop = 0; + } + + // set iterations + if (level >= 0) { + // set iteration + if (*nLoop >= 0) { + FILE_LOG(logINFO, ("Setting Pattern - Pattern Loop (level:%d, nLoop:%d)\n", + level, nLoop)); + bus_w(nLoopReg, *nLoop); + } + *nLoop = bus_r(nLoopReg); + } + + // set start and stop addr + if (*startAddr == -1) { + *startAddr = ((bus_r(addr) >> startOffset) & startMask); + FILE_LOG(logINFO, ("Setting Pattern - Pattern Loop Start Address (level:%d, startAddr:%d was -1)\n", + level, *startAddr)); + } + if (*stopAddr == -1) { + *stopAddr = ((bus_r(addr) >> stopOffset) & stopMask); + FILE_LOG(logINFO, ("Setting Pattern - Pattern Loop Stop Address (level:%d, stopAddr:%d, was -1)\n", + level, *stopAddr)); + } + + // writing start and stop addr + FILE_LOG(logINFO, ("Setting Pattern - Pattern Loop (level:%d, startaddr:%d, stopaddr:%d)\n", + level, *startAddr, *stopAddr)); + bus_w(addr, ((*startAddr << startOffset) & startMask) | ((*stopAddr << stopOffset) & stopMask)); +} + + +/* aquisition */ + +int startStateMachine(){ +#ifdef VIRTUAL + virtual_status = 1; + virtual_stop = 0; + if(pthread_create(&pthread_virtual_tid, NULL, &start_timer, NULL)) { + virtual_status = 0; + FILE_LOG(logERROR, ("Could not start Virtual acquisition thread\n")); + return FAIL; + } + FILE_LOG(logINFOGREEN, ("Virtual Acquisition started\n")); + return OK; +#endif + FILE_LOG(logINFOBLUE, ("Starting State Machine\n")); + + cleanFifos(); + unsetFifoReadStrobes(); // FIXME: unnecessary to write bus_w(dumm, 0) as it is 0 in the beginnig and the strobes are always unset if set + + // point the data pointer to the starting position of data + now_ptr = (char*)ram_values; + + //start state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STRT_ACQSTN_MSK | CONTROL_STRT_EXPSR_MSK); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STRT_ACQSTN_MSK & ~CONTROL_STRT_EXPSR_MSK); + + FILE_LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); + return OK; +} + + +#ifdef VIRTUAL +void* start_timer(void* arg) { + int wait_in_s = (setTimer(FRAME_NUMBER, -1) * + setTimer(CYCLES_NUMBER, -1) * + (setTimer(FRAME_PERIOD, -1)/(1E9))); + FILE_LOG(logDEBUG1, ("going to wait for %d s\n", wait_in_s)); + while(!virtual_stop && (wait_in_s >= 0)) { + usleep(1000 * 1000); + wait_in_s--; + } + FILE_LOG(logINFOGREEN, ("Virtual Timer Done\n")); + + virtual_status = 0; + return NULL; +} +#endif + +int stopStateMachine(){ + FILE_LOG(logINFORED, ("Stopping State Machine\n")); +#ifdef VIRTUAL + virtual_stop = 0; + return OK; +#endif + //stop state machine + bus_w(CONTROL_REG, bus_r(CONTROL_REG) | CONTROL_STP_ACQSTN_MSK); + usleep(WAIT_TIME_US_STP_ACQ); + bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_STP_ACQSTN_MSK); + + FILE_LOG(logINFO, ("Status Register: %08x\n",bus_r(STATUS_REG))); + return OK; +} + + + + + +enum runStatus getRunStatus(){ +#ifdef VIRTUAL + if(virtual_status == 0){ + FILE_LOG(logINFOBLUE, ("Status: IDLE\n")); + return IDLE; + }else{ + FILE_LOG(logINFOBLUE, ("Status: RUNNING\n")); + return RUNNING; + } +#endif + FILE_LOG(logDEBUG1, ("Getting status\n")); + + uint32_t retval = bus_r(STATUS_REG); + FILE_LOG(logINFO, ("Status Register: %08x\n",retval)); + + // error + if (retval & STATUS_SM_FF_FLL_MSK) { + FILE_LOG(logINFORED, ("Status: Error (Some fifo full)\n")); + return ERROR; + } + + // running + if(retval & STATUS_RN_BSY_MSK) { + if (retval & STATUS_WTNG_FR_TRGGR_MSK) { + FILE_LOG(logINFOBLUE, ("Status: Waiting for Trigger\n")); + return WAITING; + } + + FILE_LOG(logINFOBLUE, ("Status: Running\n")); + return RUNNING; + + } + + // not running + else { + if (retval & STATUS_STPPD_MSK) { + FILE_LOG(logINFOBLUE, ("Status: Stopped\n")); + return STOPPED; + } + + if (retval & STATUS_FRM_RN_BSY_MSK) { + FILE_LOG(logINFOBLUE, ("Status: Transmitting (Read machine busy)\n")); + return TRANSMITTING; + } + + if (retval & STATUS_ALL_FF_EMPTY_MSK) { + FILE_LOG(logINFOBLUE, ("Status: Transmitting (All fifo empty)\n")); + return TRANSMITTING; + } + + if (! (retval & STATUS_IDLE_MSK)) { + FILE_LOG(logINFOBLUE, ("Status: Idle\n")); + return IDLE; + } + + FILE_LOG(logERROR, ("Status: Unknown status %08x\n", retval)); + return ERROR; + } +} + + + +void readframe(int *ret, char *mess){ +#ifdef VIRTUAL + while(virtual_status) { + //FILE_LOG(logERROR, ("Waiting for finished flag\n"); + usleep(5000); + } + return; +#endif + // wait for status to be done + while(runBusy()){ + usleep(500); // random + } + + // frames left to give status + int64_t retval = getTimeLeft(FRAME_NUMBER) + 2; + if ( retval > 1) { + *ret = (int)FAIL; + sprintf(mess,"No data and run stopped: %lld frames left\n",(long long int)retval); + FILE_LOG(logERROR, (mess)); + } else { + *ret = (int)OK; + FILE_LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } +} + +void unsetFifoReadStrobes() { + bus_w(DUMMY_REG, bus_r(addr) & (~DUMMY_ALL_FIFO_RD_STRBE_MSK) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK)); +} + +void readSample() { + uint32_t addr = DUMMY_REG; + uint32_t fifoAddr = FIFO_DATA_REG; + + // read adcs + if (analogEnable) { + + // read strobe to all adc fifos + bus_w(addr, bus_r(addr) | DUMMY_ALL_FIFO_RD_STRBE_MSK); + bus_w(addr, bus_r(addr) & (~DUMMY_ALL_FIFO_RD_STRBE_MSK)); + + // loop through all channels + int ich = 0; + for (ich = 0; ich < NCHAN_ANALOG; ++ich) { + + // if channel is in ROI + if ((1 << ich) & ~(adcDisableMask)) { + + // unselect channel + bus_w(addr, bus_r(addr) & ~(DUMMY_FIFO_CHNNL_SLCT_MSK)); + + // select channel + bus_w(addr, bus_r(addr) | ((ich << DUMMY_FIFO_CHNNL_SLCT_OFST) & DUMMY_FIFO_CHNNL_SLCT_MSK)); + + // read fifo and write it to current position of data pointer + *((uint16_t*)now_ptr) = bus_r16(fifoAddr); + + // keep reading till the value is the same + while (*((uint16_t*)now_ptr) != bus_r16(fifoAddr)) { + *((uint16_t*)now_ptr) = bus_r16(fifoAddr); + FILE_LOG(logDEBUG1, ("")) + } + + // increment pointer to data out destination + now_ptr += 2; + } + } + } + + // read digital output + if (digitalEnable) { + + // read strobe to digital fifo + bus_w(addr, bus_r(addr) | DUMMY_DGTL_FIFO_RD_STRBE_MSK); + bus_w(addr, bus_r(addr) & (~DUMMY_DGTL_FIFO_RD_STRBE_MSK)); + + // read fifo and write it to current position of data pointer + *((uint64_t*)now_ptr) = get64BitReg(FIFO_DIN_LSB_REG, FIFO_DIN_MSB_REG); + now_ptr += 8; + } +} + +// only called for first sample +int checkDataPresent() { + uint32_t dataPresent = bus_r(LOOK_AT_ME_REG); + // as long as fifo empty (keep checking) + while (!dataPresent) { + // acquisition done + if (!runBusy()) { + usleep(WAIT_TME_US_FR_LK_AT_ME_REG); + dataPresent = bus_r(LOOK_AT_ME_REG); + // still no data + if (!dataPresent) { + FILE_LOG(logERROR, ("Acquisition Finished (State: 0x%08x), " + "but no frame found (Look_at_me: 0x%08x).\n", retval)); + return FAIL; + } + // got data, exit + else { + break; + } + } + // check if fifo empty again + dataPresent = bus_r(LOOK_AT_ME_REG); + } + return OK; +} + +int readFrameFromFifo() { + int ns = 0; + + // no data for this frame + if (checkDataPresent(ns) == FAIL) { + return FAIL; + } + + // read Sample + while(ns < nSamples) { + readSample(ns); + ns++; + } + + // got frame + return OK; +} + +uint32_t runBusy() { +#ifdef VIRTUAL + return virtual_status; +#endif + uint32_t s = (bus_r(STATUS_REG) & STATUS_RN_BSY_MSK); + FILE_LOG(logDEBUG1, ("Status Register: %08x\n", s)); + return s; +} + + + + + + + + +/* common */ + +int calculateDataBytes(){ + return DATA_BYTES; +} + +int getTotalNumberOfChannels(){return ((int)getNumberOfChannelsPerChip() * (int)getNumberOfChips());} +int getNumberOfChips(){return NCHIP;} +int getNumberOfDACs(){return NDAC;} +int getNumberOfChannelsPerChip(){return NCHAN;} + + diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.h b/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.h new file mode 120000 index 000000000..345b8c029 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorFunctionList.h @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorFunctionList.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorServer.c b/slsDetectorServers/ctbDetectorServer/slsDetectorServer.c new file mode 120000 index 000000000..a7eb59acb --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorServer.c @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorServer.c \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h new file mode 100644 index 000000000..d6e24397a --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_defs.h @@ -0,0 +1,187 @@ +#pragma once +#include "sls_detector_defs.h" +#include "RegisterDefs.h" + + +#define GOODBYE (-200) +#define MIN_REQRD_VRSN_T_RD_API 0x180314 +#define REQRD_FRMWR_VRSN 0x180314 + +#define PROGRAMMING_MODE (0x2) +#define CTRL_SRVR_INIT_TIME_US (300 * 1000) + +#ifdef JCTB +#define DETNAME = "Jungfrau Chip Test Board"; +#else +#define DETNAME = "Chip Test Board"; +#endif + +/* Struct Definitions */ +typedef struct ip_header_struct { + uint16_t ip_len; + uint8_t ip_tos; + uint8_t ip_ihl:4 ,ip_ver:4; + uint16_t ip_offset:13,ip_flag:3; + uint16_t ip_ident; + uint16_t ip_chksum; + uint8_t ip_protocol; + uint8_t ip_ttl; + uint32_t ip_sourceip; + uint32_t ip_destip; +} ip_header; + +/* Enums */ +enum CLKINDEX {RUN_CLK, ADC_CLK, SYNC_CLK, DBIT_CLK, NUM_CLOCKS}; +enum ADCINDEX {V_PWR_IO, V_PWR_A, V_PWR_B, V_PWR_C, V_PWR_D, I_PWR_IO, I_PWR_A, I_PWR_B, I_PWR_C, I_PWR_D}; +enum DACINDEX {D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, + D10, D11, D12, D13, D14, D15, D16, D17, + D_PWR_D, D_PWR_CHIP, D_PWR_C, D_PWR_B, D_PWR_A, D_PWR_IO}; + +/* Hardware Definitions */ +#define NCHAN (36) +#define NCHAN_ANALOG (32) +#define NCHAN_DIGITAL (4) +#define NCHIP (1) +#define NDAC (24) +#define NPWR (6) +#define NDAC_ONLY (NDAC - NPWR) +//#define N_DAC (24) +//#define N_PWR (5) +//#define NADC (9) +//#define DAC_CMD_OFF 20 +#define DYNAMIC_RANGE (16) +#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) +#define CLK_FREQ (156.25) /* MHz */ +#define I2C_POWER_VIO_DEVICE_ID (0x40) +#define I2C_POWER_VA_DEVICE_ID (0x41) +#define I2C_POWER_VB_DEVICE_ID (0x42) +#define I2C_POWER_VC_DEVICE_ID (0x43) +#define I2C_POWER_VD_DEVICE_ID (0x44) +#define I2C_SHUNT_RESISTER_OHMS (0.005) + +/** Default Parameters */ +#define DEFAULT_DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) +#define DEFAULT_NUM_SAMPLES (1) +#define DEFAULT_NUM_FRAMES (100 * 1000 * 1000) +#define DEFAULT_NUM_CYCLES (1) +#define DEFAULT_PERIOD (1 * 1000 * 1000) //ns +#define DEFAULT_DELAY (0) +#define DEFAULT_HIGH_VOLTAGE (0) +#define DEFAULT_VLIMIT (-100) +#define DEFAULT_TIMING_MODE (AUTO_TIMING) +#define DEFAULT_TX_UDP_PORT (0x7e9a) + +/* Defines in the Firmware */ +#define WAIT_TME_US_FR_LK_AT_ME_REG (100) // wait time in us after acquisition done to ensure there is no data in fifo +#define WAIT_TIME_US_PLL (10 * 1000) +#define WAIT_TIME_US_STP_ACQ (100) +#define WAIT_TIME_CONFIGURE_MAC (500 * 1000) + +#define SLOW_ADC_START_INDEX (1000) +#define SLOW_ADC_END_INDEX (1008) + +#define MAX_DAC_VOLTAGE_VALUE (2500) +#define MAX_DAC_UNIT_VALUE (4096) +#define DAC_MAX_VOLTAGE_MV (2500) +#define VCHIP_MAX_MV (2700) +#define VCHIP_MIN_MV (1700) +#define POWER_RGLTR_MAX (2500) +#define POWER_RGLTR_MIN (600) +#define VCHIP_POWER_INCRMNT (200) + +#define IP_PACKETSIZE (0x2032) +#ifndef JCTB +#define ADC_PORT_INVERT_VAL (0x453b2593) +#else +#define ADC_PORT_INVERT_VAL (0x453b2593) +#endif +#define MAXIMUM_ADC_CLK (40) +#define PLL_VCO_FREQ_MHZ (400) + +/* MSB & LSB DEFINES */ +#define MSB_OF_64_BIT_REG_OFST (32) +#define LSB_OF_64_BIT_REG_OFST (0) +#define BIT_32_MSK (0xFFFFFFFF) + +/* LTC2620 DAC DEFINES */ +#define LTC2620_DAC_CMD_OFST (20) +#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_ADDR_OFST (16) +#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST) +#define LTC2620_DAC_DATA_OFST (4) +#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST) + +#define LTC2620_DAC_CMD_WRITE (0x00000000 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_CMD_SET (0x00000003 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST) +#define LTC2620_DAC_NUMBITS (24) + +/* MAX1932 HV DEFINES */ +#define MAX1932_HV_NUMBITS (8) +#define MAX1932_HV_DATA_OFST (0) +#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST) + +/** PLL Reconfiguration Registers */ +//https://www.altera.com/documentation/mcn1424769382940.html +#define PLL_MODE_REG (0x00) + +#define PLL_MODE_WT_RQUST_VAL (0) +#define PLL_MODE_PLLNG_MD_VAL (1) + +#define PLL_STATUS_REG (0x01) +#define PLL_START_REG (0x02) +#define PLL_N_COUNTER_REG (0x03) +#define PLL_M_COUNTER_REG (0x04) +#define PLL_C_COUNTER_REG (0x05) + +#define PLL_C_COUNTER_LW_CNT_OFST (0) +#define PLL_C_COUNTER_LW_CNT_MSK (0x000000FF << PLL_C_COUNTER_LW_CNT_OFST) +#define PLL_C_COUNTER_HGH_CNT_OFST (8) +#define PLL_C_COUNTER_HGH_CNT_MSK (0x000000FF << PLL_C_COUNTER_HGH_CNT_OFST) +/* total_div = lw_cnt + hgh_cnt */ +#define PLL_C_COUNTER_BYPSS_ENBL_OFST (16) +#define PLL_C_COUNTER_BYPSS_ENBL_MSK (0x00000001 << PLL_C_COUNTER_BYPSS_ENBL_OFST) +/* if bypss_enbl = 0, fout = f(vco)/total_div; else fout = f(vco) (c counter is bypassed) */ +#define PLL_C_COUNTER_ODD_DVSN_OFST (17) +#define PLL_C_COUNTER_ODD_DVSN_MSK (0x00000001 << PLL_C_COUNTER_ODD_DVSN_OFST) +/** if odd_dvsn = 0 (even), duty cycle = hgh_cnt/ total_div; else duty cycle = (hgh_cnt - 0.5) / total_div */ +#define PLL_C_COUNTER_SLCT_OFST (18) +#define PLL_C_COUNTER_SLCT_MSK (0x0000001F << PLL_C_COUNTER_SLCT_OFST) + +#define PLL_PHASE_SHIFT_REG (0x06) + +#define PLL_SHIFT_NUM_SHIFTS_OFST (0) +#define PLL_SHIFT_NUM_SHIFTS_MSK (0x0000FFFF << PLL_SHIFT_NUM_SHIFTS_OFST) + +#define PLL_SHIFT_CNT_SELECT_OFST (16) +#define PLL_SHIFT_CNT_SELECT_MSK (0x0000001F << PLL_SHIFT_CNT_SELECT_OFST) +#define PLL_SHIFT_CNT_SLCT_C0_VAL ((0x0 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C1_VAL ((0x1 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C2_VAL ((0x2 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C3_VAL ((0x3 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C4_VAL ((0x4 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C5_VAL ((0x5 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C6_VAL ((0x6 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C7_VAL ((0x7 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C8_VAL ((0x8 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C9_VAL ((0x9 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C10_VAL ((0x10 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C11_VAL ((0x11 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C12_VAL ((0x12 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C13_VAL ((0x13 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C14_VAL ((0x14 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C15_VAL ((0x15 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C16_VAL ((0x16 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) +#define PLL_SHIFT_CNT_SLCT_C17_VAL ((0x17 << PLL_SHIFT_CNT_SELECT_OFST) & PLL_SHIFT_CNT_SELECT_MSK) + +#define PLL_SHIFT_UP_DOWN_OFST (21) +#define PLL_SHIFT_UP_DOWN_MSK (0x00000001 << PLL_SHIFT_UP_DOWN_OFST) +#define PLL_SHIFT_UP_DOWN_NEG_VAL ((0x0 << PLL_SHIFT_UP_DOWN_OFST) & PLL_SHIFT_UP_DOWN_MSK) +#define PLL_SHIFT_UP_DOWN_POS_VAL ((0x1 << PLL_SHIFT_UP_DOWN_OFST) & PLL_SHIFT_UP_DOWN_MSK) + +#define PLL_K_COUNTER_REG (0x07) +#define PLL_BANDWIDTH_REG (0x08) +#define PLL_CHARGEPUMP_REG (0x09) +#define PLL_VCO_DIV_REG (0x1c) +#define PLL_MIF_REG (0x1f) + diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorServer_funcs.c b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_funcs.c new file mode 120000 index 000000000..a7532ccd4 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_funcs.c @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorServer_funcs.c \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/slsDetectorServer_funcs.h b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_funcs.h new file mode 120000 index 000000000..7569daf47 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/slsDetectorServer_funcs.h @@ -0,0 +1 @@ +../slsDetectorServer/slsDetectorServer_funcs.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/sls_detector_defs.h b/slsDetectorServers/ctbDetectorServer/sls_detector_defs.h new file mode 120000 index 000000000..2af30d73a --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/sls_detector_defs.h @@ -0,0 +1 @@ +../../slsSupportLib/include/sls_detector_defs.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/sls_detector_funcs.h b/slsDetectorServers/ctbDetectorServer/sls_detector_funcs.h new file mode 120000 index 000000000..3f48959a9 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/sls_detector_funcs.h @@ -0,0 +1 @@ +../../slsSupportLib/include/sls_detector_funcs.h \ No newline at end of file diff --git a/slsDetectorServers/ctbDetectorServer/updateAPIVersion.sh b/slsDetectorServers/ctbDetectorServer/updateAPIVersion.sh new file mode 100755 index 000000000..783125033 --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/updateAPIVersion.sh @@ -0,0 +1,7 @@ +SRCFILE=gitInfoCtb.h +DSTFILE=versionAPI.h + +SRCPATTERN=GITDATE +DSTPATTERN=APICTB + +awk -v a="$SRCFILE" -v b="$DSTFILE" -v c="$SRCPATTERN" -v d="$DSTPATTERN" 'FNR==NR&&$2==c{x=$3} NR!=FNR{if($2==d){$3="0x"substr(x,5)}print > b}' $SRCFILE $DSTFILE \ No newline at end of file diff --git a/slsDetectorServers/jctbDetectorServer/updateGitVersion.sh b/slsDetectorServers/ctbDetectorServer/updateGitVersion.sh similarity index 72% rename from slsDetectorServers/jctbDetectorServer/updateGitVersion.sh rename to slsDetectorServers/ctbDetectorServer/updateGitVersion.sh index d71336dcb..6f43c0150 100755 --- a/slsDetectorServers/jctbDetectorServer/updateGitVersion.sh +++ b/slsDetectorServers/ctbDetectorServer/updateGitVersion.sh @@ -1,8 +1,8 @@ -SERVER=jctbDetectorServer -MAINDIR=slsDetectorsPackage -SPECDIR=slsDetectorSoftware/$SERVER -TMPFILE=gitInfoMoenchTmp.h -INCLFILE=gitInfoMoench.h +SERVER=ctbDetectorServer +MAINDIR=slsDetectorPackage +SPECDIR=slsDetectorServers/$SERVER +TMPFILE=gitInfoCtbTmp.h +INCLFILE=gitInfoCtb.h #evaluate the variables @@ -12,7 +12,7 @@ source $EVALFILE #get modified date #RDATE1='git log --pretty=format:"%ci" -1' -RDATE1="find . -type f -exec stat --format '%Y :%y %n' '{}' \; | sort -nr | cut -d: -f2- | egrep -v 'gitInfo|.git|updateGitVersion|.o' | head -n 1" +RDATE1="find ../slsDetectorServer . -type f -exec stat --format '%Y :%y %n' '{}' \; | sort -nr | cut -d: -f2- | egrep -v 'gitInfo|bin|.git|updateGitVersion|.o' | head -n 1" RDATE=`eval $RDATE1` NEWDATE=$(sed "s/-//g" <<< $RDATE | awk '{print $1;}') NEWDATE=${NEWDATE/#/0x} diff --git a/slsDetectorServers/ctbDetectorServer/versionAPI.h b/slsDetectorServers/ctbDetectorServer/versionAPI.h new file mode 120000 index 000000000..5e580d8bb --- /dev/null +++ b/slsDetectorServers/ctbDetectorServer/versionAPI.h @@ -0,0 +1 @@ +../../slsSupportLib/include/versionAPI.h \ No newline at end of file diff --git a/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c index 9af050bcc..46c8f900d 100644 --- a/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/eigerDetectorServer/slsDetectorFunctionList.c @@ -435,7 +435,7 @@ void setupDetector() { setReadOutFlags(DEFAULT_READOUT_MODE); setReadOutFlags(DEFAULT_READOUT_STOREINRAM_MODE); setReadOutFlags(DEFAULT_READOUT_OVERFLOW32_MODE); - setSpeed(DEFAULT_CLK_SPEED);//clk_devider,half speed + setSpeed(CLOCK_DIVIDER, DEFAULT_CLK_SPEED);//clk_devider,half speed setIODelay(DEFAULT_IO_DELAY); setTiming(DEFAULT_TIMING_MODE); //SetPhotonEnergyCalibrationParameters(-5.8381e-5,1.838515,5.09948e-7,-4.32390e-11,1.32527e-15); @@ -509,7 +509,9 @@ int setDynamicRange(int dr) { /* parameters - readout */ -enum speedVariable setSpeed(int val) { +void setSpeed(enum speedVariable ind, int val) { + if (ind != CLOCK_DIVIDER) + return; if (val != -1) { FILE_LOG(logDEBUG1, ("Setting Read out Speed: %d\n", val)); @@ -518,7 +520,12 @@ enum speedVariable setSpeed(int val) { #endif eiger_readoutspeed = val; } - return eiger_readoutspeed; +} + +int getSpeed(enum speedVariable ind) { + if (ind != CLOCK_DIVIDER) + return -1; + return eiger_readoutspeed; } diff --git a/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h index 4a3c167ad..ed42a747a 100644 --- a/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/eigerDetectorServer/slsDetectorServer_defs.h @@ -74,6 +74,9 @@ enum {E_PARALLEL, E_NON_PARALLEL, E_SAFE}; #define DEFAULT_TEST_MODE (0) #define DEFAULT_HIGH_VOLTAGE (0) +#define MAX_DAC_VOLTAGE_VALUE (2048) +#define MAX_DAC_UNIT_VALUE (4096) + #define MAX_SUBFRAME_EXPOSURE_VAL_IN_10NS (0x1FFFFFFF) /** 29 bit register for max subframe exposure value */ diff --git a/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h b/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h index 858753de3..299fd6c2d 100755 --- a/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h +++ b/slsDetectorServers/gotthardDetectorServer/RegisterDefs.h @@ -116,7 +116,6 @@ #define ADC_SYNC_ENET_DELAY_MSK (0x000000FF << ADC_SYNC_ENET_DELAY_OFST) #define ADC_SYNC_ENET_DELAY_NO_ROI_VAL ((0x88 << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) #define ADC_SYNC_ENET_DELAY_ROI_VAL ((0x1b << ADC_SYNC_ENET_DELAY_OFST) & ADC_SYNC_ENET_DELAY_MSK) -//FIXME: try with just 0x8 and 0x1.. it is anded with 0000 in firmware anyway /** Time From Start register */ //#define MU_TIME_REG (0x1a << MEM_MAP_SHIFT) diff --git a/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c index c0d65abb8..124d2aa4d 100644 --- a/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c +++ b/slsDetectorServers/gotthardDetectorServer/slsDetectorFunctionList.c @@ -783,7 +783,6 @@ ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret) { int i = 0; for (i = 0; i < n; ++i) { FILE_LOG(logINFO, ("\t(%d, %d)\n", arg[i].xmin, arg[i].xmax)); - } } // only one ROI allowed per module diff --git a/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h index 1ceb69de1..d865ba806 100644 --- a/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/gotthardDetectorServer/slsDetectorServer_defs.h @@ -51,6 +51,9 @@ enum DACINDEX {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN #define DEFAULT_PHASE_SHIFT (120) #define DEFAULT_TX_UDP_PORT (0xE185) +#define MAX_DAC_VOLTAGE_VALUE (2500) +#define MAX_DAC_UNIT_VALUE (4096) + /* LTC2620 DAC DEFINES *///FIXME: if neeeded #define LTC2620_DAC_CMD_OFST (20) #define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST) diff --git a/slsDetectorServers/jctbDetectorServer/AD9257.h b/slsDetectorServers/jctbDetectorServer/AD9257.h deleted file mode 100755 index a716af64c..000000000 --- a/slsDetectorServers/jctbDetectorServer/AD9257.h +++ /dev/null @@ -1,141 +0,0 @@ -#ifndef AD9257_H -#define AD9257_H - -#include "ansi.h" - -#include "commonServerFunctions.h" -#include - -/* AD9257 ADC DEFINES */ -#define AD9257_ADC_NUMBITS (24) - -#define AD9257_DEV_IND_2_REG (0x04) -#define AD9257_CHAN_H_OFST (0) -#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST) -#define AD9257_CHAN_G_OFST (1) -#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST) -#define AD9257_CHAN_F_OFST (2) -#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST) -#define AD9257_CHAN_E_OFST (3) -#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST) - -#define AD9257_DEV_IND_1_REG (0x05) -#define AD9257_CHAN_D_OFST (0) -#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST) -#define AD9257_CHAN_C_OFST (1) -#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST) -#define AD9257_CHAN_B_OFST (2) -#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST) -#define AD9257_CHAN_A_OFST (3) -#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST) -#define AD9257_CLK_CH_DCO_OFST (4) -#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST) -#define AD9257_CLK_CH_IFCO_OFST (5) -#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST) - -#define AD9257_POWER_MODE_REG (0x08) -#define AD9257_POWER_INTERNAL_OFST (0) -#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST) -#define AD9257_INT_RESET_VAL (0x3) -#define AD9257_INT_CHIP_RUN_VAL (0x0) -#define AD9257_POWER_EXTERNAL_OFST (5) -#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST) -#define AD9257_EXT_FULL_POWER_VAL (0x0) -#define AD9257_EXT_STANDBY_VAL (0x1) - -#define AD9257_OUT_MODE_REG (0x14) -#define AD9257_OUT_FORMAT_OFST (0) -#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST) -#define AD9257_OUT_BINARY_OFST_VAL (0) -#define AD9257_OUT_TWOS_COMPL_VAL (1) -#define AD9257_OUT_LVDS_OPT_OFST (6) -#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST) -#define AD9257_OUT_LVDS_ANSI_VAL (0) -#define AD9257_OUT_LVDS_IEEE_VAL (1) - -#define AD9257_OUT_PHASE_REG (0x16) -#define AD9257_OUT_CLK_OFST (0) -#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST) -#define AD9257_OUT_CLK_60_VAL (0x1) -#define AD9257_IN_CLK_OFST (4) -#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST) -#define AD9257_IN_CLK_0_VAL (0x0) - -#define AD9257_VREF_REG (0x18) -#define AD9257_VREF_OFST (0) -#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST) -#define AD9257_VREF_1_33_VAL (0x2) - -#define AD9257_TEST_MODE_REG (0x0D) -#define AD9257_OUT_TEST_OFST (0) -#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST) -#define AD9257_NONE_VAL (0x0) -#define AD9257_MIXED_BIT_FREQ_VAL (0xC) -#define AD9257_TEST_RESET_SHORT_GEN (4) -#define AD9257_TEST_RESET_LONG_GEN (5) -#define AD9257_USER_IN_MODE_OFST (6) -#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST) - - -void setAdc(int addr, int val) { - - u_int32_t codata; - codata = val + (addr << 8); - printf(" Setting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr); - serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS, - ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST); -} - -void prepareADC(){ - printf("\n\nPreparing ADC ... \n"); - - //power mode reset - printf("power mode reset:\n"); - setAdc(AD9257_POWER_MODE_REG, - (AD9257_INT_RESET_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); - - //power mode chip run - printf("power mode chip run:\n"); - setAdc(AD9257_POWER_MODE_REG, - (AD9257_INT_CHIP_RUN_VAL << AD9257_POWER_INTERNAL_OFST) & AD9257_POWER_INTERNAL_MSK); - - //output clock phase - printf("output clock phase:\n"); - setAdc(AD9257_OUT_PHASE_REG, - (AD9257_OUT_CLK_60_VAL << AD9257_OUT_CLK_OFST) & AD9257_OUT_CLK_MSK); - - // lvds-iee reduced , binary offset - printf("lvds-iee reduced, binary offset:\n"); - setAdc(AD9257_OUT_MODE_REG, - (AD9257_OUT_LVDS_IEEE_VAL << AD9257_OUT_LVDS_OPT_OFST) & AD9257_OUT_LVDS_OPT_MSK); - - // all devices on chip to receive next command - printf("all devices on chip to receive next command:\n"); - setAdc(AD9257_DEV_IND_2_REG, - AD9257_CHAN_H_MSK | AD9257_CHAN_G_MSK | AD9257_CHAN_F_MSK | AD9257_CHAN_E_MSK); - setAdc(AD9257_DEV_IND_1_REG, - AD9257_CHAN_D_MSK | AD9257_CHAN_C_MSK | AD9257_CHAN_B_MSK | AD9257_CHAN_A_MSK | - AD9257_CLK_CH_DCO_MSK | AD9257_CLK_CH_IFCO_MSK); - - // vref 1.33 - printf("vref 1.33:\n"); - setAdc(AD9257_VREF_REG, - (AD9257_VREF_1_33_VAL << AD9257_VREF_OFST) & AD9257_VREF_MSK); - - // no test mode - printf("no test mode:\n"); - setAdc(AD9257_TEST_MODE_REG, - (AD9257_NONE_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK); - -#ifdef TESTADC - printf("***************************************** *******\n"); - printf("******* PUTTING ADC IN TEST MODE!!!!!!!!! *******\n"); - printf("***************************************** *******\n"); - // mixed bit frequency test mode - printf("mixed bit frequency test mode:\n"); - setAdc(AD9257_TEST_MODE_REG, - (AD9257_MIXED_BIT_FREQ_VAL << AD9257_OUT_TEST_OFST) & AD9257_OUT_TEST_MSK); -#endif -} - -#endif //AD9257_H diff --git a/slsDetectorServers/jctbDetectorServer/Makefile b/slsDetectorServers/jctbDetectorServer/Makefile deleted file mode 100644 index 3259ff756..000000000 --- a/slsDetectorServers/jctbDetectorServer/Makefile +++ /dev/null @@ -1,59 +0,0 @@ -# $Id: Makefile,v 1.1.1.1 2006/02/04 03:35:01 freza Exp $ -# first compile -# make cris-axis-linux-gnu - - -CROSS = bfin-uclinux- -CC = $(CROSS)gcc - -CFLAGS += -Wall -DMOENCHD -DMCB_FUNCS -DDACS_INT -DDEBUG -DV1 -DCTB -DOLDVERSION #-DVERBOSE #-DVERYVERBOSE #-DVIRTUAL #-DDACS_INT_CSERVER - - -PROGS= jctbDetectorServer -INSTDIR= /tftpboot -INSTMODE= 0777 - - - -BINS = testlib_sharedlibc -SRCS = server.c server_funcs.c communication_funcs.c firmware_funcs.c slow_adc.c blackfin.c -#mcb_funcs.c sharedmemory.c -OBJS = $(SRCS:%.c=%.o) - - - -all: clean versioning $(PROGS) - -test: clean jungfrauADCTEst - -boot: $(OBJS) - -versioning: - @echo `tput setaf 6; ./updateGitVersion.sh; tput sgr0;` - -jctbDetectorServerNew: $(OBJS) - echo $(OBJS) - $(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) - -jctbDetectorServer: $(OBJS) - echo $(OBJS) - $(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) -DOLDVERSION - -jungfrauADCTEst: $(OBJS) - echo $(OBJS) - $(CC) $(CFLAGS) -o $@ $^ $(LDLIBS_$@) $(LDFLAGS_$@) -DTESTADC - - - - -install: $(PROGS) - $(INSTALL) -d $(INSTDIR) - $(INSTALL) -m $(INSTMODE) $(PROGS) $(INSTDIR) - - -romfs: - $(ROMFSINST) /bin/$(PROGS) - -clean: - rm -rf $(PROGS) *.o *.gdb - diff --git a/slsDetectorServers/jctbDetectorServer/ansi.h b/slsDetectorServers/jctbDetectorServer/ansi.h deleted file mode 120000 index a122db0ad..000000000 --- a/slsDetectorServers/jctbDetectorServer/ansi.h +++ /dev/null @@ -1 +0,0 @@ -../../slsReceiverSoftware/include/ansi.h \ No newline at end of file diff --git a/slsDetectorServers/jctbDetectorServer/bf_init.sh b/slsDetectorServers/jctbDetectorServer/bf_init.sh deleted file mode 100644 index 88eccadb4..000000000 --- a/slsDetectorServers/jctbDetectorServer/bf_init.sh +++ /dev/null @@ -1 +0,0 @@ -export PATH=/afs/psi.ch/project/sls_det_firmware/jungfrau_software/uClinux-2010_64bit/bfin-uclinux/bin:$PATH diff --git a/slsDetectorServers/jctbDetectorServer/blackfin.c b/slsDetectorServers/jctbDetectorServer/blackfin.c deleted file mode 100644 index 1771372e5..000000000 --- a/slsDetectorServers/jctbDetectorServer/blackfin.c +++ /dev/null @@ -1,150 +0,0 @@ -#include "blackfin.h" - - #include - #include - - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include - #include -#include "server_defs.h" -#include "registers_m.h" - -//for memory mapping -u_int32_t CSP0BASE; - -u_int16_t volatile *values; - -int mapCSP0(void) { - printf("Mapping memory\n"); -#ifndef VIRTUAL - int fd; - fd = open("/dev/mem", O_RDWR | O_SYNC, 0); - if (fd == -1) { - printf("\nCan't find /dev/mem!\n"); - return FAIL; - } - printf("/dev/mem opened\n"); - - CSP0BASE = (u_int32_t)mmap(0, MEM_SIZE, PROT_READ|PROT_WRITE, MAP_FILE|MAP_SHARED, fd, CSP0); - if (CSP0BASE == (u_int32_t)MAP_FAILED) { - printf("\nCan't map memmory area!!\n"); - return FAIL; - } - printf("CSP0 mapped\n"); - -#endif -#ifdef VIRTUAL - CSP0BASE = malloc(MEM_SIZE); - printf("memory allocated\n"); -#endif -#ifdef SHAREDMEMORY - if ( (res=inism(SMSV))<0) { - printf("error attaching shared memory! %i",res); - return FAIL; - } -#endif - printf("CSPObase is 0x%08x \n",CSP0BASE); - printf("CSPOBASE=from %08x to %08x\n",CSP0BASE,CSP0BASE+MEM_SIZE); - - u_int32_t address; - address = FIFO_DATA_REG;//_OFF; - //values=(u_int32_t*)(CSP0BASE+address*2); - values=(u_int16_t*)(CSP0BASE+address*2); - printf("statusreg=%08x\n",bus_r(STATUS_REG)); - printf("\n\n"); - return OK; -} - -u_int16_t bus_r16(u_int32_t offset){ - volatile u_int16_t *ptr1; - ptr1=(u_int16_t*)(CSP0BASE+offset*2); - return *ptr1; -} - -u_int16_t bus_w16(u_int32_t offset, u_int16_t data) { - volatile u_int16_t *ptr1; - ptr1=(u_int16_t*)(CSP0BASE+offset*2); - *ptr1=data; - return OK; -} - - -u_int32_t bus_w(u_int32_t offset, u_int32_t data) { - volatile u_int32_t *ptr1; - - ptr1=(u_int32_t*)(CSP0BASE+offset*2); - *ptr1=data; - - return OK; -} - - -u_int32_t bus_r(u_int32_t offset) { - volatile u_int32_t *ptr1; - ptr1=(u_int32_t*)(CSP0BASE+offset*2); - return *ptr1; -} - -// program dacq settings - -int64_t set64BitReg(int64_t value, int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - if (value!=-1) { - vLSB=value&(0xffffffff); - bus_w(aLSB,vLSB); - v64=value>> 32; - vMSB=v64&(0xffffffff); - bus_w(aMSB,vMSB); - // printf("Wreg64(%x,%x) %08x %08x %016llx\n", aLSB>>11, aMSB>>11, vLSB, vMSB, value); - } - return get64BitReg(aLSB, aMSB); - -} - -int64_t get64BitReg(int aLSB, int aMSB){ - int64_t v64; - u_int32_t vLSB,vMSB; - vLSB=bus_r(aLSB); - vMSB=bus_r(aMSB); - v64=vMSB; - v64=(v64<<32) | vLSB; - - // printf("reg64(%x,%x) %x %x %llx\n", aLSB, aMSB, vLSB, vMSB, v64); - - return v64; -} - -/* /\** */ -/* /\** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG *\/ */ -/* u_int16_t ram_w16(u_int32_t ramType, int adc, int adcCh, int Ch, u_int16_t data) { */ -/* unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); */ -/* // printf("Writing to addr:%x\n",adr); */ -/* return bus_w16(adr,data); */ -/* } */ - -/* /\** ramType is DARK_IMAGE_REG or GAIN_IMAGE_REG *\/ */ -/* u_int16_t ram_r16(u_int32_t ramType, int adc, int adcCh, int Ch){ */ -/* unsigned int adr = (ramType | adc << 8 | adcCh << 5 | Ch ); */ -/* // printf("Reading from addr:%x\n",adr); */ -/* return bus_r16(adr); */ -/* } */ -/* **\/ */ diff --git a/slsDetectorServers/jctbDetectorServer/blackfin.h b/slsDetectorServers/jctbDetectorServer/blackfin.h deleted file mode 100644 index c7ef2cda2..000000000 --- a/slsDetectorServers/jctbDetectorServer/blackfin.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef BLACKFIN_H -#define BLACKFIN_H - -#define CSP0 0x20200000 -#define MEM_SIZE 0x100000 -#ifndef OLDVERSION -#define MEM_MAP_SHIFT 1 -#endif -#ifdef OLDVERSION -#define MEM_MAP_SHIFT 11 -#endif -#include - -int mapCSP0(void); - -u_int16_t bus_r16(u_int32_t offset); -u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function -u_int32_t bus_w(u_int32_t offset, u_int32_t data); -u_int32_t bus_r(u_int32_t offset); - -int64_t set64BitReg(int64_t value, int aLSB, int aMSB); -int64_t get64BitReg(int aLSB, int aMSB); - - -#endif diff --git a/slsDetectorServers/jctbDetectorServer/commonServerFunctions.h b/slsDetectorServers/jctbDetectorServer/commonServerFunctions.h deleted file mode 100755 index 55d30b8c4..000000000 --- a/slsDetectorServers/jctbDetectorServer/commonServerFunctions.h +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef COMMON_SERVER_FUNCTIONS_H -#define COMMON_SERVER_FUNCTIONS_H - -#ifndef GOTTHARDD //gotthard already had bus_w etc defined in its firmware_funcs.c (not yet made with common files) -#include "blackfin.h" -#endif - -/* global variables */ - -void SPIChipSelect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask) { - - // start point - (*valw) = 0xffffffff; // old board compatibility (not using specific bits) - bus_w (addr, (*valw)); - - // chip sel bar down - (*valw) &= ~csmask; /* todo with test: done a bit different, not with previous value */ - bus_w (addr, (*valw)); -} - - -void SPIChipDeselect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask, u_int32_t clkmask) { - // chip sel bar up - (*valw) |= csmask; /* todo with test: not done for spi */ - bus_w (addr, (*valw)); - - //clk down - (*valw) &= ~clkmask; - bus_w (addr, (*valw)); - - // stop point = start point of course - (*valw) = 0xffffffff; // old board compatibility (not using specific bits) - bus_w (addr, (*valw)); -} - -void sendDataToSPI (u_int32_t* valw, u_int32_t addr, u_int32_t val, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) { - int i = 0; - for (i = 0; i < numbitstosend; ++i) { - - // clk down - (*valw) &= ~clkmask; - bus_w (addr, (*valw)); - - // write data (i) - (*valw) = (((*valw) & ~digoutmask) + // unset bit - (((val >> (numbitstosend - 1 - i)) & 0x1) << digofset)); // each bit from val starting from msb - bus_w (addr, (*valw)); - - // clk up - (*valw) |= clkmask ; - bus_w (addr, (*valw)); - } -} - - -void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) { -#ifdef VERBOSE - if (numbitstosend == 16) - printf("Writing to SPI Register: 0x%04x\n",val); - else - printf("Writing to SPI Register: 0x%08x\n", val); -#endif - - u_int32_t valw; - - SPIChipSelect (&valw, addr, csmask); - - sendDataToSPI(&valw, addr, val, numbitstosend, clkmask, digoutmask, digofset); - - SPIChipDeselect(&valw, addr, csmask, clkmask); -} - -#endif //COMMON_SERVER_FUNCTIONS_H diff --git a/slsDetectorServers/jctbDetectorServer/communication_funcs.c b/slsDetectorServers/jctbDetectorServer/communication_funcs.c deleted file mode 120000 index 87a4f95d1..000000000 --- a/slsDetectorServers/jctbDetectorServer/communication_funcs.c +++ /dev/null @@ -1 +0,0 @@ -../commonFiles/communication_funcs.c \ No newline at end of file diff --git a/slsDetectorServers/jctbDetectorServer/communication_funcs.h b/slsDetectorServers/jctbDetectorServer/communication_funcs.h deleted file mode 120000 index f220903b2..000000000 --- a/slsDetectorServers/jctbDetectorServer/communication_funcs.h +++ /dev/null @@ -1 +0,0 @@ -../commonFiles/communication_funcs.h \ No newline at end of file diff --git a/slsDetectorServers/jctbDetectorServer/convert_pof_to_raw.c b/slsDetectorServers/jctbDetectorServer/convert_pof_to_raw.c deleted file mode 100644 index 661ab2bd9..000000000 --- a/slsDetectorServers/jctbDetectorServer/convert_pof_to_raw.c +++ /dev/null @@ -1,58 +0,0 @@ -// Converts POF files into RAW files for flashing - -#include -#include - -// Warning: This program is for testing only. -// It makes some assumptions regarding the pof file and the flash size that might be wrong. -// It also overwrites the destination file without any hesitation. -// Handle with care. - -int main(int argc, char* argv[]) -{ - FILE* src; - FILE* dst; - int x; - int y; - int i; - int filepos; - - if (argc < 3) - { - printf("%s Sourcefile Destinationfile\n",argv[0]); - return -1; - } - - src = fopen(argv[1],"rb"); - dst = fopen(argv[2],"wb"); - - // Remove header (0...11C) - for (filepos=0; filepos < 0x11C; filepos++) - fgetc(src); - - // Write 0x80 times 0xFF (0...7F) - for (filepos=0; filepos < 0x80; filepos++) - fputc(0xFF,dst); - - // Swap bits and write to file - for (filepos=0x80; filepos < 0x1000000; filepos++) - { - x = fgetc(src); - if (x < 0) break; - - y=0; - for (i=0; i < 8; i++) - y=y| ( (( x & (1<> i) << (7-i) ); // This swaps the bits - - fputc(y,dst); - } - if (filepos < 0x1000000) - printf("ERROR: EOF before end of flash\n"); - - printf("To flash the file in Linux do:\n"); - printf(" cat /proc/mtd (to findout the right mtd)\n"); - printf(" flash_eraseall /dev/mtdX\n"); - printf(" cat file > /dev/mtdX\n"); - - return 0; -} diff --git a/slsDetectorServers/jctbDetectorServer/firmware_funcs.c b/slsDetectorServers/jctbDetectorServer/firmware_funcs.c deleted file mode 100755 index d7f703c0d..000000000 --- a/slsDetectorServers/jctbDetectorServer/firmware_funcs.c +++ /dev/null @@ -1,4072 +0,0 @@ -//#define TESTADC -#define TESTADC1 - - -//#define TIMEDBG -#include "server_defs.h" -#include "firmware_funcs.h" -#include "mcb_funcs.h" -#include "slow_adc.h" -#include "registers_m.h" -#define ADC_SPI_REG ADC_WRITE_REG - -#define ADC_SERIAL_CLK_OUT_OFST (0) -#define ADC_SERIAL_CLK_OUT_MSK (0x00000001 << ADC_SERIAL_CLK_OUT_OFST) -#define ADC_SERIAL_DATA_OUT_OFST (1) -#define ADC_SERIAL_DATA_OUT_MSK (0x00000001 << ADC_SERIAL_DATA_OUT_OFST) -#define ADC_SERIAL_CS_OUT_OFST (2) -#define ADC_SERIAL_CS_OUT_MSK (0x0000000F << ADC_SERIAL_CS_OUT_OFST) - -#include "AD9257.h" - -//#define VERBOSE -//#define VERYVERBOSE - - -#ifdef SHAREDMEMORY -#include "sharedmemory.h" -#endif - -#include -#include -#include - -#include -#include -#include /* exit() */ -#include /* memset(), memcpy() */ -#include /* uname() */ -#include -#include /* socket(), bind(), - listen(), accept() */ -#include -#include -#include -#include -#include /* fork(), write(), close() */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "blackfin.h" -typedef struct ip_header_struct { - u_int16_t ip_len; - u_int8_t ip_tos; - u_int8_t ip_ihl:4 ,ip_ver:4; - u_int16_t ip_offset:13,ip_flag:3; - u_int16_t ip_ident; - u_int16_t ip_chksum; - u_int8_t ip_protocol; - u_int8_t ip_ttl; - u_int32_t ip_sourceip; - u_int32_t ip_destip; -} ip_header; - - -struct timeval tss,tse,tsss; //for timing - - - -FILE *debugfp, *datafp; - -int fr; -int wait_time; -int *fifocntrl; - -//int *statusreg; commented out by dhanya -const int nModY=1; -int nModBoard; -int nModX=NMAXMOD; -int dynamicRange=16;//32; -int nSamples=1; - -int dataBytes=NMAXMOD*NCHIP*NCHAN*2; - -int storeInRAM=0; -int ROI_flag=0; -int adcConfigured=-1; -u_int16_t *ram_values=NULL; -char volatile *now_ptr=NULL; -//u_int32_t volatile *values; -extern u_int16_t volatile *values; -int ram_size=0; - -int64_t totalTime=1; -u_int32_t progressMask=0; - -int phase_shift=0;//DEFAULT_PHASE_SHIFT; -int ipPacketSize=DEFAULT_IP_PACKETSIZE; -int udpPacketSize=DEFAULT_UDP_PACKETSIZE; - - -#ifndef NEW_PLL_RECONFIG -u_int32_t clkDivider[4]={32,16,16,16}; -#else -u_int32_t clkDivider[4]={40,20,20,200}; -#endif -int32_t clkPhase[4]={0,0,0,0}; - -u_int32_t adcDisableMask=0; - -int ififostart, ififostop, ififostep, ififo; - -int masterMode=NO_MASTER, syncMode=NO_SYNCHRONIZATION, timingMode=AUTO_TIMING; - -enum externalSignalFlag signals[4]={EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF, EXT_SIG_OFF}; - -int withGotthard = 0; - -/**is not const because this value will change after initDetector, is removed from mcb_funcs.c cuz its not used anywhere - * why is this used anywhere instead of macro*/ -int nChans=NCHAN; -int nChips=NCHIP; -//int nDacs;//=NDAC; -//int nAdcs=NADC; - -extern enum detectorType myDetectorType; -/** for jungfrau reinitializing macro later in server_funcs.c in initDetector*/ - extern int N_CHAN; - extern int N_CHIP; - extern int N_DAC; - extern int N_ADC; - extern int N_CHANS; - - -int analogEnable=1; -int digitalEnable=0; - - -int vLimit=-100; - -int nDacs; -int nAdcs; - -char mtdvalue[10]; - -int initDetector() { - - int imod; - // sls_detector_module *myModule; - int n=getNModBoard(); - nModX=n; - -#ifdef VERBOSE - printf("Board is for %d modules\n",n); -#endif - - - // nChans=N_CHAN; - // nChips=N_CHIP; - nDacs=N_DAC; - // nAdcs=N_ADC; - -/* detectorModules=malloc(n*sizeof(sls_detector_module)); */ -/* detectorDacs=malloc(n*N_DAC*sizeof(int)); */ -/* detectorAdcs=malloc(n*N_ADC*sizeof(int)); */ -/* detectorChips=NULL; */ -/* detectorChans=NULL; */ -/* detectorAdcs=NULL; */ -/* if(myDetectorType != JUNGFRAU){ */ -/* detectorChips=malloc(n*N_CHIP*sizeof(int)); */ -/* detectorChans=malloc(n*N_CHIP*N_CHAN*sizeof(int)); */ -/* } */ - -/* #ifdef VERBOSE */ -/* printf("modules from 0x%x to 0x%x\n",(unsigned int)(detectorModules), (unsigned int)(detectorModules+n)); */ -/* printf("dacs from 0x%x to 0x%x\n",(unsigned int)(detectorDacs), (unsigned int)(detectorDacs+n*N_DAC)); */ -/* printf("adcs from 0x%x to 0x%x\n",(unsigned int)(detectorAdcs), (unsigned int)(detectorAdcs+n*N_ADC)); */ -/* if(myDetectorType != JUNGFRAU){ */ -/* printf("chips from 0x%x to 0x%x\n",(unsigned int)(detectorChips), (unsigned int)(detectorChips+n*N_CHIP)); */ -/* printf("chans from 0x%x to 0x%x\n",(unsigned int)(detectorChans), (unsigned int)(detectorChans+n*N_CHIP*N_CHAN)); */ -/* } */ -/* #endif */ - - -/* for (imod=0; imoddacs=detectorDacs+imod*N_DAC; */ -/* (detectorModules+imod)->adcs=detectorAdcs+imod*N_ADC; */ -/* if(myDetectorType != JUNGFRAU){ */ -/* (detectorModules+imod)->chipregs=detectorChips+imod*N_CHIP; */ -/* (detectorModules+imod)->chanregs=detectorChans+imod*N_CHIP*N_CHAN; */ -/* } */ -/* (detectorModules+imod)->ndac=N_DAC; */ -/* (detectorModules+imod)->nadc=N_ADC; */ -/* (detectorModules+imod)->nchip=N_CHIP; */ -/* (detectorModules+imod)->nchan=N_CHIP*N_CHAN; */ -/* (detectorModules+imod)->module=imod; */ -/* (detectorModules+imod)->gain=0; */ -/* (detectorModules+imod)->offset=0; */ -/* (detectorModules+imod)->reg=0; */ -/* /\* initialize registers, dacs, retrieve sn, adc values etc *\/ */ -/* } */ -/* thisSettings=UNINITIALIZED; */ -/* sChan=noneSelected; */ -/* sChip=noneSelected; */ -/* sMod=noneSelected; */ -/* sDac=noneSelected; */ -/* sAdc=noneSelected; */ - -/* /\* */ -/* setCSregister(ALLMOD); //commented out by dhanya */ -/* setSSregister(ALLMOD); */ -/* counterClear(ALLMOD); */ -/* clearSSregister(ALLMOD); */ -/* putout("0000000000000000",ALLMOD); */ -/* *\/ */ - -/* /\* initialize dynamic range etc. *\/ */ -/* /\* dynamicRange=getDynamicRange(); //always 16 not required commented out */ -/* nModX=setNMod(-1);*\/ */ - -/* // dynamicRange=32; */ -/* // initChip(0, 0,ALLMOD); */ -/* //nModX=n; */ -/* // */ - allocateRAM(); - - return OK; -} - - - - - -int cleanFifo(){ -/* u_int32_t addr, reg, val, adc_sync; */ -/* printf("Cleaning FIFO\n"); */ -/* addr=ADC_SYNC_REG; */ - -/* if(withGotthard) */ -/* adc_sync = GOTTHARD_ADCSYNC_VAL; */ -/* else */ -/* adc_sync = ADCSYNC_VAL; */ - - -/* reg = bus_r(addr) & CLEAN_FIFO_MASK; */ - -/* //only for start up */ -/* if(!reg) reg = adc_sync; */ - -/* // 88 3 02111 */ -/* if (ROI_flag==0) { */ -/* val=reg | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY; */ -/* bus_w(addr,val); */ -/* // 88 0 02111 */ -/* val=reg | TOKEN_RESTART_DELAY; */ -/* bus_w(addr,val); */ -/* } */ -/* else { */ -/* //1b332214 */ -/* val=reg | ADCSYNC_CLEAN_FIFO_BITS | TOKEN_RESTART_DELAY_ROI; */ -/* bus_w(addr,val); */ -/* //1b032214 */ -/* val=reg | TOKEN_RESTART_DELAY_ROI; */ -/* bus_w(addr,val); */ - -/* } */ -/* reg=bus_r(addr); */ -/* //#ifdef DDEBUG */ -/* printf("ADC SYNC reg 0x19:%x\n",reg); */ -/* //#endif */ - return OK; -} - - -int setDAQRegister() -{ -/* u_int32_t addr, reg, val; */ -/* addr=DAQ_REG; */ - -/* //depended on adcval */ -/* int packetlength=0x7f; */ -/* if(!ROI_flag) packetlength=0x13f; */ - -/* //depended on pcb rev */ -/* int tokenTiming = TOKEN_TIMING_REV2; */ -/* if((bus_r(PCB_REV_REG)&BOARD_REVISION_MASK)==1) */ -/* tokenTiming= TOKEN_TIMING_REV1; */ - - -/* val = (packetlength<<16) + tokenTiming; */ -/* //val=34+(42<<8)+(packetlength<<16); */ - -/* reg=bus_r(addr); */ -/* bus_w(addr,val); */ -/* reg=bus_r(addr); */ -/* //#ifdef VERBOSE */ -/* printf("DAQ reg 0x15:%x\n",reg); */ -/* //#endif */ - - return OK; -} - - -// direct pattern output -u_int32_t putout(char *s, int modnum) { - int i; - u_int32_t pat; - int addr; - - if (strlen(s)<16) { - fprintf(stdout," *** putout error: incorrect pattern length ***\n"); - fprintf(stdout," %s \n",s); - return FAIL; - } - - pat=0; - for (i=0;i<16;i++) { - if (s[i]=='1') pat=pat+(1<<(15-i)); - } - //addr=DAC_REG+(modnum<<4); - addr=DAC_REG;//+(modnum<3) - return -1; - - if (val>65535 || val<-65535) - return clkPhase[i]; - - // printf("PLL reconfig reset\N"); bus_w(PLL_CNTRL_REG,(1<0) { - inv=0; - phase=val&0xffff; - } else { - inv=0; - val=-1*val; - phase=(~val)&0xffff; - } - - - vv=phase | (i<<16);// | (inv<<21); - - setPllReconfigReg(PLL_PHASE_SHIFT_REG,vv,0); - - clkPhase[i]=val; - return clkPhase[i]; -} - - -int configureFrequency(int val, int i) { - - - u_int32_t l=0x0c; - u_int32_t h=0x0d; - u_int32_t vv; - int32_t phase=0, inv=0; - - u_int32_t tot; - u_int32_t odd=1;//0; - printf("Want to configure frequency of counter %d to %d\n",i,val); - // printf("PLL reconfig reset\N"); bus_w(PLL_CNTRL_REG,(1<3) { - printf("wrong counter number %d\n",i); - return -1; - } - - if (val<=0) { - - printf("get value %d %d \n",i,clkDivider[i]); - return clkDivider[i]; - } - if (i==adc_clk_c){ - if (val>40) - { - printf("Too high frequency %d MHz for these ADCs!\n", val); - return clkDivider[i]; - } - } - - tot= PLL_VCO_FREQ_MHZ/val; - l=tot/2; - h=l; - if (tot>2*l) { - h=l+1; - odd=1; - } - else - { - odd=0; - } - - printf("Counter %d: Low is %d, High is %d\n",i, l,h); - - - vv= (i<<18)| (odd<<17) | l | (h<<8); - - printf("Counter %d, val: %08x\n", i, vv); - setPllReconfigReg(PLL_C_COUNTER_REG, vv,0); - /* // usleep(20); */ - /* //change sync at the same time as */ - /* if (i>0) { */ - /* val= (2<<18)| (odd<<17) | l | (h<<8); */ - - /* printf("Counter %d, val: %08x\n", i, val); */ - /* setPllReconfigReg(PLL_C_COUNTER_REG, val,0); */ - - /* } */ - - - usleep(10000); - - printf("reset pll\n"); - bus_w(PLL_CNTRL_REG,((1<2) */ -/* return -1; */ - -/* if (ic==2) { */ -/* printf("dbit clock is the same as adc clk\n"); */ -/* ic=1; */ - -/* } */ - -/* if (ic==1 && d>40) */ -/* return -1; */ - -/* if (d>160) */ -/* return -1; */ - -/* if (tot>510) */ -/* return -1; */ - -/* if (tot<1) */ -/* return -1; */ - - - -/* clkDivider[ic]=d; */ -/* configurePll(ic); */ - - - -/* return clkDivider[ic]; */ -/* } */ - - -/* int phaseStep(int st){ */ - -/* if (st>65535 || st<-65535) */ -/* return clkPhase[0]; */ -/* #ifdef NEW_PLL_RECONFIG */ -/* printf("reset pll\n"); */ -/* bus_w(PLL_CNTRL_REG,((1<=0 && i<4) - return clkPhase[i]; - else - return -1; - -}; - - - -/* int getDbitPhase() { */ - -/* printf("dbit clock is the same as adc clk\n"); */ -/* return getPhase(); */ - -/* }; */ - - -/* u_int32_t getClockDivider(int ic) { */ - -/* if (ic>2) */ -/* return -1; */ - -/* if (ic==2) { */ -/* printf("dbit clock is the same as adc clk\n"); */ -/* ic=1; */ - -/* } */ -/* return clkDivider[ic]; */ - - -/* /\* int ic=0; *\/ */ -/* /\* u_int32_t val; *\/ */ -/* /\* u_int32_t l,h; *\/ */ - -/* /\* printf("get clk divider\n"); *\/ */ - - -/* /\* setPllReconfigReg(PLL_MODE_REG,1,0); *\/ */ -/* /\* getPllReconfigReg(PLL_MODE_REG,0); *\/ */ - -/* /\* u_int32_t addr=0xa; //c0 *\/ */ -/* /\* if (ic>0) *\/ */ -/* /\* addr=0xb; //c1 *\/ */ - -/* /\* val=getPllReconfigReg(PLL_N_COUNTER_REG,0); *\/ */ -/* /\* printf("Getting N counter %08x\n",val); *\/ */ - -/* /\* l=val&0xff; *\/ */ -/* /\* h=(val>>8)&0xff; *\/ */ - -/* /\* //getPllReconfigReg(PLL_STATUS_REG,0); *\/ */ -/* /\* val=getPllReconfigReg(addr,0); *\/ */ -/* /\* printf("Getting C counter %08x\n",val); *\/ */ - - - -/* /\* return 800/(l+h); *\/ */ - -/* } */ - - -u_int32_t adcPipeline(int d) { - u_int32_t v; - if (d>=0) { - v=bus_r(ADC_PIPELINE_REG)&0x00ff0000; - bus_w(ADC_PIPELINE_REG, d|v); - } - return bus_r(ADC_PIPELINE_REG)&0xff; -} - - -u_int32_t dbitPipeline(int d) { - u_int32_t v; - if (d>=0) { - v=bus_r(ADC_PIPELINE_REG)&0x000000ff; - bus_w(ADC_PIPELINE_REG, v|(d<<16)); - - } - v=bus_r(ADC_PIPELINE_REG)>>16; - return v&0xff; -} - - -u_int32_t setSetLength(int d) { - return 0; -} - -u_int32_t getSetLength() { - return 0; -} - -u_int32_t setOversampling(int d) { - return 0; - /* if (d>=0 && d<=255) */ - /* bus_w(OVERSAMPLING_REG, d); */ - - /* return bus_r(OVERSAMPLING_REG); */ -} - - -u_int32_t setWaitStates(int d1) { - return 0; -} - -u_int32_t getWaitStates() { - return 0; -} - - - -u_int32_t setExtSignal(int d, enum externalSignalFlag mode) { - - //int modes[]={EXT_SIG_OFF, EXT_GATE_IN_ACTIVEHIGH, EXT_GATE_IN_ACTIVELOW,EXT_TRIG_IN_RISING,EXT_TRIG_IN_FALLING,EXT_RO_TRIG_IN_RISING, EXT_RO_TRIG_IN_FALLING,EXT_GATE_OUT_ACTIVEHIGH, EXT_GATE_OUT_ACTIVELOW, EXT_TRIG_OUT_RISING, EXT_TRIG_OUT_FALLING, EXT_RO_TRIG_OUT_RISING, EXT_RO_TRIG_OUT_FALLING}; - // int off=d*SIGNAL_OFFSET; - - u_int32_t c; - c=bus_r(EXT_SIGNAL_REG); - - if (d>=0 && d<4) { - signals[d]=mode; -#ifdef VERBOSE - printf("settings signal variable number %d to value %04x\n", d, signals[d]); -#endif - - // if output signal, set it! - - switch (mode) { - case GATE_IN_ACTIVE_HIGH: - case GATE_IN_ACTIVE_LOW: - if (timingMode==GATE_FIX_NUMBER || timingMode==GATE_WITH_START_TRIGGER) - setFPGASignal(d,mode); - else - setFPGASignal(d,SIGNAL_OFF); - break; - case TRIGGER_IN_RISING_EDGE: - case TRIGGER_IN_FALLING_EDGE: - if (timingMode==TRIGGER_EXPOSURE || timingMode==GATE_WITH_START_TRIGGER) - setFPGASignal(d,mode); - else - setFPGASignal(d,SIGNAL_OFF); - break; - case RO_TRIGGER_IN_RISING_EDGE: - case RO_TRIGGER_IN_FALLING_EDGE: - if (timingMode==TRIGGER_READOUT) - setFPGASignal(d,mode); - else - setFPGASignal(d,SIGNAL_OFF); - break; - case MASTER_SLAVE_SYNCHRONIZATION: - setSynchronization(syncMode); - break; - default: - setFPGASignal(d,mode); - break; - } - - setTiming(GET_EXTERNAL_COMMUNICATION_MODE); - } - - -// if (mode<=RO_TRIGGER_OUT_FALLING_EDGE && mode>=0) -// bus_w(EXT_SIGNAL_REG,((modes[mode])<=0) { -#ifdef VERBOSE - printf("writing signal register number %d mode %04x\n",d, modes[mode]); -#endif - bus_w(EXT_SIGNAL_REG,((modes[mode])<>off); - - if (mode=0 && d<4) { -#ifdef VERBOSE - printf("gettings signal variable number %d value %04x\n", d, signals[d]); -#endif - return signals[d]; - } else - return -1; - - -} - - -int getFPGASignal(int d) { - - int modes[]={SIGNAL_OFF, GATE_IN_ACTIVE_HIGH, GATE_IN_ACTIVE_LOW,TRIGGER_IN_RISING_EDGE, TRIGGER_IN_FALLING_EDGE,RO_TRIGGER_IN_RISING_EDGE, RO_TRIGGER_IN_FALLING_EDGE, GATE_OUT_ACTIVE_HIGH, GATE_OUT_ACTIVE_LOW, TRIGGER_OUT_RISING_EDGE, TRIGGER_OUT_FALLING_EDGE, RO_TRIGGER_OUT_RISING_EDGE,RO_TRIGGER_OUT_FALLING_EDGE}; - - int off=d*SIGNAL_OFFSET; - int mode=((bus_r(EXT_SIGNAL_REG)&(SIGNAL_MASK<>off); - - if (mode<=RO_TRIGGER_OUT_FALLING_EDGE) { - if (modes[mode]!=SIGNAL_OFF && signals[d]!=MASTER_SLAVE_SYNCHRONIZATION) - signals[d]=modes[mode]; -#ifdef VERYVERBOSE - printf("gettings signal register number %d value %04x\n", d, modes[mode]); -#endif - return modes[mode]; - } else - return -1; - -} - - - - - -/* -enum externalCommunicationMode{ - GET_EXTERNAL_COMMUNICATION_MODE, - AUTO, - TRIGGER_EXPOSURE_SERIES, - TRIGGER_EXPOSURE_BURST, - TRIGGER_READOUT, - TRIGGER_COINCIDENCE_WITH_INTERNAL_ENABLE, - GATE_FIX_NUMBER, - GATE_FIX_DURATION, - GATE_WITH_START_TRIGGER, - GATE_COINCIDENCE_WITH_INTERNAL_ENABLE -}; -*/ - - -int setTiming(int ti) { - - - int ret=GET_EXTERNAL_COMMUNICATION_MODE; - - int g=-1, t=-1, rot=-1; - - int i; - - switch (ti) { - case AUTO_TIMING: - timingMode=ti; - // disable all gates/triggers in except if used for master/slave synchronization - for (i=0; i<4; i++) { - if (getFPGASignal(i)>0 && getFPGASignal(i)=0 && t>=0 && rot<0) { - ret=GATE_WITH_START_TRIGGER; - } else if (g<0 && t>=0 && rot<0) { - ret=TRIGGER_EXPOSURE; - } else if (g>=0 && t<0 && rot<0) { - ret=GATE_FIX_NUMBER; - } else if (g<0 && t<0 && rot>0) { - ret=TRIGGER_READOUT; - } else if (g<0 && t<0 && rot<0) { - ret=AUTO_TIMING; - } - - // timingMode=ret; - - return ret; - -} - - - -int setConfigurationRegister(int d) { -#ifdef VERBOSE - printf("Setting configuration register to %x",d); -#endif - if (d>=0) { - bus_w(CONFIG_REG,d); - } -#ifdef VERBOSE - printf("configuration register is %x", bus_r(CONFIG_REG)); -#endif - return bus_r(CONFIG_REG); -} - -int setToT(int d) { - //int ret=0; - int reg; -#ifdef VERBOSE - printf("Setting ToT to %d\n",d); -#endif - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("Before: ToT is %x\n", reg); -#endif - if (d>0) { - bus_w(CONFIG_REG,reg|TOT_ENABLE_BIT); - } else if (d==0) { - bus_w(CONFIG_REG,reg&(~TOT_ENABLE_BIT)); - } - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("ToT is %x\n", reg); -#endif - if (reg&TOT_ENABLE_BIT) - return 1; - else - return 0; -} - -/* int setOutputMode(int d) { */ -/* //int ret=0; */ -/* int reg; */ -/* int v; */ -/* //#ifdef VERBOSE */ -/* printf("Setting readout flags to to %d\n",d); */ -/* //#endif */ -/* reg=bus_r(CONFIG_REG); */ -/* //#ifdef VERBOSE */ -/* printf("Before: config reg is %x\n", reg); */ -/* //#endif */ -/* if (d>=0) { */ -/* reg=reg & ~(3<<8); */ -/* if (d==DIGITAL_ONLY) */ -/* reg=reg | (3<<8); */ -/* else if (d==ANALOG_AND_DIGITAL) */ -/* reg=reg | (2<<8); */ - -/* bus_w(CONFIG_REG,reg); */ - -/* } */ - -/* reg=bus_r(CONFIG_REG); */ -/* //#ifdef VERBOSE */ -/* printf("After: config reg is %x\n", reg); */ -/* //#endif */ -/* if ((reg&(2<<8))) { */ -/* if (reg&(1<<8)) { */ -/* digitalEnable=1; */ -/* analogEnable=0; */ -/* return DIGITAL_ONLY; */ -/* } else { */ -/* digitalEnable=1; */ -/* analogEnable=0; */ -/* return ANALOG_AND_DIGITAL; */ -/* } */ -/* } else */ -/* if (reg&(1<<8)) */ -/* return -1; */ -/* else */ -/* return NORMAL_READOUT; */ - - -/* } */ - -int setContinousReadOut(int d) { - //int ret=0; - int reg; -#ifdef VERBOSE - printf("Setting Continous readout to %d\n",d); -#endif - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("Before: Continous readout is %x\n", reg); -#endif - - - - if (d>0) { - bus_w(CONFIG_REG,reg|CONT_RO_ENABLE_BIT); - } else if (d==0) { - bus_w(CONFIG_REG,reg&(~CONT_RO_ENABLE_BIT)); - } - reg=bus_r(CONFIG_REG); -#ifdef VERBOSE - printf("Continous readout is %x\n", reg); -#endif - if (reg&CONT_RO_ENABLE_BIT) - return 1; - else - return 0; -} - - -int startReceiver(int start) { - u_int32_t addr=CONFIG_REG; - //#ifdef VERBOSE - if(start) - printf("Setting up detector to send to Receiver\n"); - else - printf("Setting up detector to send to CPU\n"); - //#endif - int reg=bus_r(addr); - //for start recever, write 0 and for stop, write 1 - if (!start) - bus_w(CONFIG_REG,reg&(~GB10_NOT_CPU_BIT)); - else - bus_w(CONFIG_REG,reg|GB10_NOT_CPU_BIT); - - reg=bus_r(addr); -//#ifdef VERBOSE - printf("Config Reg %x\n", reg); -//#endif - int d =reg&GB10_NOT_CPU_BIT; - if(d!=0) d=1; - - printf("Value is %d expected %d\n", d, start); - - if(d!=start) - return FAIL; - else - return OK; -} - - -u_int64_t getDetectorNumber() { - char output[255],mac[255]=""; - u_int64_t res=0; - FILE* sysFile = popen("ifconfig eth0 | grep HWaddr | cut -d \" \" -f 11", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - //getting rid of ":" - char * pch; - pch = strtok (output,":"); - while (pch != NULL){ - strcat(mac,pch); - pch = strtok (NULL, ":"); - } - sscanf(mac,"%llx",&res); - return res; -} - -u_int32_t getFirmwareVersion() { - return bus_r(FPGA_VERSION_REG); -} - -u_int32_t getFirmwareSVNVersion(){ - return bus_r(FPGA_VERSION_REG);//(FPGA_SVN_REG); -} - - -// for fpga test -u_int32_t testFpga(void) { - printf("Testing FPGA:\n"); - volatile u_int32_t val,addr,val2; - int result=OK,i; - //fixed pattern - val=bus_r(FIX_PATT_REG); - if (val==FIXED_PATT_VAL) { - printf("fixed pattern ok!! %08x\n",val); - } else { - printf("fixed pattern wrong!! %08x\n",val); - result=FAIL; - } - - //dummy register - addr = DUMMY_REG; - for(i=0;i<1000000;i++) - { - val=0x5A5A5A5A-i; - bus_w(addr, val); - val=bus_r(addr); - if (val!=0x5A5A5A5A-i) { - printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of %x \n",i,val,0x5A5A5A5A-i); - result=FAIL; - } - val=(i+(i<<10)+(i<<20)); - bus_w(addr, val); - val2=bus_r(addr); - if (val2!=val) { - printf("ATTEMPT:%d:\tFPGA dummy register wrong!! read %x instead of %x.\n",i,val2,val); - result=FAIL; - } - val=0x0F0F0F0F; - bus_w(addr, val); - val=bus_r(addr); - if (val!=0x0F0F0F0F) { - printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0x0F0F0F0F \n",i,val); - result=FAIL; - } - val=0xF0F0F0F0; - bus_w(addr, val); - val=bus_r(addr); - if (val!=0xF0F0F0F0) { - printf("ATTEMPT:%d:\tFPGA dummy register wrong!! %x instead of 0xF0F0F0F0 \n\n",i,val); - result=FAIL; - } - } - if(result==OK) - { - printf("----------------------------------------------------------------------------------------------"); - printf("\nATTEMPT 1000000: FPGA DUMMY REGISTER OK!!!\n"); - printf("----------------------------------------------------------------------------------------------"); - } - printf("\n"); - return result; -} - - -// for fpga test -u_int32_t testRAM(void) { - int result=OK; - - printf("TestRAM not implemented\n"); - -/* int i=0; - allocateRAM(); - // while(i<100000) { - memcpy(ram_values, values, dataBytes); - printf ("Testing RAM:\t%d: copied fifo %x to memory %x size %d\n",i++, (unsigned int)(values), (unsigned int)(ram_values), dataBytes); - // } - * -*/ - return result; -} - - -int getNModBoard() { - - return 1; -} - -int setNMod(int n) { - -/* printf("Writin ADC disable register %08x\n",n); */ -/* bus_w(ADC_LATCH_DISABLE_REG,n); */ - return getNMod(); -} - -int getNMod() { -/* u_int32_t reg; */ -/* int i; */ -/* reg=bus_r(ADC_LATCH_DISABLE_REG); */ - -/* printf("Read ADC disable register %08x\n",reg); */ -/* nModX=32; */ -/* for (i=0; i<32; i++) { */ -/* if (reg & (1<=0) { - nSamples=value; - bus_w(NSAMPLES_REG,nSamples); - } - getDynamicRange(); - allocateRAM(); - //printf("Setting dataBytes to %d: dr %d; samples %d\n",dataBytes, dynamicRange, nSamples); - return nSamples; -} - -int64_t setDelay(int64_t value){ - /* time is in ns */ - if (value!=-1) { - value*=(1E-3*clkDivider[1]);//(1E-9*CLK_FREQ); - } - return set64BitReg(value,SET_DELAY_LSB_REG, SET_DELAY_MSB_REG)/(1E-3*clkDivider[1]);//(1E-9*CLK_FREQ); -} - -int64_t getDelay(){ - return get64BitReg(GET_DELAY_LSB_REG, GET_DELAY_MSB_REG)/(1E-3*clkDivider[1]);//(1E-9*CLK_FREQ); -} - -int64_t setTrains(int64_t value){ - printf("Set cycles %lld\n",value); - return set64BitReg(value, SET_CYCLES_LSB_REG, SET_CYCLES_MSB_REG); -} - -int64_t getTrains(){ - return get64BitReg(GET_CYCLES_LSB_REG, GET_CYCLES_MSB_REG); -} - - -int64_t setProbes(int64_t value){ - return 0; -} - - -int64_t setProgress() { - - //????? eventually call after setting the registers - -return 0; - -} - - -int64_t getProgress() { - - - //should be done in firmware!!!! - - return 0; - -} - -int64_t getActualTime(){ - return get64BitReg(GET_ACTUAL_TIME_LSB_REG, GET_ACTUAL_TIME_MSB_REG)/(1E-9*CLK_FREQ); -} - -int64_t getMeasurementTime(){ - int64_t v=get64BitReg(GET_MEASUREMENT_TIME_LSB_REG, GET_MEASUREMENT_TIME_MSB_REG); - // int64_t mask=0x8000000000000000; - // if (v & mask ) { - //#ifdef VERBOSE - // printf("no measurement time left\n"); - //#endif - // return -1E+9; - // } else - return v/(1E-9*CLK_FREQ); -} - -int64_t getFramesFromStart(){ - int64_t v=get64BitReg(FRAMES_FROM_START_LSB_REG, FRAMES_FROM_START_MSB_REG); - int64_t v1=get64BitReg(FRAMES_FROM_START_PG_LSB_REG, FRAMES_FROM_START_PG_MSB_REG); - - printf("Frames from start data streaming %lld\n",v); - printf("Frames from start run control %lld\n",v1); - - // int64_t mask=0x8000000000000000; - // if (v & mask ) { - //#ifdef VERBOSE - // printf("no measurement time left\n"); - //#endif - // return -1E+9; - // } else - return v; -} - - -int setROI(int nroi,ROI* arg,int *retvalsize, int *ret) { - - - - // ROI retval[MAX_ROIS]; - int i, ich; - adcDisableMask=0xffffffff; - - printf("Setting ROI\n"); - if (nroi>=0) { - if (nroi==0) { - adcDisableMask=0; - } else { - for (i=0; i=0 && ichMAX_ROIS) { - *retvalsize-=1; - break; - } - arg[*retvalsize-1].xmin=ich; - arg[*retvalsize-1].xmax=ich; - } - else { - if ((adcDisableMask)&(1<<(ich-1))) { - *retvalsize+=1; - if (*retvalsize>MAX_ROIS) { - *retvalsize-=1; - break; - } - arg[*retvalsize-1].xmin=ich; - } - arg[*retvalsize-1].xmax=ich; - } - } - } - - for (ich=0; ich<*retvalsize; ich++) { - printf("%d xmin %d xmax %d\n", ich, arg[ich].xmin, arg[ich].xmax); - } - - getDynamicRange(); - return *retvalsize;/*warning: function returns address of local variable*/ - -} - - -int loadImage(int index, short int ImageVals[]){ - - printf("loadImage Not implemented yet\n"); - - /* - u_int32_t address; - switch (index) { - case DARK_IMAGE : - address = DARK_IMAGE_REG; - break; - case GAIN_IMAGE : - address = GAIN_IMAGE_REG; - break; - } - volatile u_int16_t *ptr; - ptr=(u_int16_t*)(CSP0BASE+address*2); -#ifdef VERBOSE - int i; - for(i=0;i<6;i++) - printf("%d:%d\t",i,ImageVals[i]); -#endif - memcpy(ptr,ImageVals ,dataBytes); -#ifdef VERBOSE - printf("\nLoaded x%08x address with image of index %d\n",(unsigned int)(ptr),index); -#endif - */ - - return OK; -} - - - -int64_t getProbes(){ - return 0; -} - - -int setDACRegister(int idac, int val, int imod) { -/* u_int32_t addr, reg, mask; */ -/* int off; */ -/* #ifdef VERBOSE */ -/* if(val==-1) */ -/* printf("Getting dac register%d module %d\n",idac,imod); */ -/* else */ -/* printf("Setting dac register %d module %d to %d\n",idac,imod,val); */ -/* #endif */ - -/* switch(idac){ */ -/* case 0: */ -/* case 1: */ -/* case 2: */ -/* addr=MOD_DACS1_REG; */ -/* break; */ -/* case 3: */ -/* case 4: */ -/* case 5: */ -/* addr=MOD_DACS2_REG; */ -/* break; */ -/* case 6: */ -/* case 7: */ -/* addr=MOD_DACS3_REG; */ -/* break; */ -/* default: */ -/* printf("weird idac value %d\n",idac); */ -/* return -1; */ -/* break; */ -/* } */ -/* //saving only the msb */ -/* val=val>>2; */ - -/* off=(idac%3)*10; */ -/* mask=~((0x3ff)<=0 && val>off)&0x3ff; */ -/* //since we saved only the msb */ -/* val=val<<2; */ - -/* //val=(bus_r(addr)>>off)&0x3ff; */ - - -/* #ifdef VERBOSE */ -/* printf("Dac %d module %d register is %d\n\n",idac,imod,val); */ -/* #endif */ -/* return val; */ -} - - -int getTemperature(int tempSensor){ - int val; - int imod=0;//ignoring more than 1 mod for now - int i,j,repeats=6; - u_int32_t tempVal=0; -#ifdef VERBOSE - char cTempSensor[2][100]={"ADCs/ASICs","VRs/FPGAs"}; - printf("Getting Temperature of module:%d for the %s for tempsensor:%d\n",imod,cTempSensor[tempSensor],tempSensor); -#endif - bus_w(TEMP_IN_REG,(T1_CLK_BIT)|(T1_CS_BIT)|(T2_CLK_BIT)|(T2_CS_BIT));//standby - bus_w(TEMP_IN_REG,((T1_CLK_BIT)&~(T1_CS_BIT))|(T2_CLK_BIT));//high clk low cs - - for(i=0;i<20;i++) { - //repeats is number of register writes for delay - for(j=0;j>1);//fpga - } - } - - bus_w(TEMP_IN_REG,(T1_CLK_BIT)|(T1_CS_BIT)|(T2_CLK_BIT)|(T2_CS_BIT));//standby - val=((int)tempVal)/4.0; - -#ifdef VERBOSE - printf("Temperature of module:%d for the %s is %.2fC\n",imod,cTempSensor[tempSensor],val); -#endif - return val; -} - - - -int initHighVoltage(int val, int imod){ - - - u_int32_t offw,codata; - u_int16_t valw, dacvalue=-1; - int i,ddx,csdx,cdx;//iru, - float alpha=0.55;//, fval=val; - - offw=DAC_REG; - - if (val!=-1) { - if (val<0) { - printf("val is %d: should switch the relais!\n", val); - val=-100; - dacvalue=0; - } else if (val==0) { - dacvalue=0; - val=0; - } else if (val<60) { - dacvalue=0; - val=60; - } else if (val>=200) { - dacvalue=0x1; - val=200; - } else { - dacvalue=1.+(200.-val)/alpha; - val=200.-(dacvalue-1)*alpha; - } - printf ("****************************** setting val %d, dacval %d\n",val, dacvalue); - - // if (dacvalue>=0) { - - - ddx=8; csdx=10; cdx=9; - codata=((dacvalue)&0xff); - - - valw=bus_r(offw)&0x7fff; //switch off HV - bus_w(offw,(valw)); // start point - valw=((valw&(~(0x1<>(7-i))&0x1)<=0) { - valw=bus_r(offw)|0xff00;; //switch on HV - } else { - valw=bus_r(offw)&0x7fff;//switch off HV - } - - - bus_w(offw,(valw)); // stop point =start point of course */ - printf("Writing %d in HVDAC \n",dacvalue); - - bus_w(HV_REG,val); - - // } - } - - - - return (int16_t)bus_r(HV_REG); - - - - // return val; -} - - - -int initConfGain(int isettings,int val,int imod){ - int retval; -/* u_int32_t addr=CONFGAIN_REG; */ - -/* if(isettings!=-1){ */ -/* #ifdef VERBOSE */ -/* printf("Setting Gain of module:%d with val:%d\n",imod,val); */ -/* #endif */ -/* bus_w(addr,val); */ -/* } */ -/* retval=(bus_r(addr)); */ -/* #ifdef VERBOSE */ -/* printf("Value read from Gain reg is %d\n",retval); */ -/* #endif */ - return retval; -} - - - -/* int setADC(int adc){ */ -/* /\* int reg,nchips,mask,nchans; *\/ */ - -/* /\* if(adc==-1) ROI_flag=0; *\/ */ -/* /\* else ROI_flag=1; *\/ */ - -/* /\* // setDAQRegister();//token timing *\/ */ -/* /\* cleanFifo();//adc sync *\/ */ - -/* /\* //with gotthard module *\/ */ -/* /\* if(withGotthard){ *\/ */ -/* /\* //set packet size *\/ */ -/* /\* ipPacketSize= DEFAULT_IP_PACKETSIZE; *\/ */ -/* /\* udpPacketSize=DEFAULT_UDP_PACKETSIZE; *\/ */ -/* /\* //set channel mask *\/ */ -/* /\* nchips = GOTTHARDNCHIP; *\/ */ -/* /\* nchans = GOTTHARDNCHAN; *\/ */ -/* /\* mask = ACTIVE_ADC_MASK; *\/ */ -/* /\* } *\/ */ - -/* /\* //with moench module all adc *\/ */ -/* /\* else{/\\* if(adc==-1){*\\/ *\/ */ -/* /\* //set packet size *\/ */ -/* /\* ipPacketSize= DEFAULT_IP_PACKETSIZE; *\/ */ -/* /\* udpPacketSize=DEFAULT_UDP_PACKETSIZE; *\/ */ -/* /\* //set channel mask *\/ */ -/* /\* nchips = N_CHIP; *\/ */ -/* /\* nchans = N_CHANS; *\/ */ -/* /\* mask = ACTIVE_ADC_MASK; *\/ */ -/* /\* }/\\* *\/ */ -/* /\* //with moench module 1 adc -- NOT IMPLEMENTED *\/ */ -/* /\* else{ *\/ */ -/* /\* ipPacketSize= ADC1_IP_PACKETSIZE; *\/ */ -/* /\* udpPacketSize=ADC1_UDP_PACKETSIZE; *\/ */ -/* /\* //set channel mask *\/ */ -/* /\* nchips = NCHIPS_PER_ADC; *\/ */ -/* /\* nchans = GOTTHARDNCHAN; *\/ */ -/* /\* mask = 1< 1 ) { - sum += *addr++; - count -= 2; - } - if( count > 0 ) sum += *addr; // Add left-over byte, if any - while (sum>>16) sum = (sum & 0xffff) + (sum >> 16);// Fold 32-bit sum to 16 bits - checksum = (~sum)&0xffff; - - printf("IP checksum is 0x%lx\n",checksum); - - return checksum; -} - - - -#ifdef NEW_GBE_INTERFACE -int writeGbeReg(int ivar, uint32_t val, int addr, int interface) { -/* #define GBE_CTRL_WSTROBE 0 */ -/* #define GBE_CTRL_VAR_OFFSET 16 */ -/* #define GBE_CTRL_VAR_MASK 0XF */ -/* #define GBE_CTRL_RAMADDR_OFFSET 24 */ -/* #define GBE_CTRL_RAMADDR_MASK 0X3F */ -/* #define GBE_CTRL_INTERFACE 23 */ - uint32_t ctrl=((ivar&GBE_CTRL_VAR_MASK)<>32)&0xFFFFFFFF; - vals[IPCHECKSUM_ADDR]=checksum; - vals[GBE_DELAY_ADDR]=0; - vals[GBE_RESERVED1_ADDR]=sourceport; - vals[GBE_RESERVED2_ADDR]=interface; - vals[DETECTOR_MAC_L_ADDR]=(sourcemac)&0xFFFFFFFF; - vals[DETECTOR_MAC_H_ADDR]=(sourcemac>>32)&0xFFFFFFFF; - vals[DETECTOR_IP_ADDR]=sourceip; - - for (ivar=0; ivar>32)&0xFFFFFFFF);//rx_udpmacH_AReg_c - bus_w(RX_UDPMACL_AREG,(destmac)&0xFFFFFFFF);//rx_udpmacL_AReg_c - bus_w(DETECTORMACH_AREG,(sourcemac>>32)&0xFFFFFFFF);//detectormacH_AReg_c - bus_w(DETECTORMACL_AREG,(sourcemac)&0xFFFFFFFF);//detectormacL_AReg_c - bus_w(UDPPORTS_AREG,((sourceport&0xFFFF)<<16)+(destport&0xFFFF));//udpports_AReg_c - bus_w(IPCHKSUM_AREG,(checksum&0xFFFF));//ipchksum_AReg_c - - -#endif - - bus_w(CONTROL_REG,GB10_RESET_BIT); - sleep(1); - bus_w(CONTROL_REG,0); - usleep(10000); - bus_w(CONFIG_REG,conf | GB10_NOT_CPU_BIT); - printf("System status register is %08x\n",bus_r(SYSTEM_STATUS_REG)); - -return 0; //any value doesnt matter - dhanya - -} - - - - - - - - - - - -int configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int sourceip,int ival,uint32_t destport) { -//int configureMAC(int ipad,long long int macad,long long int detectormacad, int detipad, int ival, int udpport){ - - uint32_t sourceport = 0x7e9a; // 0xE185; - int interface=0; - int ngb; -volatile u_int32_t conf= bus_r(CONFIG_REG); - - - - - -#ifdef NEW_GBE_INTERFACE - ngb=2; - printf("--------- New XGB interface\n"); -#else - ngb=1; - printf("********* Old XGB interface\n"); -#endif - - for (interface=0; interface >17)&1); - now_ptr+=8; - - } - // bus_w16(DUMMY_REG,0); // -/* #ifdef TIMEDBG */ - -/* gettimeofday(&tss,NULL); */ -/* printf("read data loop = %ld usec\n",(tss.tv_usec) - (tse.tv_usec)); */ - -/* #endif */ -//#ifdef VERBOSE - // printf("*"); - //#endif - // printf("\n"); - return ram_values; -} - - - -u_int16_t* fifo_read_frame() -{ -#ifdef TIMEDBG - gettimeofday(&tsss,NULL); -#endif - - // u_int16_t *dum; - int ns=0; - now_ptr=(char*)ram_values; - while(ns>(ipos))&0x1; - ichan++; - } - } - break; - case 4: - for (ibyte=0; ibyte>(ipos*4))&0xf; - ichan++; - } - } - break; - case 8: - for (ichan=0; ichan0) { - dynamicRange=16; - } - getDynamicRange(); - allocateRAM(); - printf("Setting dataBytes to %d: dr %d; samples %d\n",dataBytes, dynamicRange, nSamples); - return getDynamicRange(); -} - - - - - - -int getDynamicRange() { - if(myDetectorType == JUNGFRAU){ - dynamicRange=16; - return dynamicRange; - } - - nSamples=bus_r(NSAMPLES_REG); - getChannels(); - dataBytes=nModX*N_CHIP*getChannels()*2*nSamples; - printf("data bytes is:%d\n",dataBytes); - return dynamicRange;//nSamples; -} - -int testBus() { - u_int32_t j; - u_int64_t i, n, nt; - // char cmd[100]; - u_int32_t val=0x0; - int ifail=OK; - // printf("%s\n",cmd); - // system(cmd); - i=0; - - n=1000000; - nt=n/100; - printf("testing bus %d times\n",(int)n); - while (i0) - storeInRAM=1; - else - storeInRAM=0; - return allocateRAM(); -} - -int getChannels() { - int nch=0; - int i; - - if (analogEnable) { - nch+=32; - for (i=0; i1) { - - clearRAM(); - ram_values=malloc(size); - // ram_values=realloc(ram_values,size)+2; - // if (ram_values) - // break; - // nSamples--; - //} - - if (ram_values) { - now_ptr=(char*)ram_values; - - //#ifdef VERBOSE - printf("ram allocated 0x%x of size %d to %x\n",(int)now_ptr,(unsigned int) size,(unsigned int)(now_ptr+size)); - //#endif - ram_size=size; - return OK; - } - - - printf("Fatal error: there must be a memory leak somewhere! You can't allocate even one frame!\n"); - return FAIL; - - - - -} - - -int writeADC(int addr, int val) { - setAdc(addr,val); - return OK; - /* u_int32_t valw,codata,csmask; */ - /* int i,cdx,ddx; */ - /* cdx=0; ddx=1; */ - /* csmask=0xfc; // 1111100 */ - - /* codata=val + (addr<< 8); */ - /* printf("***** ADC SPI WRITE TO REGISTER %04X value %04X\n",addr,val); */ - /* // start point */ - /* valw=0xff; */ - /* bus_w16(ADC_WRITE_REG,(valw)); */ - - /* //chip sel bar down */ - /* valw=((0xffffffff&(~csmask))); */ - /* bus_w16(ADC_WRITE_REG,valw); */ - - /* for (i=0;i<24;i++) { */ - /* //cldwn */ - /* valw=valw&(~(0x1<>(23-i))&0x1)<=MAX_PATTERN_LENGTH) - return -1; - - - printf("read %x\n",addr); - cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; - bus_w(PATTERN_CNTRL_REG, cntrl); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_READ_BIT) ); - usleep(1000); - printf("reading\n"); - word=get64BitReg(PATTERN_OUT_LSB_REG,PATTERN_OUT_MSB_REG); - printf("read %llx\n", word); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl); - printf("done\n"); - - return word; -} - -uint64_t writePatternWord(int addr, uint64_t word) { - - - int cntrl=0; - if (addr>=MAX_PATTERN_LENGTH) - return -1; - - printf("write %x %llx\n",addr, word); - if (word!=-1){ - - set64BitReg(word,PATTERN_IN_REG_LSB,PATTERN_IN_REG_MSB); - - - cntrl= (addr&APATTERN_MASK) << PATTERN_CTRL_ADDR_OFFSET; - bus_w(PATTERN_CNTRL_REG, cntrl); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl | (1<< PATTERN_CTRL_WRITE_BIT) ); - usleep(1000); - bus_w(PATTERN_CNTRL_REG, cntrl); - return word; - } else - return readPatternWord(addr); -} -uint64_t writePatternIOControl(uint64_t word) { - uint64_t c=0xffffffffffffffffULL; - if (word!=c) { /*warning: integer constant is too large for ‘long’ type*/ - // printf("%llx %llx %lld",get64BitReg(PATTERN_IOCTRL_REG_LSB,PATTERN_IOCTRL_REG_MSB),word); - set64BitReg(word,PATTERN_IOCTRL_REG_LSB,PATTERN_IOCTRL_REG_MSB); - // printf("************ write IOCTRL (%x)\n",PATTERN_IOCTRL_REG_MSB); - } - return get64BitReg(PATTERN_IOCTRL_REG_LSB,PATTERN_IOCTRL_REG_MSB); - -} -uint64_t writePatternClkControl(uint64_t word) { - uint64_t c=0xffffffffffffffffULL; - if (word!=c) set64BitReg(word,PATTERN_IOCLKCTRL_REG_LSB,PATTERN_IOCLKCTRL_REG_MSB);/*warning: integer constant is too large for ‘long’ type*/ - return get64BitReg(PATTERN_IOCLKCTRL_REG_LSB,PATTERN_IOCLKCTRL_REG_MSB); - -} - -int setPatternLoop(int level, int *start, int *stop, int *n) { - int ret=OK; - int lval=0; - - int nreg; - int areg; - - switch (level ) { - case 0: - nreg=PATTERN_N_LOOP0_REG; - areg=PATTERN_LOOP0_AREG; - break; - case 1: - nreg=PATTERN_N_LOOP1_REG; - areg=PATTERN_LOOP1_AREG; - break; - case 2: - nreg=PATTERN_N_LOOP2_REG; - areg=PATTERN_LOOP2_AREG; - break; - case -1: - nreg=-1; - areg=PATTERN_LIMITS_AREG; - break; - default: - return FAIL; - } - - printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n); - if (nreg>=0) { - if ((*n)>=0) bus_w(nreg, *n); - printf ("n %d\n",*n); - *n=bus_r(nreg); - printf ("n %d\n",*n); - - } - - printf("level %d start %x stop %x nl %d\n",level, *start, *stop, *n); - lval=bus_r(areg); -/* printf("l=%x\n",bus_r16(areg)); */ -/* printf("m=%x\n",bus_r16_m(areg)); */ - - - - - - printf("lval %x\n",lval); - if (*start==-1) *start=(lval>> ASTART_OFFSET) & APATTERN_MASK; - printf("start %x\n",*start); - - - if (*stop==-1) *stop=(lval>> ASTOP_OFFSET) & APATTERN_MASK; - printf("stop %x\n",*stop); - - lval= ((*start & APATTERN_MASK) << ASTART_OFFSET) | ((*stop & APATTERN_MASK) << ASTOP_OFFSET); - printf("lval %x\n",lval); - - bus_w(areg,lval); - printf("lval %x\n",lval); - - - return ret; -} - - -int setPatternWaitAddress(int level, int addr) { - int reg; - - switch (level) { - case 0: - reg=PATTERN_WAIT0_AREG; - break; - case 1: - reg=PATTERN_WAIT1_AREG; - break; - case 2: - reg=PATTERN_WAIT2_AREG; - break; - default: - return -1; - }; - // printf("BEFORE *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB); - - // printf ("%d addr %x (%x)\n",level,addr,reg); - if (addr>=0) bus_w(reg, addr); - // printf ("%d addr %x %x (%x) \n",level,addr, bus_r(reg), reg); - - // printf("AFTER *********PATTERN IOCTRL IS %llx (%x)\n",writePatternIOControl(-1), PATTERN_IOCTRL_REG_MSB); - - return bus_r(reg); -} - - -uint64_t setPatternWaitTime(int level, uint64_t t) { - int reglsb; - int regmsb; - - - switch (level) { - case 0: - reglsb=PATTERN_WAIT0_TIME_REG_LSB; - regmsb=PATTERN_WAIT0_TIME_REG_MSB; - break; - case 1: - reglsb=PATTERN_WAIT1_TIME_REG_LSB; - regmsb=PATTERN_WAIT1_TIME_REG_MSB; - break; - case 2: - reglsb=PATTERN_WAIT2_TIME_REG_LSB; - regmsb=PATTERN_WAIT2_TIME_REG_MSB; - break; - default: - return -1; - } - - - if (t>=0) set64BitReg(t,reglsb,regmsb); - return get64BitReg(reglsb,regmsb); - -} - - -void initDac(int dacnum) { - - - u_int32_t offw,codata; - u_int16_t valw; - int i,ddx,csdx,cdx; - - - - //setting int reference - offw=DAC_REG; - - - ddx=0; cdx=1; - csdx=dacnum/8+2; - - - printf("data bit=%d, clkbit=%d, csbit=%d",ddx,cdx,csdx); - codata=(((0x6)<<4)|((0xf)<<16)|((0x0<<4)&0xfff0)); - - valw=0x00ff|(bus_r(offw)&0xff00); - bus_w(offw,(valw)); // start point - valw=((valw&(~(0x1<>(24-i))&0x1)<>(24-i))&0x1)); - valw=((valw&(~(0x1<>16)&0xffff; */ -/* else */ -/* return retval&0xffff; */ - -} - - - - -int setPower(int ind, int val) { - int dacindex=-1; - int dacval=-1; - int pwrindex=-1; - int retval=-1; - int retval1=-1; - - u_int32_t preg; - - int vchip=2700-(getDacRegister(19)*1000)/4095; - int vmax=vchip-200; - int vmin=600; - - printf("---------------------------------------------Current V_Chip is %d mV\n",vchip); - - switch (ind) { - - case V_POWER_CHIP: - dacindex=19; - pwrindex=-1; - break; - case V_POWER_A: - dacindex=22; - pwrindex=1; - break; - case V_POWER_B: - dacindex=21; - pwrindex=2; - break; - case V_POWER_C: - dacindex=20; - pwrindex=3; - break; - case V_POWER_D: - dacindex=18; - pwrindex=4; - break; - case V_POWER_IO: - dacindex=23; - pwrindex=0; - break; - case V_LIMIT: - dacindex=-1; - pwrindex=-1; - break; - default: - pwrindex=-1; - dacindex=-1; - } - - if (val==-1) { - printf("get\n"); - dacval=-1; - } else { - if (pwrindex>=0) { - printf("vpower\n"); - dacval=((vmax-val)*4095)/(vmax-vmin); - if (dacval<0) - dacval=0; - if (dacval>4095) - dacval=-100; - if (val==-100) - dacval=-100; - - - } else if (dacindex>=0) { - printf("vchip\n"); - dacval=((2700-val)*4095)/1000; - if (dacval<0) - dacval=0; - if (dacval>4095) - dacval=4095; - - } else { - vLimit=val; - printf("vlimit %d\n",vLimit ); - } - - } - - if (pwrindex>=0 && val!=-1) { - preg=bus_r(POWER_ON_REG); - printf("power reg is %08x\n",bus_r(POWER_ON_REG)); - printf("Switching off power %d\n", pwrindex); - bus_w(POWER_ON_REG,preg&(~(1<<(16+pwrindex)))); - setDac(dacindex,-100); - printf("power reg is %08x\n",bus_r(POWER_ON_REG)); - retval=0; - } - - if (dacindex>0 && dacval!=-100) { - - printf("Setting power %d to %d mV\n",ind,val); - printf("Setting DAC %d to value %d\n",dacindex,dacval); - retval=setDac(dacindex,dacval); - if (pwrindex>=0 && dacval>=0 ) { - preg=bus_r(POWER_ON_REG); - printf("power reg is %08x\n",bus_r(POWER_ON_REG)); - printf("Switching on power %d\n", pwrindex); - bus_w(POWER_ON_REG,preg|((1<<(16+pwrindex)))); - printf("power reg is %08x\n",bus_r(POWER_ON_REG)); - } - } - - if (pwrindex>=0) { - if (bus_r(POWER_ON_REG)&(1<<(16+pwrindex))){ - vmax=2700-(getDacRegister(19)*1000)/4095-200; - printf("Vchip id %d mV\n",vmax+200); - retval1=vmax-(retval*(vmax-vmin))/4095; - printf("Vdac id %d mV\n",retval1); - if (retval1>vmax) - retval1=vmax; - if (retval1=0) { - if (retval>=0) { - retval1=2700-(retval*1000)/4095; - printf("Vchip is %d mV\n",vmax); - } else - retval1=-1; - } else { - printf("Get vlimit %d\n",vLimit); - retval=vLimit; - retval1=vLimit; - } - - /* switch (ind) { */ -/* case V_POWER_A: */ -/* break; */ -/* case V_POWER_B: */ -/* break; */ -/* case V_POWER_C: */ -/* break; */ -/* case V_POWER_D: */ -/* break; */ -/* case V_POWER_IO: */ -/* break; */ -/* case V_POWER_CHIP: */ -/* break; */ -/* default: */ -/* retval1=retval; */ -/* } */ - - - return retval1; - - -} - - -void defineGPIOpins(){ - //define the gpio pins - system("echo 7 > /sys/class/gpio/export"); - system("echo 9 > /sys/class/gpio/export"); - //define their direction - system("echo in > /sys/class/gpio/gpio7/direction"); - system("echo out > /sys/class/gpio/gpio9/direction"); -} - -void resetFPGA(){ - cprintf(BLUE,"\n*** Reseting FPGA ***\n"); - FPGAdontTouchFlash(); - FPGATouchFlash(); - usleep(250*1000); -} - -void FPGAdontTouchFlash(){ - //tell FPGA to not touch flash - system("echo 0 > /sys/class/gpio/gpio9/value"); - //usleep(100*1000); -} - -void FPGATouchFlash(){ - //tell FPGA to touch flash to program itself - system("echo 1 > /sys/class/gpio/gpio9/value"); -} - - -int startWritingFPGAprogram(FILE** filefp){ -#ifdef VERY_VERBOSE - printf("\n at startWritingFPGAprogram \n"); -#endif - - //getting the drive - char output[255]; - FILE* fp = popen("awk \'$4== \"\\\"bitfile(spi)\\\"\" {print $1}\' /proc/mtd", "r"); - fgets(output, sizeof(output), fp); - pclose(fp); - strcpy(mtdvalue,"/dev/"); - char* pch = strtok(output,":"); - if(pch == NULL){ - cprintf(RED,"Could not get mtd value\n"); - return FAIL; - } - strcat(mtdvalue,pch); - printf ("\nFlash drive found: %s\n",mtdvalue); - - - FPGAdontTouchFlash(); - - //writing the program to flash - *filefp = fopen(mtdvalue, "w"); - if(*filefp == NULL){ - cprintf(RED,"Unable to open %s in write mode\n",mtdvalue); - return FAIL; - } - printf("flash ready for writing\n"); - - return OK; -} - - -void eraseFlash(){ -#ifdef VERY_VERBOSE - printf("\n at eraseFlash \n"); -#endif - - char command[255]; - sprintf(command,"flash_eraseall %s",mtdvalue); - system(command); - printf("flash erased\n"); -} - -int stopWritingFPGAprogram(FILE* filefp){ -#ifdef VERY_VERBOSE - printf("\n at stopWritingFPGAprogram \n"); -#endif - - int wait = 0; - if(filefp!= NULL){ - fclose(filefp); - wait = 1; - } - - //touch and program - FPGATouchFlash(); - - if(wait){ -#ifdef VERY_VERBOSE - printf("Waiting for FPGA to program from flash\n"); -#endif - //waiting for success or done - char output[255]; - int res=0; - while(res == 0){ - FILE* sysFile = popen("cat /sys/class/gpio/gpio7/value", "r"); - fgets(output, sizeof(output), sysFile); - pclose(sysFile); - sscanf(output,"%d",&res); -#ifdef VERY_VERBOSE - printf("gpi07 returned %d\n",res); -#endif - } - } - printf("FPGA has picked up the program from flash\n\n"); - - - return OK; -} - -int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp){ -#ifdef VERY_VERBOSE - printf("\n at writeFPGAProgram \n"); - cprintf(BLUE,"address of fpgasrc:%p\n",(void *)fpgasrc); - cprintf(BLUE,"fsize:%d\n",fsize); - cprintf(BLUE,"pointer:%p\n",(void*)filefp); -#endif - - if(fwrite((void*)fpgasrc , sizeof(char) , fsize , filefp )!= fsize){ - cprintf(RED,"Could not write FPGA source to flash\n"); - return FAIL; - } -#ifdef VERY_VERBOSE - cprintf(BLUE,"program written to flash\n"); -#endif - return OK; -} - - - - -int powerChip(int arg) { - //#ifndef CTB - - u_int32_t preg=bus_r(POWER_ON_REG); - if (myDetectorType!=JUNGFRAUCTB) { - if (arg>=0) { - if (arg) - bus_w(POWER_ON_REG,preg|0xffff0000); - else - bus_w(POWER_ON_REG,preg&0x0000ffff); - preg=bus_r(POWER_ON_REG); - } - } - printf("Power register is %08x\n",preg); - if (preg&0xffff0000) - return 1; - else - return 0; -} - - - -int vLimitCompliant(int val_mV) { - int ret=0; - - if (vLimit>0) { - if (val_mV<=vLimit) ret=1; - } else ret=1; - - return ret; - - -} - - -int dacSPI(int codata) { - u_int32_t offw; - int valw, vv; - int i, ddx,cdx; - - ddx=0; cdx=1; - - offw=DAC_REG; - valw=bus_r(offw); - // codata=((cmd&0xf)<=0) { - - cmd=0x3; - - } else if (dacvalue==-100) { - - cmd=0x4; - - } - codata=cmd<>(24-i)))&0x1); */ - /* valw=(valw&(~(0x1<>(24-i))&0x1)<>(24-i))&0x1)); */ - - - /* valw=((valw)|(0x1<>8)&0x3) { - case 0: - analogEnable=1; - digitalEnable=0; - v1=NORMAL_READOUT; - break; - case 3: - analogEnable=0; - digitalEnable=1; - v1=DIGITAL_ONLY; - break; - case 2: - analogEnable=1; - digitalEnable=1; - v1=ANALOG_AND_DIGITAL; - break; - default: - printf("Unknown readout mode for analog and digital fifos %d\n",(bus_r(CONFIG_REG)>>8)&0x3); - v1=GET_READOUT_FLAGS; - } - getDynamicRange(); - allocateRAM(); - printf("dataBytes is %d\n",dataBytes); - return v1; - -} - - -int writePowerI2C(int val, int nbit) { - - int nc=nbit/8; - int ic, ib, ii; - int ack; - int bsd=PWR_I2C_SDA_BIT, bsc=PWR_I2C_SCL_BIT,esd=PWR_I2C_SDA_EN_BIT, esc=PWR_I2C_SCL_EN_BIT; - - u_int16_t co; - - printf("Write power I2C\n"); - co=(1<>ib)&1)<>ib)&1)); - } - printf("\n"); - co=co&(~(1<>ib)&1)<>ib)&1)); - } - printf("\n"); - co=co&(~(1< -#include -#include -#include -#include -#include -#include -//#include -#include -#include -#include -#include -#include -#include - - -int mapCSP0(void); - -u_int16_t bus_r16(u_int32_t offset); -u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function -u_int32_t bus_w(u_int32_t offset, u_int32_t data); -u_int32_t bus_r(u_int32_t offset); - -//int setPhaseShiftOnce(); -//int phaseStep(int st); -//int dbitPhaseStep(int st); -//int getDbitPhase(); -int getPhase(int i); -int cleanFifo(); -int setDAQRegister(); -int configurePhase(int val, int i); -int configureFrequency(int val, int i); - -u_int32_t putout(char *s, int modnum); -u_int32_t readin(int modnum); -//u_int32_t setClockDivider(int d, int ic); -//u_int32_t getClockDivider(int ic); - -void resetPLL(); -u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val, int trig); -u_int32_t getPllReconfigReg(u_int32_t reg, int trig); - -u_int32_t setSetLength(int d); -u_int32_t getSetLength(); -u_int32_t setWaitStates(int d); -u_int32_t getWaitStates(); -//u_int32_t setTotClockDivider(int d); -//u_int32_t getTotClockDivider(); -//u_int32_t setTotDutyCycle(int d); -//u_int32_t getTotDutyCycle(); -u_int32_t setOversampling(int d); -u_int32_t adcPipeline(int d); -u_int32_t dbitPipeline(int d); - -u_int32_t setExtSignal(int d, enum externalSignalFlag mode); -int getExtSignal(int d); - -u_int32_t setFPGASignal(int d, enum externalSignalFlag mode); -int getFPGASignal(int d); - -int setTiming(int t); - - -int setConfigurationRegister(int d); -int setToT(int d); -int setContinousReadOut(int d); -int startReceiver(int d); - -int setDACRegister(int idac, int val, int imod); -int getDacRegister(int dacnum); - - -int getTemperature(int tempSensor); -int initHighVoltage(int val,int imod); -int initConfGain(int isettings,int val,int imod); - -//int setADC(int adc); -//int configureMAC(int ipad, long long int macad, long long int detectormacadd, int detipad, int ival, int udpport); -int configureMAC(uint32_t destip,uint64_t destmac,uint64_t sourcemac,int detipad,int ival,uint32_t destport); -int getAdcConfigured(); - - -u_int64_t getDetectorNumber(); -u_int32_t getFirmwareVersion(); -u_int32_t getFirmwareSVNVersion(); - -int testFifos(void); -u_int32_t testFpga(void); -u_int32_t testRAM(void); -int testBus(void); -int setDigitalTestBit(int ival); - -int64_t set64BitReg(int64_t value, int aLSB, int aMSB); -int64_t get64BitReg(int aLSB, int aMSB); - -int64_t setFrames(int64_t value); -int64_t getFrames(); - -int64_t setExposureTime(int64_t value); -int64_t getExposureTime(); - -int64_t setGates(int64_t value); -int64_t getGates(); - -int64_t setDelay(int64_t value); -int64_t getDelay(); - -int64_t setPeriod(int64_t value); -int64_t getPeriod(); - -int64_t setTrains(int64_t value); -int64_t getTrains(); - -int64_t setProbes(int64_t value); -int64_t getProbes(); - -int64_t getProgress(); -int64_t setProgress(); - -int64_t getActualTime(); -int64_t getMeasurementTime(); -int64_t getFramesFromStart(); - -u_int32_t runBusy(void); -u_int32_t runState(void); -u_int32_t dataPresent(void); - - -int startStateMachine(); -int stopStateMachine(); -int startReadOut(); -u_int32_t fifoReset(void); -u_int32_t fifoReadCounter(int fifonum); -u_int32_t fifoReadStatus(); - - -u_int32_t fifo_full(void); - - - -u_int16_t* fifo_read_event(int ns); -u_int16_t* fifo_read_frame(); -u_int32_t* decode_data(int* datain); -//u_int32_t move_data(u_int64_t* datain, u_int64_t* dataout); -int setDynamicRange(int dr); -int getDynamicRange(); -int getNModBoard(); -int setNMod(int n); -int getNMod(); - -int setStoreInRAM(int b); -int allocateRAM(); - - -int writeADC(int addr, int val); -//int prepareADC(); - - - -int clearRAM(); - - -int setMaster(int f); -int setSynchronization(int s); - -int loadImage(int index, short int ImageVals[]); -int readCounterBlock(int startACQ, short int CounterVals[]); -int resetCounterBlock(int startACQ); - -int calibratePedestal(int frames); - -uint64_t writePatternWord(int addr, uint64_t word); -uint64_t writePatternIOControl(uint64_t word); -uint64_t writePatternClkControl(uint64_t word); -int setPatternLoop(int level, int *start, int *stop, int *n); -int setPatternWaitAddress(int level, int addr); -uint64_t setPatternWaitTime(int level, uint64_t t); - - -void initDac(int dacnum); -int setDac(int dacnum,int dacvalue); - -int setPower(int ind, int val); - -int setROI(int nroi,ROI* arg,int *retvalsize, int *ret); -int getChannels(); - -int getCurrent(int idac); -int getVoltage(int idac); - -void defineGPIOpins(); -void resetFPGA(); -void FPGAdontTouchFlash(); -void FPGATouchFlash(); - -int startWritingFPGAprogram(FILE** filefp); -int stopWritingFPGAprogram(FILE* filefp); -int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); -void eraseFlash(); - - - -/* - -u_int32_t setNBits(u_int32_t); -u_int32_t getNBits(); -*/ - -/* -//move to mcb_funcs? - -int readOutChan(int *val); -u_int32_t getModuleNumber(int modnum); -int testShiftIn(int imod); -int testShiftOut(int imod); -int testShiftStSel(int imod); -int testDataInOut(int num, int imod); -int testExtPulse(int imod); -int testExtPulseMux(int imod, int ow); -int testDataInOutMux(int imod, int ow, int num); -int testOutMux(int imod); -int testFpgaMux(int imod); -int calibration_sensor(int num, int *values, int *dacs) ; -int calibration_chip(int num, int *values, int *dacs); -*/ - -int64_t setSamples(int64_t value); -//int setOutputMode(int d); -int setReadOutMode(int arg); -int vLimitCompliant(int val_mV) - -#endif diff --git a/slsDetectorServers/jctbDetectorServer/get_server.sh b/slsDetectorServers/jctbDetectorServer/get_server.sh deleted file mode 100755 index b66a7ac2a..000000000 --- a/slsDetectorServers/jctbDetectorServer/get_server.sh +++ /dev/null @@ -1,12 +0,0 @@ -#!/bin/sh -serv="pc8498" -f="jungfrauDetectorServerTest" -if [ "$#" -gt 0 ]; then - f=$1 -fi -if [ "$#" -gt 1 ]; then - serv=$2 -fi -tftp $serv -r $f -g -chmod a+xrw $f - diff --git a/slsDetectorServers/jctbDetectorServer/gitInfo.txt b/slsDetectorServers/jctbDetectorServer/gitInfo.txt deleted file mode 100644 index a9e60d7f6..000000000 --- a/slsDetectorServers/jctbDetectorServer/gitInfo.txt +++ /dev/null @@ -1,9 +0,0 @@ -Path: slsDetectorsPackage/slsDetectorSoftware/jctbDetectorServer -URL: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git -Repository Root: origin git@github.com:slsdetectorgroup/slsDetectorPackage.git -Repsitory UUID: 9ae128961675230ad322ff2867f1862dbe8566a7 -Revision: 25 -Branch: developer -Last Changed Author: Anna_Bergamaschi -Last Changed Rev: 3764 -Last Changed Date: 2018-05-07 14:30:14.000000002 +0200 ./Makefile diff --git a/slsDetectorServers/jctbDetectorServer/gitInfoMoench.h b/slsDetectorServers/jctbDetectorServer/gitInfoMoench.h deleted file mode 100644 index 0945b43c9..000000000 --- a/slsDetectorServers/jctbDetectorServer/gitInfoMoench.h +++ /dev/null @@ -1,6 +0,0 @@ -#define GITURL "git@github.com:slsdetectorgroup/slsDetectorPackage.git" -#define GITREPUUID "9ae128961675230ad322ff2867f1862dbe8566a7" -#define GITAUTH "Anna_Bergamaschi" -#define GITREV 0x3764 -#define GITDATE 0x20180507 -#define GITBRANCH "developer" diff --git a/slsDetectorServers/jctbDetectorServer/jctbDetectorServer_developer b/slsDetectorServers/jctbDetectorServer/jctbDetectorServer_developer deleted file mode 100755 index 57590938c..000000000 Binary files a/slsDetectorServers/jctbDetectorServer/jctbDetectorServer_developer and /dev/null differ diff --git a/slsDetectorServers/jctbDetectorServer/mcb_funcs.c b/slsDetectorServers/jctbDetectorServer/mcb_funcs.c deleted file mode 100755 index 695c31688..000000000 --- a/slsDetectorServers/jctbDetectorServer/mcb_funcs.c +++ /dev/null @@ -1,2696 +0,0 @@ -#ifdef MCB_FUNCS - -#include -#include -#include -#include -#include -#include "registers_m.h" - -#ifndef PICASSOD -#include "server_defs.h" -#else -#include "picasso_defs.h" -#endif -#include "firmware_funcs.h" -#include "mcb_funcs.h" - - -/* global variables */ -#undef DEBUG -#undef DEBUGOUT - -extern int nModX; -//extern int dataBytes; -extern int dynamicRange; -enum detectorSettings thisSettings; - -int sChan, sChip, sMod, sDac, sAdc; -const int allSelected=-2; -const int noneSelected=-1; - - -sls_detector_module *detectorModules=NULL; -int *detectorChips=NULL; -int *detectorChans=NULL; -int *detectorDacs=NULL; -int *detectorAdcs=NULL; -//int numberOfProbes; - -ROI rois[MAX_ROIS]; -int nROI=0; -extern enum detectorType myDetectorType; - -/** for jungfrau reinitializing macro later in server_funcs.c in initDetector*/ -extern int N_CHAN; -extern int N_CHIP; -extern int N_DAC; -extern int N_ADC; -extern int N_CHANS; - -extern int nChans; -extern int nChips; -int nDacs; -int nAdcs; - -int initDetector() { - - int imod; - // sls_detector_module *myModule; - int n=getNModBoard(); - nModX=n; - -#ifdef VERBOSE - printf("Board is for %d modules\n",n); -#endif - - - // nChans=N_CHAN; - // nChips=N_CHIP; - nDacs=N_DAC; - // nAdcs=N_ADC; - - detectorModules=malloc(n*sizeof(sls_detector_module)); - detectorDacs=malloc(n*N_DAC*sizeof(int)); - detectorAdcs=malloc(n*N_ADC*sizeof(int)); - detectorChips=NULL; - detectorChans=NULL; - detectorAdcs=NULL; - if(myDetectorType != JUNGFRAU){ - detectorChips=malloc(n*N_CHIP*sizeof(int)); - detectorChans=malloc(n*N_CHIP*N_CHAN*sizeof(int)); - } - -#ifdef VERBOSE - printf("modules from 0x%x to 0x%x\n",(unsigned int)(detectorModules), (unsigned int)(detectorModules+n)); - printf("dacs from 0x%x to 0x%x\n",(unsigned int)(detectorDacs), (unsigned int)(detectorDacs+n*N_DAC)); - printf("adcs from 0x%x to 0x%x\n",(unsigned int)(detectorAdcs), (unsigned int)(detectorAdcs+n*N_ADC)); - if(myDetectorType != JUNGFRAU){ - printf("chips from 0x%x to 0x%x\n",(unsigned int)(detectorChips), (unsigned int)(detectorChips+n*N_CHIP)); - printf("chans from 0x%x to 0x%x\n",(unsigned int)(detectorChans), (unsigned int)(detectorChans+n*N_CHIP*N_CHAN)); - } -#endif - - - for (imod=0; imoddacs=detectorDacs+imod*N_DAC; - (detectorModules+imod)->adcs=detectorAdcs+imod*N_ADC; - if(myDetectorType != JUNGFRAU){ - (detectorModules+imod)->chipregs=detectorChips+imod*N_CHIP; - (detectorModules+imod)->chanregs=detectorChans+imod*N_CHIP*N_CHAN; - } - (detectorModules+imod)->ndac=N_DAC; - (detectorModules+imod)->nadc=N_ADC; - (detectorModules+imod)->nchip=N_CHIP; - (detectorModules+imod)->nchan=N_CHIP*N_CHAN; - (detectorModules+imod)->module=imod; - (detectorModules+imod)->gain=0; - (detectorModules+imod)->offset=0; - (detectorModules+imod)->reg=0; - /* initialize registers, dacs, retrieve sn, adc values etc */ - } - thisSettings=UNINITIALIZED; - sChan=noneSelected; - sChip=noneSelected; - sMod=noneSelected; - sDac=noneSelected; - sAdc=noneSelected; - - /* - setCSregister(ALLMOD); //commented out by dhanya - setSSregister(ALLMOD); - counterClear(ALLMOD); - clearSSregister(ALLMOD); - putout("0000000000000000",ALLMOD); - */ - - /* initialize dynamic range etc. */ - /* dynamicRange=getDynamicRange(); //always 16 not required commented out - nModX=setNMod(-1);*/ - - // dynamicRange=32; - // initChip(0, 0,ALLMOD); - //nModX=n; - // - allocateRAM(); - - return OK; -} - - - - -int copyChannel(sls_detector_channel *destChan, sls_detector_channel *srcChan) { - destChan->chan=srcChan->chan; - destChan->chip=srcChan->chip; - destChan->module=srcChan->module; - destChan->reg=srcChan->reg; - return OK; -} - - -int copyChip(sls_detector_chip *destChip, sls_detector_chip *srcChip) { - - int ichan; - int ret=OK; - if ((srcChip->nchan)>(destChip->nchan)) { - printf("Number of channels of source is larger than number of channels of destination\n"); - return FAIL; - } - - destChip->nchan=srcChip->nchan; - destChip->reg=srcChip->reg; - destChip->chip=srcChip->chip; - destChip->module=srcChip->module; - for (ichan=0; ichan<(srcChip->nchan); ichan++) { - *((destChip->chanregs)+ichan)=*((srcChip->chanregs)+ichan); - } - return ret; -} - - -int copyModule(sls_detector_module *destMod, sls_detector_module *srcMod) { - - int ichip, idac, ichan, iadc; - - int ret=OK; - -#ifdef VERBOSE - printf("Copying module %x to module %x\n",(unsigned int)(srcMod),(unsigned int)(destMod)); -#endif - - if (srcMod->module>=0) { -#ifdef VERBOSE - printf("Copying module number %d to module number %d\n",srcMod->module,destMod->module); -#endif - destMod->module=srcMod->module; - } - if (srcMod->serialnumber>=0){ -/* #ifdef VERBOSE */ -/* printf("Copying module serial number %x to module serial number %x\n",srcMod->serialnumber,destMod->serialnumber); */ -/* #endif */ - destMod->serialnumber=srcMod->serialnumber; - } - if ((srcMod->nchip)>(destMod->nchip)) { - printf("Number of chip of source is larger than number of chips of destination\n"); - return FAIL; - } - if ((srcMod->nchan)>(destMod->nchan)) { - printf("Number of channels of source is larger than number of channels of destination\n"); - return FAIL; - } - if ((srcMod->ndac)>(destMod->ndac)) { - printf("Number of dacs of source is larger than number of dacs of destination\n"); - return FAIL; - } - if ((srcMod->nadc)>(destMod->nadc)) { - printf("Number of dacs of source is larger than number of dacs of destination\n"); - return FAIL; - } - -#ifdef VERBOSE - printf("DACs: src %d, dest %d\n",srcMod->ndac,destMod->ndac); - printf("ADCs: src %d, dest %d\n",srcMod->nadc,destMod->nadc); - printf("Chips: src %d, dest %d\n",srcMod->nchip,destMod->nchip); - printf("Chans: src %d, dest %d\n",srcMod->nchan,destMod->nchan); - -#endif - - - - destMod->ndac=srcMod->ndac; - destMod->nadc=srcMod->nadc; - destMod->nchip=srcMod->nchip; - destMod->nchan=srcMod->nchan; - if (srcMod->reg>=0) - destMod->reg=srcMod->reg; -#ifdef VERBOSE - printf("Copying register %x (%x)\n",destMod->reg,srcMod->reg ); -#endif - if (srcMod->gain>=0) - destMod->gain=srcMod->gain; - if (srcMod->offset>=0) - destMod->offset=srcMod->offset; - - // printf("copying gain and offset %f %f to %f %f\n",srcMod->gain,srcMod->offset,destMod->gain,destMod->offset); - - if(myDetectorType != JUNGFRAU){ - for (ichip=0; ichip<(srcMod->nchip); ichip++) { - if (*((srcMod->chipregs)+ichip)>=0) - *((destMod->chipregs)+ichip)=*((srcMod->chipregs)+ichip); - } - for (ichan=0; ichan<(srcMod->nchan); ichan++) { - if (*((srcMod->chanregs)+ichan)>=0) - *((destMod->chanregs)+ichan)=*((srcMod->chanregs)+ichan); - } - } - - for (idac=0; idac<(srcMod->ndac); idac++) { - if (*((srcMod->dacs)+idac)>=0) - *((destMod->dacs)+idac)=*((srcMod->dacs)+idac); - } - - for (iadc=0; iadc<(srcMod->nadc); iadc++) { - if (*((srcMod->adcs)+iadc)>=0) - *((destMod->adcs)+iadc)=*((srcMod->adcs)+iadc); - } - - return ret; -} - - - -/* Register commands */ - - -/* int clearDACSregister(int imod) { */ - -/* putout("1111111111111111",imod);//reset */ -/* putout("1111111111111110",imod);//cs down */ - -/* /\* commented out by dhanya */ -/* putout("0000000001000000",imod); */ -/* putout("0000000101000000",imod); */ -/* putout("0000000101000000",imod); */ -/* putout("0000000001000000",imod); */ -/* *\/ */ -/* #ifdef DEBUG */ -/* fprintf(stdout, "Clearing DAC shiftregister\n"); */ -/* #endif */ -/* // sDac=0; */ -/* sMod=imod; */ -/* if (imod==ALLMOD) */ -/* sMod=allSelected; */ -/* return OK; */ -/* } */ - -/* int nextDAC(int imod) { */ - -/* putout("1111111111111011",imod);//cs up */ -/* putout("1111111111111001",imod);//clk down */ -/* putout("1111111111111111",imod);//reset */ - -/* /\*commented out by dhanya */ -/* putout("0000000001000000",imod); */ -/* putout("0000000001001000",imod); */ -/* putout("0000000001000000",imod); */ -/* *\/ */ -/* #ifdef DEBUG */ -/* fprintf(stdout, "Next DAC\n"); */ -/* #endif */ -/* // sDac++; */ -/* sMod=imod; */ -/* if (imod==ALLMOD) */ -/* sMod=allSelected; */ -/* return OK; */ -/* } */ - - -int clearCSregister(int imod) { - - putout("0000000001000000",imod); - putout("0000100001000000",imod); - putout("0000100001000000",imod); - putout("0000000001000000",imod); -#ifdef DEBUG - fprintf(stdout, "Clearing CS shiftregister\n"); -#endif - /* - sChan=noneSelected; - sMod=noneSelected; - sDac=noneSelected; - sAdc=noneSelected; - */ - sChip=noneSelected; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - //putout("0000000000000000",imod); - return 0; -} - -int setCSregister(int imod){ - - putout("0000000001000000",imod); - putout("0001000001000000",imod); - putout("0001000001000000",imod); - putout("0000000001000000",imod); -#ifdef DEBUG - fprintf(stdout, "Setting CS shiftregister\n"); -#endif - putout("0000000000000000",imod); - sChip=allSelected; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - return 0; -} - -int nextChip(int imod){ - - putout("0000000001000000",imod); - putout("0010000001000000",imod); - putout("0000000001000000",imod); -#ifdef DEBUG - fprintf(stdout, "Next Chip\n"); -#endif - sChip++; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - return 0; -} - -int firstChip(int imod){ - - putout("0100000001000000",imod); - putout("0110000001000000",imod); - putout("0100000001000000",imod); -#ifdef DEBUG - fprintf(stdout, "First Chip\n"); -#endif - sChip=0; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - return 0; -} - -int clearSSregister(int imod){ - int i; - putout("0000011000000000",imod); - for (i=0; i<10; i++) - putout("0000111000000000",imod); - putout("0000011000000000",imod); -#ifdef DEBUG - fprintf(stdout,"Clearing SS shiftregister\n"); -#endif - putout("0000000000000000",imod); - sChan=noneSelected; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - return 0; -} - -int setSSregister(int imod){ - int i; - putout("0000011000000000",imod); - for (i=0; i<10; i++) - putout("0001011000000000",imod); - putout("0000011000000000",imod); -#ifdef DEBUG - fprintf(stdout,"Setting SS shiftregister\n"); -#endif - putout("0000000000000000",imod); - sChan=allSelected; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - return 0; -} - -int nextStrip(int imod){ - putout("0000011000000000",imod); - putout("0010011000000000",imod); - putout("0000011000000000",imod); -#ifdef DEBUG - fprintf(stdout,"|-"); -#endif - sChan++; - sMod=imod; - if (imod==ALLMOD) - sMod=allSelected; - return 0; -} - -int selChannel(const int strip,int imod) { - int istrip; - clearSSregister(imod); - nextStrip(imod); - for (istrip=0; istrip=0 && imod=0) */ -/* initDAC(ind,val, imod); */ - -/* if (imod>=0 && imodgain,(detectorModules+imod)->offset); */ -/* #endif */ -/* if ((detectorModules+imod)->gain>0) */ -/* myg=(detectorModules+imod)->gain; */ -/* else { */ -/* if (thisSettings>=0 && thisSettings<3) */ -/* myg=g[thisSettings]; */ -/* // else */ -/* //myg=-1; */ -/* } */ - -/* if ((detectorModules+imod)->offset>0) */ -/* myo=(detectorModules+imod)->offset; */ -/* else { */ -/* if (thisSettings>=0 && thisSettings<3) */ -/* myo=o[thisSettings]; */ -/* // else */ -/* //myo=-1; */ -/* } */ - -/* if (myg>0 && myo>0) { */ -/* //ethr=(myo-detectorDacs[VTHRESH+imod*N_DAC])*1000/myg; */ - -/* ethr=(myo-setDACRegister(VDAC0,-1,imod))*1000/myg;//edited by dhanya */ -/* // else */ -/* // ethr=-1; */ - -/* } */ -/* #ifdef VERBOSE */ -/* //printf("module=%d gain=%f, offset=%f, dacu=%f\n",imod, myg, myo, detectorDacs[VTHRESH+imod*N_DAC]); */ -/* printf("module=%d gain=%f, offset=%f, dacu=%d\n",imod, myg, myo,(int)(setDACRegister(VDAC0,-1,imod)));//edited by dhanya */ -/* printf("Threshold energy of module %d is %d eV\n", imod, ethr); */ -/* #endif */ - -/* if (imod==0) */ -/* ret=ethr; */ -/* else { */ -/* if (ethr>(ret+100) || ethr<(ret-100)) */ -/* return FAIL; */ -/* } */ -/* } */ -/* } */ -/* return ret; */ -/* } */ - -/* int setThresholdEnergy(int ethr) { */ -/* double g[3]=DEFAULTGAIN; */ -/* double o[3]=DEFAULTOFFSET; */ -/* double myg=-1, myo=-1; */ -/* int dacu; */ -/* int imod; */ -/* int ret=ethr; */ - -/* setSettings(GET_SETTINGS,-1);//-1 added by dhanya */ -/* if (thisSettings>=0 || thisSettings<3){ */ -/* myg=g[thisSettings]; */ -/* myo=o[thisSettings]; */ -/* } */ -/* for (imod=0; imodgain>0) */ -/* myg=(detectorModules+imod)->gain; */ -/* else */ -/* if (thisSettings>=0 && thisSettings<3) */ -/* myg=g[thisSettings]; */ -/* else */ -/* myg=-1; */ -/* if ((detectorModules+imod)->offset>0) */ -/* myo=(detectorModules+imod)->offset; */ -/* else */ -/* if (thisSettings>=0 && thisSettings<3) */ -/* myo=o[thisSettings]; */ -/* else */ -/* myo=-1; */ -/* } else { */ -/* if (thisSettings>=0 && thisSettings<3) */ -/* myo=o[thisSettings]; */ -/* else */ -/* myo=-1; */ -/* if (thisSettings>=0 && thisSettings<3) */ -/* myg=g[thisSettings]; */ -/* else */ -/* myg=-1; */ -/* } */ -/* if (myg>0 && myo>0) { */ -/* dacu=myo-myg*((double)ethr)/1000.; */ -/* #ifdef VERBOSE */ -/* printf("module %d (%x): gain %f, off %f, energy %d eV, dac %d\n",imod,(unsigned int)((detectorModules+imod)),(detectorModules+imod)->gain,(detectorModules+imod)->offset, ethr,dacu); */ -/* #endif */ -/* } else { */ -/* dacu=ethr; */ -/* #ifdef VERBOSE */ -/* printf("could not set threshold energy for module %d, settings %d (offset is %f; gain is %f)\n",imod,thisSettings,myo,myg); */ -/* #endif */ -/* } */ -/* initDACbyIndexDACU(VDAC0, dacu, imod); ///needs to be fixed dhanya */ -/* } */ -/* return ret; */ -/* } */ - - - -/* int getDACbyIndexDACU(int ind, int imod) { */ -/* /\* */ -/* if (detectorDacs) { */ -/* if (imodndac) */ -/* return (detectorDacs[ind+imod*N_DAC]); */ -/* } */ -/* return FAIL; */ -/* *\/ */ -/* return setDACRegister(ind, -1, imod); */ -/* } */ - - -/* int initDAC(int dac_addr, int value, int imod) { */ -/* // int i; */ -/* #ifdef VERBOSE */ -/* printf("Programming dac %d with value %d\n", dac_addr, value); */ -/* #endif */ -/* clearDACSregister(imod); */ -/* program_one_dac(dac_addr,value,imod); */ -/* nextDAC(imod); */ -/* clearDACSregister(imod); */ - -/* return 0; */ -/* } */ - -int getTemperatureByModule(int tempSensor, int imod) -{ - int im; - //for the particular module - if (imod>=0 && imod=0 && imod=0 && imod=0) { */ -/* #ifdef VERBOSE */ -/* fprintf(stdout, "voltage %d\n", *(v+iaddr)); */ -/* #endif */ -/* program_one_dac(iaddr, *(v+iaddr),imod); */ -/* } */ -/* nextDAC(imod); */ -/* } */ - - -/* clearDACSregister(imod); */ - -/* return 0; */ - -/* } */ - - - - -int setSettings(int i, int imod) { -/* #ifdef VERBOSE */ -/* if(i==-1) */ -/* printf("\nReading settings of detector...\n"); */ -/* else */ -/* printf("\ninside set settings wit settings=%d...\n",i); */ -/* #endif */ -/* int isett=-1,val=-1,retval=-1; */ -/* enum conf_gain { */ -/* dynamic = 0x0f00, //dynamic */ -/* dynamichighgain0 = 0x0f01, //dynamichighgain0 */ -/* fixgain1 = 0x0f02, //fixgain1 */ -/* fixgain2 = 0x0f06, //fixgain2 */ -/* forceswitchgain1 = 0x1f00, //forceswitchgain1 */ -/* forceswitchgain2 = 0x3f00 //forceswitchgain2 */ -/* }; */ - -/* //determine conf value to write */ -/* if(i!=GET_SETTINGS){ */ -/* switch(i){ */ -/* case DYNAMICGAIN: val = dynamic;break; */ -/* case DYNAMICHG0: val = dynamichighgain0;break; */ -/* case FIXGAIN1: val = fixgain1;break; */ -/* case FIXGAIN2: val = fixgain2;break; */ -/* case FORCESWITCHG1: val = forceswitchgain1;break; */ -/* case FORCESWITCHG2: val = forceswitchgain2;break; */ -/* default: */ -/* printf("Error: This settings is not defined for this detector %d\n",i); */ -/* return GET_SETTINGS; */ -/* } */ -/* } */ - -/* retval=initConfGainByModule(i,val,imod); */ - -/* switch(retval){ */ -/* case dynamic: isett=DYNAMICGAIN; break; */ -/* case dynamichighgain0: isett=DYNAMICHG0; break; */ -/* case fixgain1: isett=FIXGAIN1; break; */ -/* case fixgain2: isett=FIXGAIN2; break; */ -/* case forceswitchgain1: isett=FORCESWITCHG1; break; */ -/* case forceswitchgain2: isett=FORCESWITCHG2; break; */ -/* default: */ -/* isett=UNDEFINED; */ -/* printf("Error:Wrong settings read out from Gain Reg 0x%x\n",retval); */ -/* break; */ -/* } */ - -/* thisSettings=isett; */ -/* //#ifdef VERBOSE */ -/* printf("detector settings are %d\n",thisSettings); */ -/* //#endif */ - return thisSettings; -} - - - - -/* Initialization*/ - -int initChannelbyNumber(sls_detector_channel myChan) {printf("in init channel by number\n"); -/* int reg=myChan.reg; */ -/* int ft=reg & TRIM_DR; */ -/* int cae=(reg>>(NTRIMBITS))&1; */ -/* int ae=(reg>>(NTRIMBITS+1))&1; */ -/* int coe=(reg>>(NTRIMBITS+2))&1; */ -/* int ocoe=(reg>>(NTRIMBITS+3))&1; */ -/* int counts=(reg>>(NTRIMBITS+4)); */ -/* #ifdef VERBOSE */ -/* printf("Initializing channel %d chip %d module %d reg %x\n",myChan.chan,myChan.chip,myChan.module, reg); */ -/* printf("trim %d, cae %d, ae %d, coe %d, ocoe %d, counts %d\n",ft, cae, ae, coe, ocoe, counts); */ -/* #endif */ - -/* if (myChan.chip<0) */ -/* setCSregister(myChan.module); */ -/* else */ -/* selChip(myChan.chip,myChan.module); */ - -/* if (myChan.chan<0) */ -/* setSSregister(myChan.module); */ -/* else */ -/* selChannel(myChan.chan,myChan.module); */ - -/* initChannel(ft,cae,ae, coe, ocoe, counts,myChan.module); */ - -/* setDynamicRange(dynamicRange); */ - -/* setCSregister(ALLMOD); */ -/* clearSSregister(ALLMOD); */ -/* putout("0000000000000000",ALLMOD); */ - - return myChan.reg; - -} - -int getChannelbyNumber(sls_detector_channel* myChan) { - /* int imod, ichip, ichan; */ - /* imod=myChan->module; */ - /* ichip=myChan->chip; */ - /* ichan=myChan->chan; */ - - /* if (detectorChans) { */ - /* if (imod=0) { */ - /* if (ichip<(detectorModules+imod)->nchip && ichan<(detectorModules+imod)->nchan/(detectorModules+imod)->nchip) */ - /* myChan->reg=detectorChans[imod*N_CHAN*N_CHIP+ichip*N_CHAN+ichan]; */ - /* return OK; */ - /* } */ - /* } */ - return FAIL; - -} - -int getTrimbit(int imod, int ichip, int ichan) { - /* if (detectorChans) { */ - /* if (imod=0) */ - /* if (ichip<(detectorModules+imod)->nchip && ichan<(detectorModules+imod)->nchan/(detectorModules+imod)->nchip) */ - /* return (detectorChans[imod*N_CHAN*N_CHIP+ichip*N_CHAN+ichan] & TRIM_DR); */ - /* } */ - - return -1; -} - -int initChannel(int ft,int cae, int ae, int coe, int ocoe, int counts, int imod){ - -/* int ibit, bit, i, im, ichip, ichan; */ -/* int chanmi, chanma, chipmi, chipma, modmi, modma; */ - - - -/* sMod=imod; */ -/* // printf("initializing module %d\n",sMod); */ -/* if (imod==ALLMOD) { */ -/* sMod=allSelected; */ - -/* // printf("initializing all modules\n"); */ -/* } */ - -/* if (sChan==allSelected) { */ -/* // printf("initializing all channels ft=%d coe=%d\n",ft,coe); */ -/* chanmi=0; */ -/* chanma=N_CHAN; */ -/* } else if (sChan==noneSelected || sChan>N_CHAN || sChan<0) { */ -/* // printf("initializing no channels ft=%d coe=%d\n",ft,coe); */ -/* chanmi=0; */ -/* chanma=-1; */ -/* } else { */ -/* // printf("initializing channel %d ft=%d coe=%d\n",sChan, ft,coe); */ -/* chanmi=sChan; */ -/* chanma=sChan+1; */ -/* } */ - -/* if (sChip==allSelected) { */ -/* // printf("initializing all chips\n"); */ -/* chipmi=0; */ -/* chipma=N_CHIP; */ -/* } else if (sChip==noneSelected || sChip>N_CHIP || sChip<0) { */ -/* // printf("initializing no chips\n"); */ -/* chipmi=0; */ -/* chipma=-1; */ -/* } else { */ -/* // printf("initializing chip %d\n",sChip); */ -/* chipmi=sChip; */ -/* chipma=sChip+1; */ -/* } */ - - -/* if (sMod==allSelected) { */ -/* modmi=0; */ -/* modma=nModX;//getNModBoard(); */ -/* } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) { */ -/* modmi=0; */ -/* modma=-1; */ -/* return 1; */ -/* } else { */ -/* modmi=sMod; */ -/* modma=sMod+1; */ -/* } */ - -/* if (detectorChans) { */ -/* for (im=modmi; im63 || ft<0) { */ -/* fprintf(stdout,"Fine Threshold is %d while should be between 0 and 63!",ft); */ -/* return 1; */ -/* } */ -/* /\*cal_enable*\/ */ -/* if (cae) { */ -/* putout("0100000000000000",imod); */ -/* putout("0110000000000000",imod); */ -/* } else { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* } */ -/* /\*n_an_enable*\/ */ -/* if (ae) { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } else { */ -/* putout("0100000000000000",imod); */ -/* putout("0110000000000000",imod); */ -/* putout("0100000000000000",imod); */ -/* } */ -/* /\*trb5*\/ */ -/* ibit=5; */ -/* bit=ft & (1<>1; */ - /* int nchan, ichan; */ - /* int ft, cae, ae, coe, ocoe, counts, chanreg; */ - - - - /* nchan=myChip.nchan; */ - /* if (ichip<0) */ - /* setCSregister(imod); */ - /* else */ - /* selChip(ichip,imod); */ - - /* clearSSregister(imod); */ - /* for (ichan=0; ichan>(NTRIMBITS+1))&1; */ - /* ae=(chanreg>>(NTRIMBITS+2))&1; */ - /* coe=((chanreg)>>(NTRIMBITS+3))&1; */ - /* ocoe=((chanreg)>>(NTRIMBITS+4))&1; */ - /* counts=((chanreg)>>(NTRIMBITS+5)); */ - /* nextStrip(imod); */ - /* initChannel(ft,cae,ae, coe, ocoe, counts,imod); */ - /* } */ - /* initChip(obe,ow,imod); */ - return myChip.reg; - -} - -int getChipbyNumber(sls_detector_chip* myChip){ - /* int imod, ichip; */ - /* imod=myChip->module; */ - /* ichip=myChip->chip; */ - - /* if (detectorChips) { */ - /* if (imodnchip) { */ - /* myChip->reg=detectorChips[ichip+imod*N_CHIP]; */ - /* myChip->nchan=N_CHAN; */ - /* myChip->chanregs=detectorChans+imod*N_CHAN*N_CHIP+ichip*N_CHIP; */ - /* return OK; */ - /* } */ - /* } */ - return FAIL; - -} - - - -int initChip(int obe, int ow,int imod){ - /* int i; */ - /* int im, ichip; */ - /* int chipmi, chipma, modmi, modma; */ - /* switch (ow) { - case 0:; - case 1: - setDynamicRange(32); - break; - case 2: - setDynamicRange(16); - break; - case 3: - setDynamicRange(8); - break; - case 4: - setDynamicRange(4); - break; - case 5: - setDynamicRange(1); - break; - default: - setDynamicRange(32); - break; - } - */ - -/* #ifdef DEBUGOUT */ -/* printf("Initializing chip\n"); */ -/* #endif */ -/* putout("0000000000000000",imod); */ -/* #ifdef DEBUGOUT */ -/* printf("Output mode= %d\n", ow); */ -/* #endif */ - -/* /\* clearing shift in register *\/ */ -/* for (i=0; i<10; i++) */ -/* putout("0000100000000000",imod); */ -/* putout("0000000000000000",imod); */ - -/* if (ow>0) { */ -/* putout("0100000000000000",imod); */ -/* putout("0110000000000000",imod); */ -/* putout("0100000000000000",imod); */ -/* for (i=0; i<(OUTMUX_OFFSET-1); i++) { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } */ -/* if (ow>1) { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } */ -/* if (ow>2) { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } */ -/* if (ow>3) { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } */ -/* if (ow>4) { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } */ -/* } */ -/* #ifdef DEBUGOUT */ -/* printf("Output buffer enable= %d\n", obe); */ -/* #endif */ -/* if (obe) { */ -/* putout("0100000000000000",imod); */ -/* putout("0110000000000000",imod); */ -/* putout("0100000000000000",imod); */ -/* } else { */ -/* putout("0000000000000000",imod); */ -/* putout("0010000000000000",imod); */ -/* putout("0000000000000000",imod); */ -/* } */ -/* /\*}*\/ */ -/* putout("0000000000000000",imod); */ - - - - - -/* sMod=imod; */ -/* if (imod==ALLMOD) */ -/* sMod=allSelected; */ - - -/* if (sChip==allSelected) { */ -/* chipmi=0; */ -/* chipma=N_CHIP; */ -/* } else if (sChip==noneSelected || sChip>N_CHIP || sChip<0) { */ -/* chipmi=0; */ -/* chipma=-1; */ -/* } else { */ -/* chipmi=sChip; */ -/* chipma=sChip+1; */ -/* } */ - - -/* if (sMod==allSelected) { */ -/* modmi=0; */ -/* modma=nModX;//getNModBoard(); */ -/* } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) { */ -/* modmi=0; */ -/* modma=-1; */ -/* } else { */ -/* modmi=sMod; */ -/* modma=sMod+1; */ -/* } */ - -/* if (detectorChips) { */ -/* for (im=modmi; imN_CHIP || sChip<0) { */ -/* chipmi=0; */ -/* chipma=-1; */ -/* } else { */ -/* chipmi=sChip; */ -/* chipma=sChip+1; */ -/* } */ - - -/* if (sMod==allSelected) { */ -/* modmi=0; */ -/* modma=nModX;//getNModBoard(); */ -/* } else if (sMod==noneSelected || sMod>nModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) { */ -/* modmi=0; */ -/* modma=-1; */ -/* } else { */ -/* modmi=sMod; */ -/* modma=sMod+1; */ -/* } */ - -/* if (detectorChips) { */ -/* for (im=modmi; imnModX || sMod<0) {//(sMod==noneSelected || sMod>getNModBoard() || sMod<0) { - modmi=0; - modma=-1; - } else { - modmi=sMod; - modma=sMod+1; - } - - if (detectorModules) { - for (im=modmi; imreg)=cm; -#ifdef VERBOSE - printf("imod=%d reg=%d (%x)\n",im,(detectorModules+im)->reg,(unsigned int)((detectorModules+im))); -#endif - } - } - return 0; -} - -int initModulebyNumber(sls_detector_module myMod) { - - printf("\ninside initmoduleynumberrrr..\n"); - printf("000\n"); - int nchip,nchan;//int ichip, nchip, ichan, nchan; - int im, modmi,modma; - // int ft, cae, ae, coe, ocoe, counts, chanreg; - int imod; - // int obe; - // int ow; - /* int v[N_DAC];*/ - int retval =-1, idac; - - - nchip=myMod.nchip; - nchan=(myMod.nchan)/nchip; - - imod=myMod.module; - sMod=imod; - - if (sMod==ALLMOD) - sMod=allSelected; - - if (sMod==allSelected) { - modmi=0; - modma=nModX;//getNModBoard(); - } else if (sMod==noneSelected || sMod>nModX || sMod<0) {// (sMod==noneSelected || sMod>getNModBoard() || sMod<0) { - modmi=0; - modma=-1; - } else { - modmi=sMod; - modma=sMod+1; - } - - printf("222\n"); - /* - for (idac=0; idacmodule; -#ifdef VERBOSE - printf("Getting module %d\n",imod); -#endif - if (detectorModules) { - copyModule(myMod,detectorModules+imod); - ; - } else - return FAIL; - - return OK; -} - -/* To chips */ -int clearCounter(int imod){ - int i; -#ifdef DEBUG - printf("Clearing counter with contclear\n"); -#endif - putout("0000000000000000",imod); - for (i=0; i<10; i++) - putout("0000000000010000",imod); - putout("0000000000000000",imod); - - return 0; -} - -int clearOutReg(int imod){ - int i; -#ifdef DEBUG - printf("Clearing output register\n"); -#endif - putout("0000010000000000",imod); - for (i=0; i<10; i++) - putout("0000110000000000",imod); - putout("0000010000000000",imod); - return 0; -} -int setOutReg(int imod){ - int i; -#ifdef DEBUG - printf("Setting output register\n"); -#endif - putout("0000010000000000",imod); - for (i=0; i<10; i++) - putout("0001010000000000",imod); - putout("0000010000000000",imod); - return 0; -} - - -int extPulse(int ncal, int imod) { - int ical; -#ifdef DEBUG - printf("Giving a clock pulse to the counter\n"); -#endif - for (ical=0; ical0 && i%2==0) { - printf("Shift in: module %d chip %i bit %d read %d instead of %d \n",k,j,i,val & 1<< j, i%2); - result++; - } - if (i%2>0 && (val & 1<0 && (dum & (1<0) { - printf("Shift out: module %d chip %i bit %d read %d instead of %d \n",k,j,i,val & 1<< j, (dum &1<0 && i%2==0) { - printf("Shift stsel: module %d chip %i bit %d read %d instead of %d \n",k,j,i,val & 1<< j, i%2); - result++; - } - if (i%2>0 && (val & 1<> 1; - - - putout("0000000000000000",ALLMOD); - putout("0010000000000000",ALLMOD); //change mux setting - putout("0000000000000000",ALLMOD); - } - - printf("Test FpgaMux module %d : %d errors\n", imod,result); - if (result) - return 1; - else - return 0; -} - - - - - - - - - -int calibration_sensor(int num, int *v, int *dacs) { - int ich, ichip, imod; - int val[10]; - - - printf("calibrating sensor..."); - for (imod=0; imod=0){ */ - -/* //clear rois */ -/* for(i=0;i=0) && (adc<=4)); */ -/* else { */ -/* printf("warning:adc value greater than 5. deleting roi\n"); */ -/* adc=-1; */ -/* } */ -/* } */ -/* } */ - - -/* //set rois for just 1 adc - take only 1st roi */ -/* if(adc!=-1){ */ -/* rois[0].xmin=adc*(GOTTHARDNCHAN*NCHIPS_PER_ADC); */ -/* rois[0].xmax=(adc+1)*(GOTTHARDNCHAN*NCHIPS_PER_ADC)-1; */ -/* rois[0].ymin=-1; */ -/* rois[0].ymax=-1; */ -/* nROI = 1; */ -/* }else */ -/* nROI = 0; */ - -/* if((arg[0].xmin!=rois[0].xmin)||(arg[0].xmax!=rois[0].xmax)||(arg[0].ymin!=rois[0].ymin)||(arg[0].ymax!=rois[0].ymax)) */ -/* *ret=FAIL; */ -/* if(n!=nROI) */ -/* *ret=FAIL; */ - -/* //set adc of interest */ -/* setADC(adc); */ -/* } */ - -/* //#ifdef VERBOSE */ -/* printf("Rois:\n"); */ -/* for( i=0;i -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MAXLOOPS 3 -#define MAXTIMERS 3 -#define MAXWORDS 1024 - - - -uint64_t pat=0; -uint64_t iopat=0; -uint64_t clkpat=0; - -int iaddr=0; -int waitaddr[3]={MAXWORDS,MAXWORDS,MAXWORDS}; -int startloopaddr[3]={MAXWORDS,MAXWORDS,MAXWORDS}; -int stoploopaddr[3]={MAXWORDS,MAXWORDS,MAXWORDS}; -int start=0, stop=0; -uint64_t waittime[3]={0,0,0}; -int nloop[3]={0,0,0}; - -char infile[10000], outfile[10000]; - -FILE *fd, *fd1; -uint64_t PAT[MAXWORDS]; - - -int i,ii,iii,j,jj,jjj,pixx,pixy,memx,memy,muxout,memclk,colclk,rowclk,muxclk,memcol,memrow,loopcounter; - -void setstart() { - start=iaddr; -} - -void setstop() { - stop=iaddr; -} - -void setinput(int bit) { - uint64_t mask=1; - mask=mask<>bit; -} - -void setstartloop(int iloop) { - if (iloop>=0 && iloop=0 && iloop=0 && iloop=0 && iloop=0 && iloop=MAXWORDS) printf("ERROR: too many word in the pattern (%d instead of %d)!",iaddr, MAXWORDS); -} - - - - -main(void) { - int iloop=0; - fd=fopen(OUTFILE,"w"); -#include INFILE - - fprintf(fd,"patioctrl %016llx\n",iopat); - fprintf(fd,"patclkctrl %016llx\n",clkpat); - fprintf(fd,"patlimits %04x %04x\n",start, stop); - - for (iloop=0; iloop /sys/class/gpio/export -echo 9 > /sys/class/gpio/export -echo in > /sys/class/gpio/gpio7/direction -echo out > /sys/class/gpio/gpio9/direction - - -echo 0 > /sys/class/gpio/gpio9/value - - -flash_eraseall /dev/mtd3 -cat /mnt/$f > /dev/mtd3 - -echo 1 > /sys/class/gpio/gpio9/value -cat /sys/class/gpio/gpio7/value - diff --git a/slsDetectorServers/jctbDetectorServer/registers_m.h b/slsDetectorServers/jctbDetectorServer/registers_m.h deleted file mode 100644 index 996d50cbc..000000000 --- a/slsDetectorServers/jctbDetectorServer/registers_m.h +++ /dev/null @@ -1,551 +0,0 @@ -#ifndef REGISTERS_G_H -#define REGISTERS_G_H - - -#include "sls_detector_defs.h" - - -/* Definitions for FPGA*/ -#define CSP0 0x20200000 -#define MEM_SIZE 0x100000 - - - -/* values defined for FPGA */ -#define MCSNUM 0x0 -#define FIXED_PATT_VAL 0xacdc1980 - - -#define FPGA_INIT_PAT 0x60008 -#define FPGA_INIT_ADDR 0xb0000000 - -//#ifdef JUNGFRAU_DHANYA -#define POWER_ON_REG 0x5e << MEM_MAP_SHIFT -// Pwr_I2C_SDA <= PowerReg_s(1) when PowerReg_s(3)='1' else 'Z'; -// Pwr_I2C_SCL <= PowerReg_s(0) when PowerReg_s(2)='1' else 'Z'; - -#define PWR_I2C_SCL_BIT 0 -#define PWR_I2C_SDA_BIT 1 -#define PWR_I2C_SCL_EN_BIT 2 -#define PWR_I2C_SDA_EN_BIT 3 - -#define POWER_STATUS_REG 41 << MEM_MAP_SHIFT - -#define ADCREG1 0x08 -#define ADCREG2 0x14//20 -#define ADCREG3 0x4 -#define ADCREG4 0x5 -#define ADCREG_VREFS 24 -#define DBIT_PIPELINE_REG 89 << MEM_MAP_SHIFT //0x59 same PATTERN_N_LOOP2_REG -#define MEM_MACHINE_FIFOS_REG 79 << MEM_MAP_SHIFT //from gotthard -#define CONFGAIN_REG 93 << MEM_MAP_SHIFT //from gotthard -#define ADC_PIPELINE_REG 66 << MEM_MAP_SHIFT //0x42 same as ADC_OFFSET_REG -//#endif - -//#define ADC_OFFSET_REG 93 << MEM_MAP_SHIFT //same as DAQ_REG -#define ADC_INVERSION_REG 67 << MEM_MAP_SHIFT - -#define DAC_REG 64 << MEM_MAP_SHIFT//0x17 << MEM_MAP_SHIFT// control the dacs -//ADC -#define ADC_WRITE_REG 65 << MEM_MAP_SHIFT//0x18 << MEM_MAP_SHIFT -//#define ADC_SYNC_REG 66 << MEM_MAP_SHIFT//0x19 << MEM_MAP_SHIFT -//#define HV_REG 67 << MEM_MAP_SHIFT//0x20 << MEM_MAP_SHIFT - - - - -//#define MUTIME_REG 0x1a << MEM_MAP_SHIFT -//temperature -#define TEMP_IN_REG 0x1b << MEM_MAP_SHIFT -#define TEMP_OUT_REG 0x1c << MEM_MAP_SHIFT -//configure MAC -#define TSE_CONF_REG 0x1d << MEM_MAP_SHIFT -#define ENET_CONF_REG 0x1e << MEM_MAP_SHIFT -//#define WRTSE_SHAD_REG 0x1f << MEM_MAP_SHIFT -//HV - - -#define DUMMY_REG 68 << MEM_MAP_SHIFT//0x21 << MEM_MAP_SHIFT -#define FPGA_VERSION_REG 0 << MEM_MAP_SHIFT //0x22 << MEM_MAP_SHIFT -#define PCB_REV_REG 0 << MEM_MAP_SHIFT -#define FIX_PATT_REG 1 << MEM_MAP_SHIFT //0x23 << MEM_MAP_SHIFT -#define CONTROL_REG 79 << MEM_MAP_SHIFT//0x24 << MEM_MAP_SHIFT -#define STATUS_REG 2 << MEM_MAP_SHIFT //0x25 << MEM_MAP_SHIFT -#define CONFIG_REG 77 << MEM_MAP_SHIFT//0x26 << MEM_MAP_SHIFT -#define EXT_SIGNAL_REG 78 << MEM_MAP_SHIFT// 0x27 << MEM_MAP_SHIFT -//#define FPGA_SVN_REG 0x29 << MEM_MAP_SHIFT - - -#define CHIP_OF_INTRST_REG 0x2A << MEM_MAP_SHIFT - -//FIFO -#define LOOK_AT_ME_REG 3 << MEM_MAP_SHIFT //0x28 << MEM_MAP_SHIFT -#define SYSTEM_STATUS_REG 4 << MEM_MAP_SHIFT - -#define FIFO_DATA_REG 6 << MEM_MAP_SHIFT -#define FIFO_STATUS_REG 7 << MEM_MAP_SHIFT - -// constant FifoDigitalInReg_c : integer := 60; -#define FIFO_DIGITAL_DATA_LSB_REG 60 << MEM_MAP_SHIFT -#define FIFO_DIGITAL_DATA_MSB_REG 61 << MEM_MAP_SHIFT - -#define FIFO_DATA_REG_OFF 0x50 << MEM_MAP_SHIFT /////// -//to read back dac registers -//#define MOD_DACS1_REG 0x65 << MEM_MAP_SHIFT -//#define MOD_DACS2_REG 0x66 << MEM_MAP_SHIFT -//#define MOD_DACS3_REG 0x67 << MEM_MAP_SHIFT - -//user entered - - - - - - -#define GET_ACTUAL_TIME_LSB_REG 16 << MEM_MAP_SHIFT -#define GET_ACTUAL_TIME_MSB_REG 17 << MEM_MAP_SHIFT - -#define GET_MEASUREMENT_TIME_LSB_REG 38 << MEM_MAP_SHIFT -#define GET_MEASUREMENT_TIME_MSB_REG 39 << MEM_MAP_SHIFT - - -#define SET_DELAY_LSB_REG 96 << MEM_MAP_SHIFT //0x68 << MEM_MAP_SHIFT -#define SET_DELAY_MSB_REG 97 << MEM_MAP_SHIFT //0x69 << MEM_MAP_SHIFT -#define GET_DELAY_LSB_REG 18 << MEM_MAP_SHIFT//0x6a << MEM_MAP_SHIFT -#define GET_DELAY_MSB_REG 19 << MEM_MAP_SHIFT//0x6b << MEM_MAP_SHIFT - -#define SET_CYCLES_LSB_REG 98 << MEM_MAP_SHIFT//0x6c << MEM_MAP_SHIFT -#define SET_CYCLES_MSB_REG 99 << MEM_MAP_SHIFT//0x6d << MEM_MAP_SHIFT -#define GET_CYCLES_LSB_REG 20 << MEM_MAP_SHIFT//0x6e << MEM_MAP_SHIFT -#define GET_CYCLES_MSB_REG 21 << MEM_MAP_SHIFT//0x6f << MEM_MAP_SHIFT - -#define SET_FRAMES_LSB_REG 100 << MEM_MAP_SHIFT//0x70 << MEM_MAP_SHIFT -#define SET_FRAMES_MSB_REG 101 << MEM_MAP_SHIFT//0x71 << MEM_MAP_SHIFT -#define GET_FRAMES_LSB_REG 22 << MEM_MAP_SHIFT//0x72 << MEM_MAP_SHIFT -#define GET_FRAMES_MSB_REG 23 << MEM_MAP_SHIFT//0x73 << MEM_MAP_SHIFT - -#define SET_PERIOD_LSB_REG 102 << MEM_MAP_SHIFT//0x74 << MEM_MAP_SHIFT -#define SET_PERIOD_MSB_REG 103 << MEM_MAP_SHIFT//0x75 << MEM_MAP_SHIFT -#define GET_PERIOD_LSB_REG 24 << MEM_MAP_SHIFT//0x76 << MEM_MAP_SHIFT -#define GET_PERIOD_MSB_REG 25 << MEM_MAP_SHIFT//0x77 << MEM_MAP_SHIFT - -//#define PATTERN_WAIT0_TIME_REG_LSB 114 << MEM_MAP_SHIFT -//#define PATTERN_WAIT0_TIME_REG_MSB 115 << MEM_MAP_SHIFT -#define SET_EXPTIME_LSB_REG 114 << MEM_MAP_SHIFT//0x78 << MEM_MAP_SHIFT -#define SET_EXPTIME_MSB_REG 115 << MEM_MAP_SHIFT//0x79 << MEM_MAP_SHIFT -#define GET_EXPTIME_LSB_REG 26 << MEM_MAP_SHIFT//0x7a << MEM_MAP_SHIFT -#define GET_EXPTIME_MSB_REG 27 << MEM_MAP_SHIFT//0x7b << MEM_MAP_SHIFT - -#define SET_GATES_LSB_REG 106 << MEM_MAP_SHIFT//0x7c << MEM_MAP_SHIFT -#define SET_GATES_MSB_REG 107 << MEM_MAP_SHIFT//0x7d << MEM_MAP_SHIFT -#define GET_GATES_LSB_REG 28 << MEM_MAP_SHIFT//0x7e << MEM_MAP_SHIFT -#define GET_GATES_MSB_REG 29 << MEM_MAP_SHIFT//0x7f << MEM_MAP_SHIFT - -#define DATA_IN_LSB_REG 30 << MEM_MAP_SHIFT -#define DATA_IN_MSB_REG 31 << MEM_MAP_SHIFT - -#define PATTERN_OUT_LSB_REG 32 << MEM_MAP_SHIFT -#define PATTERN_OUT_MSB_REG 33 << MEM_MAP_SHIFT - -#define FRAMES_FROM_START_LSB_REG 34 << MEM_MAP_SHIFT -#define FRAMES_FROM_START_MSB_REG 35 << MEM_MAP_SHIFT - -#define FRAMES_FROM_START_PG_LSB_REG 36 << MEM_MAP_SHIFT -#define FRAMES_FROM_START_PG_MSB_REG 37 << MEM_MAP_SHIFT - -#define SLOW_ADC_REG 43 << MEM_MAP_SHIFT - - - -#define PLL_PARAM_REG 80 << MEM_MAP_SHIFT//0x37 << MEM_MAP_SHIFT -#define PLL_PARAM_OUT_REG 5 << MEM_MAP_SHIFT //0x38 << MEM_MAP_SHIFT -#define PLL_CNTRL_REG 81 << MEM_MAP_SHIFT//0x34 << MEM_MAP_SHIFT - - -#ifdef NEW_GBE_INTERFACE -#define GBE_PARAM_OUT_REG 40 << MEM_MAP_SHIFT -#define GBE_PARAM_REG 69 << MEM_MAP_SHIFT -#define GBE_CNTRL_REG 70 << MEM_MAP_SHIFT -#else -#define RX_UDP_AREG 69 << MEM_MAP_SHIFT //rx_udpip_AReg_c : integer:= 69; *\/ -#define UDPPORTS_AREG 70 << MEM_MAP_SHIFT// udpports_AReg_c : integer:= 70; *\/ -#define RX_UDPMACL_AREG 71 << MEM_MAP_SHIFT//rx_udpmacL_AReg_c : integer:= 71; *\/ -#define RX_UDPMACH_AREG 72 << MEM_MAP_SHIFT//rx_udpmacH_AReg_c : integer:= 72; *\/ -#define DETECTORMACL_AREG 73 << MEM_MAP_SHIFT//detectormacL_AReg_c : integer:= 73; *\/ -#define DETECTORMACH_AREG 74 << MEM_MAP_SHIFT//detectormacH_AReg_c : integer:= 74; *\/ -#define DETECTORIP_AREG 75 << MEM_MAP_SHIFT//detectorip_AReg_c : integer:= 75; *\/ -#define IPCHKSUM_AREG 76 << MEM_MAP_SHIFT//ipchksum_AReg_c : integer:= 76; *\/ */ -#endif - - -#define PATTERN_CNTRL_REG 82 << MEM_MAP_SHIFT -#define PATTERN_LIMITS_AREG 83 << MEM_MAP_SHIFT - -#define PATTERN_LOOP0_AREG 84 << MEM_MAP_SHIFT -#define PATTERN_N_LOOP0_REG 85 << MEM_MAP_SHIFT - -#define PATTERN_LOOP1_AREG 86 << MEM_MAP_SHIFT -#define PATTERN_N_LOOP1_REG 87 << MEM_MAP_SHIFT - -#define PATTERN_LOOP2_AREG 88 << MEM_MAP_SHIFT -#define PATTERN_N_LOOP2_REG 89 << MEM_MAP_SHIFT - -#define PATTERN_WAIT0_AREG 90 << MEM_MAP_SHIFT -#define PATTERN_WAIT1_AREG 91 << MEM_MAP_SHIFT -#define PATTERN_WAIT2_AREG 92 << MEM_MAP_SHIFT - - - -//#define DAQ_REG 93 << MEM_MAP_SHIFT //unused -#define NSAMPLES_REG 93 << MEM_MAP_SHIFT - - -#define HV_REG 95 << MEM_MAP_SHIFT - - - -#define PATTERN_IOCTRL_REG_LSB 108 << MEM_MAP_SHIFT -#define PATTERN_IOCTRL_REG_MSB 109 << MEM_MAP_SHIFT - -#define PATTERN_IOCLKCTRL_REG_LSB 110 << MEM_MAP_SHIFT -#define PATTERN_IOCLKCTRL_REG_MSB 111 << MEM_MAP_SHIFT -#define PATTERN_IN_REG_LSB 112 << MEM_MAP_SHIFT -#define PATTERN_IN_REG_MSB 113 << MEM_MAP_SHIFT -#define PATTERN_WAIT0_TIME_REG_LSB 114 << MEM_MAP_SHIFT -#define PATTERN_WAIT0_TIME_REG_MSB 115 << MEM_MAP_SHIFT -#define PATTERN_WAIT1_TIME_REG_LSB 116 << MEM_MAP_SHIFT -#define PATTERN_WAIT1_TIME_REG_MSB 117 << MEM_MAP_SHIFT -#define PATTERN_WAIT2_TIME_REG_LSB 118 << MEM_MAP_SHIFT -#define PATTERN_WAIT2_TIME_REG_MSB 119 << MEM_MAP_SHIFT - -//#define DAC_REG_OFF 120 -//#define DAC_0_1_VAL_REG 120 << MEM_MAP_SHIFT -//#define DAC_2_3_VAL_REG 121 << MEM_MAP_SHIFT -//#define DAC_4_5_VAL_REG 122 << MEM_MAP_SHIFT -//#define DAC_6_7_VAL_REG 123 << MEM_MAP_SHIFT -//#define DAC_8_9_VAL_REG 124 << MEM_MAP_SHIFT -//#define DAC_10_11_VAL_REG 125 << MEM_MAP_SHIFT -//#define DAC_12_13_VAL_REG 126 << MEM_MAP_SHIFT -//#define DAC_14_15_VAL_REG 127 << MEM_MAP_SHIFT -#define DAC_VAL_REG 121 << MEM_MAP_SHIFT -#define DAC_NUM_REG 122 << MEM_MAP_SHIFT -#define DAC_VAL_OUT_REG 42 << MEM_MAP_SHIFT -#define ADC_LATCH_DISABLE_REG 120 << MEM_MAP_SHIFT - - - - - - - - -/* registers defined in FPGA */ -#define GAIN_REG 0 -//#define FLOW_CONTROL_REG 0x11 << MEM_MAP_SHIFT -//#define FLOW_STATUS_REG 0x12 << MEM_MAP_SHIFT -//#define FRAME_REG 0x13 << MEM_MAP_SHIFT -#define MULTI_PURPOSE_REG 0 -//#define TIME_FROM_START_REG 0x16 << MEM_MAP_SHIFT - - -#define ROI_REG 0 // 0x35 << MEM_MAP_SHIFT -#define OVERSAMPLING_REG 0 // 0x36 << MEM_MAP_SHIFT -#define MOENCH_CNTR_REG 0 // 0x31 << MEM_MAP_SHIFT -#define MOENCH_CNTR_OUT_REG 0 // 0x33 << MEM_MAP_SHIFT -#define MOENCH_CNTR_CONF_REG 0 // 0x32 << MEM_MAP_SHIFT - - - -//image -#define DARK_IMAGE_REG 0 // 0x81 << MEM_MAP_SHIFT -#define GAIN_IMAGE_REG 0 // 0x82 << MEM_MAP_SHIFT - -//counter block memory -#define COUNTER_MEMORY_REG 0 // 0x85 << MEM_MAP_SHIFT - - -//not used -//#define MCB_DOUT_REG_OFF 0 // 0x200000 -//#define FIFO_CNTRL_REG_OFF 0 // 0x300000 -//#define FIFO_COUNTR_REG_OFF 0 // 0x400000 -//not used so far -//#define SPEED_REG 0 // 0x006000 -//#define SET_NBITS_REG 0 // 0x008000 -//not used -//#define GET_SHIFT_IN_REG 0 // 0x022000 - - - -#define SHIFTMOD 2 -#define SHIFTFIFO 9 - -/** for PCB_REV_REG */ -#define DETECTOR_TYPE_MASK 0xFF000000 -#define DETECTOR_TYPE_OFFSET 24 -#define BOARD_REVISION_MASK 0xFFFFFF -#define MOENCH03_MODULE_ID 2 -#define JUNGFRAU_MODULE_ID 1 -#define JUNGFRAU_CTB_ID 3 - - - - -/* for control register (16bit only)*/ -#define START_ACQ_BIT 0x0001 -#define STOP_ACQ_BIT 0x0002 -#define START_FIFOTEST_BIT 0x0004 // ????? -#define STOP_FIFOTEST_BIT 0x0008 // ?????? -#define START_READOUT_BIT 0x0010 -#define STOP_READOUT_BIT 0x0020 -#define START_EXPOSURE_BIT 0x0040 -#define STOP_EXPOSURE_BIT 0x0080 -#define START_TRAIN_BIT 0x0100 -#define STOP_TRAIN_BIT 0x0200 -#define FIFO_RESET_BIT 0x8000 -#define SYNC_RESET 0x0400 -#define GB10_RESET_BIT 0x0800 -#define MEM_RESET_BIT 0x1000 - -/* for status register */ -#define RUN_BUSY_BIT 0x00000001 -#define READOUT_BUSY_BIT 0x00000002 -#define FIFOTEST_BUSY_BIT 0x00000004 //???? -#define WAITING_FOR_TRIGGER_BIT 0x00000008 -#define DELAYBEFORE_BIT 0x00000010 -#define DELAYAFTER_BIT 0x00000020 -#define EXPOSING_BIT 0x00000040 -#define COUNT_ENABLE_BIT 0x00000080 -#define READSTATE_0_BIT 0x00000100 -#define READSTATE_1_BIT 0x00000200 -#define READSTATE_2_BIT 0x00000400 -#define LAM_BIT 0x00000400 // error! -#define SOME_FIFO_FULL_BIT 0x00000800 // error! - - - -#define RUNSTATE_0_BIT 0x00001000 -#define RUNSTATE_1_BIT 0x00002000 -#define RUNSTATE_2_BIT 0x00004000 -#define STOPPED_BIT 0x00008000 // stopped! -#define ALL_FIFO_EMPTY_BIT 0x00010000 // data ready -#define RUNMACHINE_BUSY_BIT 0x00020000 -#define READMACHINE_BUSY_BIT 0x00040000 -#define PLL_RECONFIG_BUSY 0x00100000 - - - -/* for fifo status register */ -#define FIFO_ENABLED_BIT 0x80000000 -#define FIFO_DISABLED_BIT 0x01000000 -#define FIFO_ERROR_BIT 0x08000000 -#define FIFO_EMPTY_BIT 0x04000000 -#define FIFO_DATA_READY_BIT 0x02000000 -#define FIFO_COUNTER_MASK 0x000001ff -#define FIFO_NM_MASK 0x00e00000 -#define FIFO_NM_OFF 21 -#define FIFO_NC_MASK 0x001ffe00 -#define FIFO_NC_OFF 9 - -/* for config register *///not really used yet -#define TOT_ENABLE_BIT 0x00000002 -#define TIMED_GATE_BIT 0x00000004 -#define CONT_RO_ENABLE_BIT 0x00080000 -#define GB10_NOT_CPU_BIT 0x00001000 -#define ADC_OUTPUT_DISABLE_BIT 0x00100 -#define DIGITAL_OUTPUT_ENABLE_BIT 0x00200 - - -/* for speed register */ -#define CLK_DIVIDER_MASK 0x000000ff -#define CLK_DIVIDER_OFFSET 0 -#define SET_LENGTH_MASK 0x00000f00 -#define SET_LENGTH_OFFSET 8 -#define WAIT_STATES_MASK 0x0000f000 -#define WAIT_STATES_OFFSET 12 -#define TOTCLK_DIVIDER_MASK 0xff000000 -#define TOTCLK_DIVIDER_OFFSET 24 -#define TOTCLK_DUTYCYCLE_MASK 0x00ff0000 -#define TOTCLK_DUTYCYCLE_OFFSET 16 - -/* for external signal register */ -#define SIGNAL_OFFSET 4 -#define SIGNAL_MASK 0xF -#define EXT_SIG_OFF 0x0 -#define EXT_GATE_IN_ACTIVEHIGH 0x1 -#define EXT_GATE_IN_ACTIVELOW 0x2 -#define EXT_TRIG_IN_RISING 0x3 -#define EXT_TRIG_IN_FALLING 0x4 -#define EXT_RO_TRIG_IN_RISING 0x5 -#define EXT_RO_TRIG_IN_FALLING 0x6 -#define EXT_GATE_OUT_ACTIVEHIGH 0x7 -#define EXT_GATE_OUT_ACTIVELOW 0x8 -#define EXT_TRIG_OUT_RISING 0x9 -#define EXT_TRIG_OUT_FALLING 0xA -#define EXT_RO_TRIG_OUT_RISING 0xB -#define EXT_RO_TRIG_OUT_FALLING 0xC - - - -/* for temperature register */ -#define T1_CLK_BIT 0x00000001 -#define T1_CS_BIT 0x00000002 -#define T2_CLK_BIT 0x00000004 -#define T2_CS_BIT 0x00000008 - - - -/* fifo control register */ -//#define FIFO_RESET_BIT 0x00000001 -//#define FIFO_DISABLE_TOGGLE_BIT 0x00000002 - - -//chip shiftin register meaning -#define OUTMUX_OFF 20 -#define OUTMUX_MASK 0x1f -#define PROBES_OFF 4 -#define PROBES_MASK 0x7f -#define OUTBUF_OFF 0 -#define OUTBUF_MASK 1 - - -/* multi purpose register */ -#define PHASE_STEP_BIT 0x00000001 -#define PHASE_STEP_OFFSET 0 -// #define xxx_BIT 0x00000002 -#define RESET_COUNTER_BIT 0x00000004 -#define RESET_COUNTER_OFFSET 2 -//#define xxx_BIT 0x00000008 -//#define xxx_BIT 0x00000010 -#define SW1_BIT 0x00000020 -#define SW1_OFFSET 5 -#define WRITE_BACK_BIT 0x00000040 -#define WRITE_BACK_OFFSET 6 -#define RESET_BIT 0x00000080 -#define RESET_OFFSET 7 -#define ENET_RESETN_BIT 0x00000800 -#define ENET_RESETN_OFFSET 11 -#define INT_RSTN_BIT 0x00002000 -#define INT_RSTN_OFFSET 13 -#define DIGITAL_TEST_BIT 0x00004000 -#define DIGITAL_TEST_OFFSET 14 -//#define CHANGE_AT_POWER_ON_BIT 0x00008000 -//#define CHANGE_AT_POWER_ON_OFFSET 15 - - -/* settings/conf gain register */ -#define GAIN_MASK 0x0000000f -#define GAIN_OFFSET 0 -#define SETTINGS_MASK 0x000000f0 -#define SETTINGS_OFFSET 4 - - -/* CHIP_OF_INTRST_REG */ -#define CHANNEL_MASK 0xffff0000 -#define CHANNEL_OFFSET 16 -#define ACTIVE_ADC_MASK 0x0000001f - - - -/**ADC SYNC CLEAN FIFO*/ -#define ADCSYNC_CLEAN_FIFO_BITS 0x300000 -#define CLEAN_FIFO_MASK 0x0fffff - - - - -enum {run_clk_c, adc_clk_c, sync_clk_c, dbit_clk_c}; - - - - -#define PLL_CNTR_ADDR_OFF 16 //PLL_CNTR_REG bits 21 downto 16 represent the counter address - -#define PLL_CNTR_RECONFIG_RESET_BIT 0 -#define PLL_CNTR_READ_BIT 1 -#define PLL_CNTR_WRITE_BIT 2 -#define PLL_CNTR_PLL_RESET_BIT 3 - - -#define PLL_CNTR_PHASE_EN_BIT 8 -#define PLL_CNTR_UPDN_BIT 9 -#define PLL_CNTR_CNTSEL_OFF 10 - - - - - -#define PLL_MODE_REG 0x0 -#define PLL_STATUS_REG 0x1 -#define PLL_START_REG 0x2 -#define PLL_N_COUNTER_REG 0x3 -#define PLL_M_COUNTER_REG 0x4 -#define PLL_C_COUNTER_REG 0x5 //which ccounter stands in param 22:18; 7:0 lowcount 15:8 highcount; 16 bypassenable; 17 oddivision -#define PLL_PHASE_SHIFT_REG 0x6 // which ccounter stands in param 16:20; 21 updown (1 up, 0 down) -#define PLL_K_COUNTER_REG 0x7 -#define PLL_BANDWIDTH_REG 0x8 -#define PLL_CHARGEPUMP_REG 0x9 -#define PLL_VCO_DIV_REG 0x1c -#define PLL_MIF_REG 0x1f - -#define PPL_M_CNT_PARAM_DEFAULT 0x4040 -#define PPL_N_CNT_PARAM_DEFAULT 0x20D0C -#define PPL_C0_CNT_PARAM_DEFAULT 0x20D0C -#define PPL_C1_CNT_PARAM_DEFAULT 0xA0A0 -#define PPL_C2_CNT_PARAM_DEFAULT 0x20D0C -#define PPL_C3_CNT_PARAM_DEFAULT 0x0808 -#define PPL_BW_PARAM_DEFAULT 0x2EE0 -#define PPL_VCO_PARAM_DEFAULT 0x1 - -#define NEW_PLL_RECONFIG - -#ifdef NEW_PLL_RECONFIG -#define PLL_VCO_FREQ_MHZ 400//480//800 -#else -#define PLL_VCO_FREQ_MHZ 480//800 -#endif - - - - - -/* - GBE parameter and control registers definitions -*/ - -#define GBE_CTRL_WSTROBE 0 -#define GBE_CTRL_VAR_OFFSET 16 -#define GBE_CTRL_VAR_MASK 0XF -#define GBE_CTRL_RAMADDR_OFFSET 24 -#define GBE_CTRL_RAMADDR_MASK 0X3F -#define GBE_CTRL_INTERFACE 23 - -#define RX_UDP_IP_ADDR 0 -#define RX_UDP_PORTS_ADDR 1 -#define RX_UDP_MAC_L_ADDR 2 -#define RX_UDP_MAC_H_ADDR 3 -#define IPCHECKSUM_ADDR 4 -#define GBE_DELAY_ADDR 5 -#define GBE_RESERVED1_ADDR 6 -#define GBE_RESERVED2_ADDR 7 -#define DETECTOR_MAC_L_ADDR 8 -#define DETECTOR_MAC_H_ADDR 9 -#define DETECTOR_IP_ADDR 10 - - - -/**------------------ --- pattern registers definitions ---------------------------------------------- */ -#define IOSIGNALS_MASK 0xfffffffffffff -#define ADC_ENABLE_BIT 63 -#define APATTERN_MASK 0xffff -#define ASTART_OFFSET 0 -#define ASTOP_OFFSET 16 -#define PATTERN_CTRL_WRITE_BIT 0 -#define PATTERN_CTRL_READ_BIT 1 -#define PATTERN_CTRL_ADDR_OFFSET 16 -#define MAX_PATTERN_LENGTH 1024 - - -#endif - diff --git a/slsDetectorServers/jctbDetectorServer/server.c b/slsDetectorServers/jctbDetectorServer/server.c deleted file mode 100755 index e3c8e4334..000000000 --- a/slsDetectorServers/jctbDetectorServer/server.c +++ /dev/null @@ -1,139 +0,0 @@ -/* A simple server in the internet domain using TCP - The port number is passed as an argument */ - -#include "sls_detector_defs.h" - -#include -#include "communication_funcs.h" -#include "server_funcs.h" -#include - - - -extern int sockfd; -extern int phase_shift; - - - -void error(char *msg) -{ - perror(msg); -} - -int main(int argc, char *argv[]) -{ - int portno, b; - char cmd[500]; - int retval=OK; - int sd, fd; - int iarg; - int checkType = 1; - - - for(iarg=1; iarg 2) && (!strcasecmp(argv[2],"stopserver"))){ - portno = DEFAULT_PORTNO+1; - if ( sscanf(argv[1],"%d",&portno) ==0) { - printf("could not open stop server: unknown port\n"); - return 1; - } - b=0; - printf("\n\nStop Server\nOpening stop server on port %d\n",portno); - checkType=0; - - } - - //control server - else { - portno = DEFAULT_PORTNO; - if(checkType) - sprintf(cmd,"%s %d stopserver &",argv[0],DEFAULT_PORTNO+1); - else - sprintf(cmd,"%s %d stopserver -test with_gotthard &",argv[0],DEFAULT_PORTNO+1); - printf("\n\nControl Server\nOpening control server on port %d\n",portno ); - - //printf("\n\ncmd:%s\n",cmd); - system(cmd); - b=1; - checkType=1; - - } - - - - - - init_detector(b, checkType); - - - sd=bindSocket(portno); - sockfd=sd; - if (getServerError(sd)) { - printf("server error!\n"); - return -1; - } - - /* assign function table */ - function_table(); -#ifdef VERBOSE - printf("function table assigned \n"); -#endif - - - /* waits for connection */ - while(retval!=GOODBYE) { -#ifdef VERBOSE - printf("\n"); -#endif -#ifdef VERY_VERBOSE - printf("Waiting for client call\n"); -#endif - fd=acceptConnection(sockfd); -#ifdef VERY_VERBOSE - printf("Conenction accepted\n"); -#endif - retval=decode_function(fd); -#ifdef VERY_VERBOSE - printf("function executed\n"); -#endif - closeConnection(fd); -#ifdef VERY_VERBOSE - printf("connection closed\n"); -#endif - } - - exitServer(sockfd); - printf("Goodbye!\n"); - - return 0; -} - diff --git a/slsDetectorServers/jctbDetectorServer/server_defs.h b/slsDetectorServers/jctbDetectorServer/server_defs.h deleted file mode 100755 index 07144546f..000000000 --- a/slsDetectorServers/jctbDetectorServer/server_defs.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef SERVER_DEFS_H -#define SERVER_DEFS_H - -#include "sls_detector_defs.h" - -#include - - -// Hardware definitions - -#define NCHAN 36 -#define NCHIP 1 -#define NADC 9 // - -/* #ifdef CTB */ -/* #define NDAC 24 */ -/* #define NPWR 5 */ -/* #else */ -/* #define NDAC 16 */ -/* #define NPWR 0 */ -/* #endif */ -#define DAC_CMD_OFF 20 - -#define NMAXMODX 1 -#define NMAXMODY 1 -#define NMAXMOD (NMAXMODX*NMAXMODY) - -#define NCHANS (NCHAN*NCHIP*NMAXMOD) -#define NDACS (NDAC*NMAXMOD) - - -/**when moench readout tested with gotthard module*/ - -#define TRIM_DR (((int)pow(2,NTRIMBITS))-1) -#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1) - - -#define ALLMOD 0xffff -#define ALLFIFO 0xffff - -#define GOTTHARD_ADCSYNC_VAL 0x32214 -#define ADCSYNC_VAL 0x02111 -#define TOKEN_RESTART_DELAY 0x88000000 -#define TOKEN_RESTART_DELAY_ROI 0x1b000000 -#define TOKEN_TIMING_REV1 0x1f16 -#define TOKEN_TIMING_REV2 0x1f0f - -#define DEFAULT_PHASE_SHIFT 0 // 120 -#define DEFAULT_IP_PACKETSIZE 0x0522 -#define DEFAULT_UDP_PACKETSIZE 0x050E -#define ADC1_IP_PACKETSIZE 256*2+14+20 -#define ADC1_UDP_PACKETSIZE 256*2+4+8+2 - -#ifdef VIRTUAL -#define DEBUGOUT -#endif - -#define CLK_FREQ 156.25E+6 -#define ADC_CLK_FREQ 32E+6 - - -#endif diff --git a/slsDetectorServers/jctbDetectorServer/server_funcs.c b/slsDetectorServers/jctbDetectorServer/server_funcs.c deleted file mode 100644 index 436aa28c8..000000000 --- a/slsDetectorServers/jctbDetectorServer/server_funcs.c +++ /dev/null @@ -1,3724 +0,0 @@ -#include "sls_detector_defs.h" -#include "server_funcs.h" -#include "server_defs.h" -#include "firmware_funcs.h" -#include "mcb_funcs.h" -#include "slow_adc.h" -#include "registers_m.h" -#include "gitInfoMoench.h" -#include "blackfin.h" - -#define FIFO_DATA_REG_OFF 0x50 << MEM_MAP_SHIFT -// Global variables - - -int (*flist[256])(int); - - - -//defined in the detector specific file -/* #ifdef MYTHEND */ -/* const enum detectorType myDetectorType=MYTHEN; */ -/* #elif GOTTHARDD */ -/* const enum detectorType myDetectorType=GOTTHARD; */ -/* #elif EIGERD */ -/* const enum detectorType myDetectorType=EIGER; */ -/* #elif PICASSOD */ -/* const enum detectorType myDetectorType=PICASSO; */ -/* #elif MOENCHD */ -/* const enum detectorType myDetectorType=MOENCH; */ -/* #else */ -enum detectorType myDetectorType=GENERIC; -/* #endif */ - - -extern int nModX; -extern int nModY; -extern int dataBytes; -extern int nSamples; -extern int dynamicRange; -extern int storeInRAM; - -extern int lockStatus; -extern char lastClientIP[INET_ADDRSTRLEN]; -extern char thisClientIP[INET_ADDRSTRLEN]; -extern int differentClients; - -/* global variables for optimized readout */ -extern unsigned int *ram_values; -char *dataretval=NULL; -int nframes, iframes, dataret; -char mess[1000]; - -int digitalTestBit = 0; - -extern int withGotthard; - - -int adcvpp=0x4; - -/** for jungfrau reinitializing macro later */ -int N_CHAN=NCHAN; -int N_CHIP=NCHIP; -int N_DAC=24; -int N_ADC=NADC; -int N_PWR=5; -int N_CHANS=NCHANS; - - -int init_detector(int b, int checkType) { - - int i; - if (mapCSP0()==FAIL) { printf("Could not map memory\n"); - exit(1); - } - - // defineGPIOpins(); - //checktype - if (checkType) { - printf("Bus test... (checktype is %d; b is %d)",checkType,b ); - for (i=0; i<1000000; i++) { - bus_w(SET_DELAY_LSB_REG, i*100); - bus_r(FPGA_VERSION_REG); - if (i*100!=bus_r(SET_DELAY_LSB_REG)) - printf("ERROR: wrote 0x%x, read 0x%x\n",i*100,bus_r(SET_DELAY_LSB_REG)); - } - printf("Finished\n"); - }else - printf("(checktype is %d; b is %d)",checkType,b ); - - - //confirm the detector type - switch ((bus_r(PCB_REV_REG) & DETECTOR_TYPE_MASK)>>DETECTOR_TYPE_OFFSET) { - case MOENCH03_MODULE_ID: - myDetectorType=MOENCH; - printf("This is a MOENCH03 module %d\n",MOENCH); - N_DAC=8; - N_PWR=0; - break; - - case JUNGFRAU_MODULE_ID: - myDetectorType=JUNGFRAU; - printf("This is a Jungfrau module %d\n Not supported: exiting!", JUNGFRAU); - N_DAC=8; - N_PWR=0; - exit(1); - break; - - case JUNGFRAU_CTB_ID: - myDetectorType=JUNGFRAUCTB; - printf("This is a CTB %d\n", JUNGFRAUCTB); - N_DAC=24; - N_PWR=5; - break; - - default: - myDetectorType=GENERIC; - printf("Unknown detector type %02x\n",(bus_r(PCB_REV_REG) & DETECTOR_TYPE_MASK)>>DETECTOR_TYPE_OFFSET); - N_DAC=8; - N_PWR=0; - break; - - } - printf("Detector type is %d\n", myDetectorType); - if (b) - initDetector(); - - //common for both control and stop server - strcpy(mess,"dummy message"); - strcpy(lastClientIP,"none"); - strcpy(thisClientIP,"none1"); - lockStatus=0; - // getDynamicRange(); - - /* both these functions setROI and allocateRAM should go into the control server part. */ - - return OK; -} - - -int decode_function(int file_des) { - int fnum,n; - int retval=FAIL; -#ifdef VERBOSE - printf( "receive data\n"); -#endif - n = receiveDataOnly(file_des,&fnum,sizeof(fnum)); - if (n <= 0) { -#ifdef VERBOSE - printf("ERROR reading from socket %d, %d %d\n", n, fnum, file_des); -#endif - return FAIL; - } -#ifdef VERBOSE - else - printf("size of data received %d\n",n); -#endif - printf("calling function=%d (%s)\n", fnum, getFunctionName((enum detFuncs)fnum)); -#ifdef VERBOSE - printf( "calling function fnum = %d %x %x %x\n",fnum,(unsigned int)(flist[fnum]), (unsigned int)(flist[F_READ_REGISTER]),(unsigned int)(&read_register)); -#endif - if (fnum<0 || fnum>255) - fnum=255; - retval=(*flist[fnum])(file_des); - printf(" function=%d (%s) returned: %d\n", fnum, getFunctionName((enum detFuncs)fnum), retval); - if (retval==FAIL) - printf( "Error executing the function = %d \n",fnum); - return retval; -} - - -const char* getFunctionName(enum detFuncs func) { - switch (func) { - case F_EXEC_COMMAND: return "F_EXEC_COMMAND"; - case F_GET_ERROR: return "F_GET_ERROR"; - case F_GET_DETECTOR_TYPE: return "F_GET_DETECTOR_TYPE"; - case F_SET_NUMBER_OF_MODULES: return "F_SET_NUMBER_OF_MODULES"; - case F_GET_MAX_NUMBER_OF_MODULES: return "F_GET_MAX_NUMBER_OF_MODULES"; - case F_SET_EXTERNAL_SIGNAL_FLAG: return "F_SET_EXTERNAL_SIGNAL_FLAG"; - case F_SET_EXTERNAL_COMMUNICATION_MODE: return "F_SET_EXTERNAL_COMMUNICATION_MODE"; - case F_GET_ID: return "F_GET_ID"; - case F_DIGITAL_TEST: return "F_DIGITAL_TEST"; - case F_ANALOG_TEST: return "F_ANALOG_TEST"; - case F_ENABLE_ANALOG_OUT: return "F_ENABLE_ANALOG_OUT"; - case F_CALIBRATION_PULSE: return "F_CALIBRATION_PULSE"; - case F_SET_DAC: return "F_SET_DAC"; - case F_GET_ADC: return "F_GET_ADC"; - case F_WRITE_REGISTER: return "F_WRITE_REGISTER"; - case F_READ_REGISTER: return "F_READ_REGISTER"; - case F_WRITE_MEMORY: return "F_WRITE_MEMORY"; - case F_READ_MEMORY: return "F_READ_MEMORY"; - case F_SET_CHANNEL: return "F_SET_CHANNEL"; - case F_GET_CHANNEL: return "F_GET_CHANNEL"; - case F_SET_ALL_CHANNELS: return "F_SET_ALL_CHANNELS"; - case F_SET_CHIP: return "F_SET_CHIP"; - case F_GET_CHIP: return "F_GET_CHIP"; - case F_SET_ALL_CHIPS: return "F_SET_ALL_CHIPS"; - case F_SET_MODULE: return "F_SET_MODULE"; - case F_GET_MODULE: return "F_GET_MODULE"; - case F_SET_ALL_MODULES: return "F_SET_ALL_MODULES"; - case F_SET_SETTINGS: return "F_SET_SETTINGS"; - case F_GET_THRESHOLD_ENERGY: return "F_GET_THRESHOLD_ENERGY"; - case F_SET_THRESHOLD_ENERGY: return "F_SET_THRESHOLD_ENERGY"; - case F_START_ACQUISITION: return "F_START_ACQUISITION"; - case F_STOP_ACQUISITION: return "F_STOP_ACQUISITION"; - case F_START_READOUT: return "F_START_READOUT"; - case F_GET_RUN_STATUS: return "F_GET_RUN_STATUS"; - case F_START_AND_READ_ALL: return "F_START_AND_READ_ALL"; - case F_READ_FRAME: return "F_READ_FRAME"; - case F_READ_ALL: return "F_READ_ALL"; - case F_SET_TIMER: return "F_SET_TIMER"; - case F_GET_TIME_LEFT: return "F_GET_TIME_LEFT"; - case F_SET_DYNAMIC_RANGE: return "F_SET_DYNAMIC_RANGE"; - case F_SET_READOUT_FLAGS: return "F_SET_READOUT_FLAGS"; - case F_SET_ROI: return "F_SET_ROI"; - case F_SET_SPEED: return "F_SET_SPEED"; - case F_EXECUTE_TRIMMING: return "F_EXECUTE_TRIMMING"; - case F_EXIT_SERVER: return "F_EXIT_SERVER"; - case F_LOCK_SERVER: return "F_LOCK_SERVER"; - case F_GET_LAST_CLIENT_IP: return "F_GET_LAST_CLIENT_IP"; - case F_SET_PORT: return "F_SET_PORT"; - case F_UPDATE_CLIENT: return "F_UPDATE_CLIENT"; - case F_CONFIGURE_MAC: return "F_CONFIGURE_MAC"; - case F_LOAD_IMAGE: return "F_LOAD_IMAGE"; - case F_SET_MASTER: return "F_SET_MASTER"; - case F_SET_SYNCHRONIZATION_MODE: return "F_SET_SYNCHRONIZATION_MODE"; - case F_READ_COUNTER_BLOCK: return "F_READ_COUNTER_BLOCK"; - case F_RESET_COUNTER_BLOCK: return "F_RESET_COUNTER_BLOCK"; - case F_CALIBRATE_PEDESTAL: return "F_CALIBRATE_PEDESTAL"; - case F_ENABLE_TEN_GIGA: return "F_ENABLE_TEN_GIGA"; - case F_SET_ALL_TRIMBITS: return "F_SET_ALL_TRIMBITS"; - case F_SET_CTB_PATTERN: return "F_SET_CTB_PATTERN"; - case F_WRITE_ADC_REG: return "F_WRITE_ADC_REG"; - case F_SET_COUNTER_BIT: return "F_SET_COUNTER_BIT"; - case F_PULSE_PIXEL: return "F_PULSE_PIXEL"; - case F_PULSE_PIXEL_AND_MOVE: return "F_PULSE_PIXEL_AND_MOVE"; - case F_PULSE_CHIP: return "F_PULSE_CHIP"; - case F_SET_RATE_CORRECT: return "F_SET_RATE_CORRECT"; - case F_GET_RATE_CORRECT: return "F_GET_RATE_CORRECT"; - case F_SET_NETWORK_PARAMETER: return "F_SET_NETWORK_PARAMETER"; - case F_PROGRAM_FPGA: return "F_PROGRAM_FPGA"; - case F_RESET_FPGA: return "F_RESET_FPGA"; - case F_POWER_CHIP: return "F_POWER_CHIP"; - case F_ACTIVATE: return "F_ACTIVATE"; - case F_PREPARE_ACQUISITION: return "F_PREPARE_ACQUISITION"; - case F_CLEANUP_ACQUISITION: return "F_CLEANUP_ACQUISITION"; - default: return "Unknown Function"; - } -} - - -int function_table() { - int i; - for (i=0;i<256;i++){ - flist[i]=&M_nofunc; - } - flist[F_EXIT_SERVER]=&exit_server; - flist[F_EXEC_COMMAND]=&exec_command; - flist[F_GET_DETECTOR_TYPE]=&get_detector_type; - flist[F_SET_NUMBER_OF_MODULES]=&set_number_of_modules; - flist[F_GET_MAX_NUMBER_OF_MODULES]=&get_max_number_of_modules; - flist[F_SET_EXTERNAL_SIGNAL_FLAG]=&set_external_signal_flag; - flist[F_SET_EXTERNAL_COMMUNICATION_MODE]=&set_external_communication_mode; - flist[F_GET_ID]=&get_id; - flist[F_DIGITAL_TEST]=&digital_test; - flist[F_WRITE_REGISTER]=&write_register; - flist[F_READ_REGISTER]=&read_register; - flist[F_SET_DAC]=&set_dac; - flist[F_GET_ADC]=&get_adc; - flist[F_SET_CHANNEL]=&set_channel; - flist[F_SET_CHIP]=&set_chip; - flist[F_SET_MODULE]=&set_module; - flist[F_GET_CHANNEL]=&get_channel; - flist[F_GET_CHIP]=&get_chip; - flist[F_GET_MODULE]=&get_module; - flist[F_GET_THRESHOLD_ENERGY]=&get_threshold_energy; - flist[F_SET_THRESHOLD_ENERGY]=&set_threshold_energy; - flist[F_SET_SETTINGS]=&set_settings; - flist[F_START_ACQUISITION]=&start_acquisition; - flist[F_STOP_ACQUISITION]=&stop_acquisition; - flist[F_START_READOUT]=&start_readout; - flist[F_GET_RUN_STATUS]=&get_run_status; - flist[F_READ_FRAME]=&read_frame; - flist[F_READ_ALL]=&read_all; - flist[F_START_AND_READ_ALL]=&start_and_read_all; - flist[F_SET_TIMER]=&set_timer; - flist[F_GET_TIME_LEFT]=&get_time_left; - flist[F_SET_DYNAMIC_RANGE]=&set_dynamic_range; - flist[F_SET_ROI]=&set_roi; - flist[F_SET_SPEED]=&set_speed; - flist[F_SET_READOUT_FLAGS]=&set_readout_flags; - flist[F_EXECUTE_TRIMMING]=&execute_trimming; - flist[F_LOCK_SERVER]=&lock_server; - flist[F_SET_PORT]=&set_port; - flist[F_GET_LAST_CLIENT_IP]=&get_last_client_ip; - flist[F_UPDATE_CLIENT]=&update_client; - flist[F_CONFIGURE_MAC]=&configure_mac; - flist[F_LOAD_IMAGE]=&load_image; - flist[F_SET_MASTER]=&set_master; - flist[F_SET_SYNCHRONIZATION_MODE]=&set_synchronization; - flist[F_READ_COUNTER_BLOCK]=&read_counter_block; - flist[F_RESET_COUNTER_BLOCK]=&reset_counter_block; - flist[F_CALIBRATE_PEDESTAL]=&calibrate_pedestal; - flist[F_SET_CTB_PATTERN]=&set_ctb_pattern; - flist[F_WRITE_ADC_REG]=&write_adc_register; - flist[F_PROGRAM_FPGA]=&program_fpga; - flist[F_POWER_CHIP]=&power_chip; - flist[F_RESET_FPGA]=&reset_fpga; - flist[F_ACTIVATE]=&activate; - flist[F_PREPARE_ACQUISITION]=&prepare_acquisition; - flist[F_CLEANUP_ACQUISITION]=&cleanup_acquisition; - return OK; -} - - -int M_nofunc(int file_des){ - - int ret=FAIL; - sprintf(mess,"Unrecognized Function\n"); - printf(mess); - - sendDataOnly(file_des,&ret,sizeof(ret)); - sendDataOnly(file_des,mess,sizeof(mess)); - return FAIL; -} - - -int exit_server(int file_des) { - int retval=FAIL; - sendDataOnly(file_des,&retval,sizeof(retval)); - printf("closing server."); - sprintf(mess,"closing server"); - sendDataOnly(file_des,mess,sizeof(mess)); - return GOODBYE; -} - -int exec_command(int file_des) { - char cmd[MAX_STR_LENGTH]; - char answer[MAX_STR_LENGTH]; - int retval=OK; - int sysret=0; - int n=0; - - /* receive arguments */ - n = receiveDataOnly(file_des,cmd,MAX_STR_LENGTH); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - retval=FAIL; - } - - /* execute action if the arguments correctly arrived*/ - if (retval==OK) { -#ifdef VERBOSE - printf("executing command %s\n", cmd); -#endif - if (lockStatus==0 || differentClients==0) - sysret=system(cmd); - - //should be replaced by popen - if (sysret==0) { - sprintf(answer,"Succeeded\n"); - if (lockStatus==1 && differentClients==1) - sprintf(answer,"Detector locked by %s\n", lastClientIP); - } else { - sprintf(answer,"Failed\n"); - retval=FAIL; - } - } else { - sprintf(answer,"Could not receive the command\n"); - } - - /* send answer */ - n = sendDataOnly(file_des,&retval,sizeof(retval)); - n = sendDataOnly(file_des,answer,MAX_STR_LENGTH); - if (n < 0) { - sprintf(mess,"Error writing to socket"); - retval=FAIL; - } - - - /*return ok/fail*/ - return retval; - -} - - - -int get_detector_type(int file_des) { - int n=0; - enum detectorType ret; - int retval=OK; - - sprintf(mess,"Can't return detector type\n"); - - - /* receive arguments */ - /* execute action */ - ret=JUNGFRAUCTB;//myDetectorType; - -#ifdef VERBOSE - printf("Returning detector type %d\n",ret); -#endif - - /* send answer */ - /* send OK/failed */ - if (differentClients==1) - retval=FORCE_UPDATE; - - n += sendDataOnly(file_des,&retval,sizeof(retval)); - if (retval!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&ret,sizeof(ret)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - /*return ok/fail*/ - return retval; - - -} - - -int set_number_of_modules(int file_des) { - int n; - int arg[2], ret=0; - int retval=OK; - int dim, nm; - - sprintf(mess,"Can't set number of modules\n"); - - /* receive arguments */ - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket %d", n); - retval=GOODBYE; - } - if (retval==OK) { - dim=arg[0]; - nm=arg[1]; - - /* execute action */ -#ifdef VERBOSE - printf("Setting the number of modules in dimension %d to %d\n",dim,nm ); -#endif - - //if (nm!=GET_FLAG) { - if (dim!=X && nm!=GET_FLAG) { - retval=FAIL; - sprintf(mess,"Can't change module number in dimension %d\n",dim); - } else { - if (lockStatus==1 && differentClients==1 && nm!=GET_FLAG) { - sprintf(mess,"Detector locked by %s\n", lastClientIP); - retval=FAIL; - } else { - ret=setNMod(nm); - if (nModX==nm || nm==GET_FLAG) { - retval=OK; - if (differentClients==1) - retval=FORCE_UPDATE; - } else - retval=FAIL; - } - } - } - /*} else { - if (dim==Y) { - ret=nModY; - } else if (dim==X) { - ret=setNMod(-1); - } - } - */ - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&retval,sizeof(retval)); - if (retval!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&ret,sizeof(ret)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - /*return ok/fail*/ - return retval; - -} - - -int get_max_number_of_modules(int file_des) { - int n; - int ret; - int retval=OK; - enum dimension arg; - - sprintf(mess,"Can't get max number of modules\n"); - /* receive arguments */ - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - retval=FAIL; - } - /* execute action */ -#ifdef VERBOSE - printf("Getting the max number of modules in dimension %d \n",arg); -#endif - - - switch (arg) { - case X: - ret=getNModBoard(); - break; - case Y: - ret=NMAXMODY; - break; - default: - ret=FAIL; - retval=FAIL; - break; - } -#ifdef VERBOSE - printf("Max number of module in dimension %d is %d\n",arg,ret ); -#endif - - - - if (differentClients==1 && retval==OK) { - retval=FORCE_UPDATE; - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&retval,sizeof(retval)); - if (retval!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&ret,sizeof(ret)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - - - /*return ok/fail*/ - return retval; -} - - -//index 0 is in gate -//index 1 is in trigger -//index 2 is out gate -//index 3 is out trigger - -int set_external_signal_flag(int file_des) { - int n; - int arg[2]; - int ret=OK; - int signalindex; - enum externalSignalFlag flag, retval; - - sprintf(mess,"Can't set external signal flag\n"); - - /* receive arguments */ - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - retval=SIGNAL_OFF; - if (ret==OK) { - signalindex=arg[0]; - flag=arg[1]; - /* execute action */ - switch (flag) { - case GET_EXTERNAL_SIGNAL_FLAG: - retval=getExtSignal(signalindex); - break; - - default: - if (differentClients==0 || lockStatus==0) { - retval=setExtSignal(signalindex,flag); - } else { - if (lockStatus!=0) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n", lastClientIP); - } - } - - } - -#ifdef VERBOSE - printf("Setting external signal %d to flag %d\n",signalindex,flag ); - printf("Set to flag %d\n",retval); -#endif - - } else { - ret=FAIL; - } - - if (ret==OK && differentClients!=0) - ret=FORCE_UPDATE; - - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - - /*return ok/fail*/ - return ret; - -} - - -int set_external_communication_mode(int file_des) { - int n; - enum externalCommunicationMode arg, ret=GET_EXTERNAL_COMMUNICATION_MODE; - int retval=OK; - - sprintf(mess,"Can't set external communication mode\n"); - - - /* receive arguments */ - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - retval=FAIL; - } - /* - enum externalCommunicationMode{ - GET_EXTERNAL_COMMUNICATION_MODE, - AUTO, - TRIGGER_EXPOSURE_SERIES, - TRIGGER_EXPOSURE_BURST, - TRIGGER_READOUT, - TRIGGER_COINCIDENCE_WITH_INTERNAL_ENABLE, - GATE_FIX_NUMBER, - GATE_FIX_DURATION, - GATE_WITH_START_TRIGGER, - GATE_COINCIDENCE_WITH_INTERNAL_ENABLE - }; - */ - if (retval==OK) { - /* execute action */ - - ret=setTiming(arg); - - /* switch(arg) { */ - /* default: */ - /* sprintf(mess,"The meaning of single signals should be set\n"); */ - /* retval=FAIL; */ - /* } */ - - -#ifdef VERBOSE - printf("Setting external communication mode to %d\n", arg); -#endif - } else - ret=FAIL; - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&retval,sizeof(retval)); - if (retval!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&ret,sizeof(ret)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return retval; -} - - - -int get_id(int file_des) { - // sends back 64 bits! - int64_t retval=-1; - int ret=OK; - int n=0; - enum idMode arg; - - sprintf(mess,"Can't return id\n"); - - /* receive arguments */ - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - -#ifdef VERBOSE - printf("Getting id %d\n", arg); -#endif - - switch (arg) { - case DETECTOR_SERIAL_NUMBER: - retval=getDetectorNumber(); - break; - case DETECTOR_FIRMWARE_VERSION: - retval=getFirmwareSVNVersion(); - retval=(retval <<32) | getFirmwareVersion(); - break; - case DETECTOR_SOFTWARE_VERSION: - retval= GITREV; - retval= (retval <<32) | GITDATE; - break; - default: - printf("Required unknown id %d \n", arg); - ret=FAIL; - retval=FAIL; - break; - } - -#ifdef VERBOSE - printf("Id is %llx\n", retval); -#endif - - if (differentClients==1) - ret=FORCE_UPDATE; - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; - -} - -int digital_test(int file_des) { - - int retval; - int ret=OK; - int imod=-1; - int n=0; - int ibit=0; - int ow; - int ival; - enum digitalTestMode arg; - - sprintf(mess,"Can't send digital test\n"); - - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - -#ifdef VERBOSE - printf("Digital test mode %d\n",arg ); -#endif - - switch (arg) { - case CHIP_TEST: - n = receiveDataOnly(file_des,&imod,sizeof(imod)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - retval=FAIL; - } -#ifdef VERBOSE - printf("of module %d\n", imod); -#endif - retval=0; - - break; - case MODULE_FIRMWARE_TEST: - retval=0x2; - break; - case DETECTOR_FIRMWARE_TEST: - retval=testFpga(); - break; - case DETECTOR_MEMORY_TEST: - ret=testRAM(); - break; - case DETECTOR_BUS_TEST: - retval=testBus(); - break; - case DETECTOR_SOFTWARE_TEST: - retval=testFpga(); - break; - case DIGITAL_BIT_TEST: - n = receiveDataOnly(file_des,&ival,sizeof(ival)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - retval=FAIL; - } -#ifdef VERBOSE - printf("with value %d\n", ival); -#endif - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - break; - } - digitalTestBit = ival; - retval=digitalTestBit; - break; - default: - printf("Unknown digital test required %d\n",arg); - ret=FAIL; - retval=FAIL; - break; - } - -#ifdef VERBOSE - printf("digital test result is 0x%x\n", retval); -#endif - //Always returns force update such that the dynamic range is always updated on the client - - // if (differentClients==1 && ret==OK) - ret=FORCE_UPDATE; - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; - -} - -int write_register(int file_des) { - - int retval; - int ret=OK; - int arg[2]; - int addr, val; - int n; - u_int32_t address; - - sprintf(mess,"Can't write to register\n"); - - n = receiveDataOnly(file_des,arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - addr=arg[0]; - val=arg[1]; - -#ifdef VERBOSE - printf("writing to register 0x%x data 0x%x\n", addr, val); -#endif - - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } - - - if(ret!=FAIL){ - address=(addr << MEM_MAP_SHIFT); - if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) - ret = bus_w16(address,val); - else - ret=bus_w(address,val); - if(ret==OK){ - if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) - retval=bus_r16(address); - else - retval=bus_r(address); - } - } - - -#ifdef VERBOSE - printf("Data set to 0x%x\n", retval); -#endif - if (retval==val) { - ret=OK; - if (differentClients) - ret=FORCE_UPDATE; - } else { - ret=FAIL; - sprintf(mess,"Writing to register 0x%x failed: wrote 0x%x but read 0x%x\n", addr, val, retval); - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; - -} - -int read_register(int file_des) { - - int retval; - int ret=OK; - int arg; - int addr; - int n; - u_int32_t address; - - sprintf(mess,"Can't read register\n"); - - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - addr=arg; - - - - //#ifdef VERBOSE - printf("reading register 0x%x\n", addr); - //#endif - - if(ret!=FAIL){ - address=(addr << MEM_MAP_SHIFT); - if((address==FIFO_DATA_REG_OFF)||(address==CONTROL_REG)) - retval=bus_r16(address); - else - retval=bus_r(address); - } - - - -#ifdef VERBOSE - printf("Returned value 0x%x\n", retval); -#endif - if (ret==FAIL) { - ret=FAIL; - printf("Reading register 0x%x failed\n", addr); - } else if (differentClients) - ret=FORCE_UPDATE; - - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; - -} - -int set_dac(int file_des) { - //default:all mods - int retval, retval1; - int ret=OK; - int arg[3]; - enum dacIndex ind; - int imod; - int n; - int val; - int mV=0; - int v; - sprintf(mess,"Can't set DAC\n"); - - n = receiveDataOnly(file_des,arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - ind=arg[0]; - - imod=arg[1]; - - mV=arg[2]; - - if (mV) - printf("DAC will be set in mV %d!\n",mV); - else - printf("DAC will be set in DACu! %d\n", mV); - - n = receiveDataOnly(file_des,&val,sizeof(val)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - //#ifdef VERBOSE - printf("Setting DAC %d of module %d to %d , mode %d\n", ind, imod, val, mV); - //#endif - - if (imod>=getNModBoard()) - ret=FAIL; - if (imod<0) - imod=ALLMOD; - - - - - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else{ - if (ind2500) - val=-1; - printf("%d mV is ",val); - if (val>0) - val=val/2500*4095; - printf("%d DACu\n", val); - } else { - v=val*2500/4095; - if (val>4095) { - val=-1; - } - } - - if (vLimitCompliant(v)) - retval=setDac(ind,val); // in DACu - - - } else { - switch (ind) { - case ADC_VPP: - - printf("Setting ADC VPP to %d\n",val); - if (val>4 || val<0) - printf("Cannot set ADC VPP to %d\n",val); - else { - writeADC(0x18,val); - adcvpp=val; - } - retval=adcvpp;; - break; - - case HV_NEW: - retval=initHighVoltage(val,imod);//ByModule - break; - - case V_POWER_A: - case V_POWER_B: - case V_POWER_C: - case V_POWER_D: - case V_POWER_IO: - case V_POWER_CHIP: - if (mV) { - if (vLimitCompliant(val)) - retval=setPower(ind,val); - else - printf("********power %d exceeds voltage limits", ind); - - } else - printf("********power %d should be set in mV instead od DACu", ind); - break; - - case V_LIMIT: - if (mV) { - retval=setPower(ind,val); - } else - printf("********power %d should be set in mV instead od DACu", ind); - break; - - default: - printf("**********No dac with index %d\n",ind); - printf("**********%d %d\n",N_DAC,N_PWR); - ret=FAIL; - } - - } - } - } - - - if(ret==OK){ - if (ind=getNModBoard() || imod<0) - ret=FAIL; - - //#ifdef MCB_FUNCS - switch (ind) { - case TEMPERATURE_FPGA: - idac=TEMP_FPGA; - break; - case TEMPERATURE_ADC: - idac=TEMP_ADC; - break; - - case V_POWER_D: - idac++; - case V_POWER_C: - idac++; - case V_POWER_B: - idac++; - case V_POWER_A: - idac++; - case V_POWER_IO: - idac+=100; - break; - - case I_POWER_D: - idac++; - case I_POWER_C: - idac++; - case I_POWER_B: - idac++; - case I_POWER_A: - idac++; - case I_POWER_IO: - idac+=200; - break; - - default: - // printf("Unknown DAC index %d\n",ind); - sprintf(mess,"Unknown DAC index %d\n",ind); - ret=FAIL; - break; - } - printf("DAC index %d (%d)\n",idac,ind); - - if (ret==OK) { - - - if (idac>=200) - retval=getCurrent(idac-200); - else if (idac>=100) - retval=getVoltage(idac-100); - else - retval=getTemperature(idac); - - - }else if (ind>=1000) { - retval=readSlowADC(ind-1000); - if (retval>=0) { - ret=OK; - } - - } - - - //#endif - -#ifdef VERBOSE - printf("ADC is %d V\n", retval); -#endif - if (ret==FAIL) { - printf("Getting adc %d of module %d failed\n", ind, imod); - } - - if (differentClients) - ret=FORCE_UPDATE; - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; - -} - -int set_channel(int file_des) { - int ret=OK; - sls_detector_channel myChan; - int retval; - int n; - - - sprintf(mess,"Can't set channel\n"); - -#ifdef VERBOSE - printf("Setting channel\n"); -#endif - ret=receiveChannel(file_des, &myChan); - if (ret>=0) - ret=OK; - else - ret=FAIL; -#ifdef VERBOSE - printf("channel number is %d, chip number is %d, module number is %d, register is %lld\n", myChan.chan,myChan.chip, myChan.module, myChan.reg); -#endif - - if (ret==OK) { - if (myChan.module>=getNModBoard()) - ret=FAIL; - if (myChan.chip>=N_CHIP) - ret=FAIL; - if (myChan.chan>=N_CHAN) - ret=FAIL; - if (myChan.module<0) - myChan.module=ALLMOD; - } - - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - - } - } - /* Maybe this is done inside the initialization funcs */ - //copyChannel(detectorChans[myChan.module][myChan.chip]+(myChan.chan), &myChan); - - - - if (differentClients==1 && ret==OK) - ret=FORCE_UPDATE; - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - - /*return ok/fail*/ - return ret; - -} - - - - -int get_channel(int file_des) { - - int ret=OK; - sls_detector_channel retval; - - int arg[3]; - int ichan, ichip, imod; - int n; - - sprintf(mess,"Can't get channel\n"); - - - - n = receiveDataOnly(file_des,arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - ichan=arg[0]; - ichip=arg[1]; - imod=arg[2]; - - if (ret==OK) { - ret=FAIL; - if (imod>=0 && imod=0 && ichip=0 && ichan=0) - ret=OK; - else - ret=FAIL; -#ifdef VERBOSE - printf("chip number is %d, module number is %d, register is %d, nchan %d\n",myChip.chip, myChip.module, myChip.reg, myChip.nchan); -#endif - - if (ret==OK) { - if (myChip.module>=getNModBoard()) - ret=FAIL; - if (myChip.module<0) - myChip.module=ALLMOD; - if (myChip.chip>=N_CHIP) - ret=FAIL; - } - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - ; - } - /* Maybe this is done inside the initialization funcs */ - //copyChip(detectorChips[myChip.module]+(myChip.chip), &myChip); - - if (differentClients && ret==OK) - ret=FORCE_UPDATE; - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - - return ret; -} - -int get_chip(int file_des) { - - - int ret=OK; - sls_detector_chip retval; - int arg[2]; - int ichip, imod; - int n; - - - - n = receiveDataOnly(file_des,arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - ichip=arg[0]; - imod=arg[1]; - if (ret==OK) { - ret=FAIL; - if (imod>=0 && imod=0 && ichip=0) - ret=OK; - else - ret=FAIL; - - -#ifdef VERBOSE - printf("module number is %d,register is %d, nchan %d, nchip %d, ndac %d, nadc %d, gain %f, offset %f\n",myModule.module, myModule.reg, myModule.nchan, myModule.nchip, myModule.ndac, myModule.nadc, myModule.gain,myModule.offset); -#endif - - if (ret==OK) { - if (myModule.module>=getNModBoard()) { - ret=FAIL; - printf("Module number is too large %d\n",myModule.module); - } - if (myModule.module<0) - myModule.module=ALLMOD; - } - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - } - } - - if (differentClients==1 && ret==OK) - ret=FORCE_UPDATE; - - /* Maybe this is done inside the initialization funcs */ - //copyChip(detectorChips[myChip.module]+(myChip.chip), &myChip); - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - free(myDac); - if(myAdc != NULL) free(myAdc); - if(myChip != NULL) free(myChip); - if(myChan != NULL) free(myChan); - - - //setDynamicRange(dr); always 16 commented out - - return ret; -} - - - - -int get_module(int file_des) { - - int ret=OK; - int arg; - int imod; - int n; - sls_detector_module myModule; - int *myDac=malloc(N_DAC*sizeof(int)); - int *myChip=NULL; - int *myChan=NULL; - int *myAdc=NULL; - - /*not required for jungfrau. so save memory*/ - if(myDetectorType != JUNGFRAU){ - myChip=malloc(N_CHIP*sizeof(int)); - myChan=malloc(N_CHIP*N_CHAN*sizeof(int)); - myAdc=malloc(N_ADC*sizeof(int)); - } - - - if (myDac) - myModule.dacs=myDac; - else { - sprintf(mess,"could not allocate dacs\n"); - ret=FAIL; - } - - - myModule.adcs=NULL; - myModule.chipregs=NULL; - myModule.chanregs=NULL; - /*not required for jungfrau. so save memory*/ - if(myDetectorType != JUNGFRAU){ - if (myAdc) - myModule.adcs=myAdc; - else { - sprintf(mess,"could not allocate adcs\n"); - ret=FAIL; - } - if (myChip) - myModule.chipregs=myChip; - else { - sprintf(mess,"could not allocate chips\n"); - ret=FAIL; - } - if (myChan) - myModule.chanregs=myChan; - else { - sprintf(mess,"could not allocate chans\n"); - ret=FAIL; - } - } - - myModule.ndac=N_DAC; - myModule.nchip=N_CHIP; - myModule.nchan=N_CHAN*N_CHIP; - myModule.nadc=N_ADC; - - - - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - imod=arg; - - if (ret==OK) { - ret=FAIL; - if (imod>=0 && imod-1) { - dataret=FAIL; - sprintf(mess,"no data and run stopped: %d frames left\n",(int)(getFrames()+2)); - printf("%s\n",mess); - } else { - dataret=FINISHED; - sprintf(mess,"acquisition successfully finished\n"); - printf("%s\n",mess); - if (differentClients) - dataret=FORCE_UPDATE; - } -#ifdef VERBOSE - printf("Frames left %d\n",(int)(getFrames())); -#endif - sendDataOnly(file_des,&dataret,sizeof(dataret)); - sendDataOnly(file_des,mess,sizeof(mess)); - } - - - - - return dataret; - -} - - - - - - - - -int read_all(int file_des) { - -while(read_frame(file_des)==OK) { - -#ifdef VERBOSE - printf("frame read\n"); -#endif - ; - } -#ifdef VERBOSE - printf("Frames finished\n"); -#endif - return OK; - - -} - -int start_and_read_all(int file_des) { - //int dataret=OK; -#ifdef VERBOSE - printf("Starting and reading all frames\n"); -#endif - - if (differentClients==1 && lockStatus==1) { - dataret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - sendDataOnly(file_des,&dataret,sizeof(dataret)); - sendDataOnly(file_des,mess,sizeof(mess)); - return dataret; - - } - - startStateMachine(); - - /* ret=startStateMachine(); - if (ret!=OK) { - sprintf(mess,"could not start state machine\n"); - sendDataOnly(file_des,&ret,sizeof(ret)); - sendDataOnly(file_des,mess,sizeof(mess)); - - #ifdef VERBOSE - printf("could not start state machine\n"); -#endif -} else {*/ - read_all(file_des); -#ifdef VERBOSE - printf("Frames finished\n"); -#endif - //} - - - return OK; - - -} - -int set_timer(int file_des) { - enum timerIndex ind; - int64_t tns; - int n; - int64_t retval; - int ret=OK; - - - sprintf(mess,"can't set timer\n"); - - n = receiveDataOnly(file_des,&ind,sizeof(ind)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - n = receiveDataOnly(file_des,&tns,sizeof(tns)); // total received data - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - if (ret!=OK) { - printf(mess); - } - -#ifdef VERBOSE - printf("setting timer %d to %lld ns\n",ind,tns); -#endif - if (ret==OK) { - - if (differentClients==1 && lockStatus==1 && tns!=-1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - switch(ind) { - case FRAME_NUMBER: - retval=setFrames(tns); - break; - case ACQUISITION_TIME: - retval=setExposureTime(tns); - break; - case FRAME_PERIOD: - retval=setPeriod(tns); - break; - case DELAY_AFTER_TRIGGER: - retval=setDelay(tns); - break; - case GATES_NUMBER: - retval=setGates(tns); - break; - case PROBES_NUMBER: - sprintf(mess,"can't set timer for moench\n"); - ret=FAIL; - break; - case CYCLES_NUMBER: - retval=setTrains(tns); - break; - case SAMPLES_JCTB: - retval=setSamples(tns); - break; - default: - ret=FAIL; - sprintf(mess,"timer index unknown %d\n",ind); - break; - } - } - } - if (ret!=OK) { - printf(mess); - if (differentClients) - ret=FORCE_UPDATE; - } - - if (ret!=OK) { - printf(mess); - printf("set timer failed\n"); - } else if (ind==FRAME_NUMBER) { - // ret=allocateRAM(); - // if (ret!=OK) - // sprintf(mess, "could not allocate RAM for %lld frames\n", tns); - } - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else { -#ifdef VERBOSE - printf("returning ok %d\n",(int)(sizeof(retval))); -#endif - - n = sendDataOnly(file_des,&retval,sizeof(retval)); - } - - return ret; - -} - - - - - - - - -int get_time_left(int file_des) { - - enum timerIndex ind; - int n; - int64_t retval; - int ret=OK; - - sprintf(mess,"can't get timer\n"); - n = receiveDataOnly(file_des,&ind,sizeof(ind)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - - //#ifdef VERBOSE - - printf("getting time left on timer %d \n",ind); - //#endif - - if (ret==OK) { - switch(ind) { - case FRAME_NUMBER: - printf("getting frames \n"); - retval=getFrames(); - break; - case ACQUISITION_TIME: - retval=getExposureTime(); - break; - case FRAME_PERIOD: - retval=getPeriod(); - break; - case DELAY_AFTER_TRIGGER: - retval=getDelay(); - break; - case GATES_NUMBER: - retval=getGates(); - break; - case PROBES_NUMBER: - retval=getProbes(); - break; - case CYCLES_NUMBER: - retval=getTrains(); - break; - case PROGRESS: - retval=getProgress(); - break; - case ACTUAL_TIME: - retval=getActualTime(); - break; - case MEASUREMENT_TIME: - retval=getMeasurementTime(); - break; - case FRAMES_FROM_START: - case FRAMES_FROM_START_PG: - retval=getFramesFromStart(); - break; - case SAMPLES_JCTB: - retval=setSamples(-1); - break; - default: - ret=FAIL; - sprintf(mess,"timer index unknown %d\n",ind); - break; - } - } - - - if (ret!=OK) { - printf("get time left failed\n"); - } else if (differentClients) - ret=FORCE_UPDATE; - - //#ifdef VERBOSE - - printf("time left on timer %d is %lld\n",ind, retval); - //#endif - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } else - n = sendDataOnly(file_des,&retval,sizeof(retval)); - -#ifdef VERBOSE - - printf("data sent\n"); -#endif - - return ret; - - -} - -int set_dynamic_range(int file_des) { - - - - int dr; - int n; - int retval; - int ret=OK; - - printf("Set dynamic range?\n"); - sprintf(mess,"can't set dynamic range\n"); - - - n = receiveDataOnly(file_des,&dr,sizeof(dr)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - - if (differentClients==1 && lockStatus==1 && dr>=0) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - retval=setDynamicRange(dr); - } - - //if (dr>=0 && retval!=dr) ret=FAIL; - if (ret!=OK) { - sprintf(mess,"set dynamic range failed\n"); - } else { - /* ret=allocateRAM(); */ -/* if (ret!=OK) */ -/* sprintf(mess,"Could not allocate RAM for the dynamic range selected\n"); */ -// else - if (differentClients) - ret=FORCE_UPDATE; - } - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else { - n = sendDataOnly(file_des,&retval,sizeof(retval)); - } - return ret; -} - -int set_roi(int file_des) { - - int i; - int ret=OK; - int nroi=-1; - int n=0; - int retvalsize=0; - ROI arg[MAX_ROIS]; - int retval; - strcpy(mess,"Could not set/get roi\n"); - // u_int32_t disable_reg=0; - - n = receiveDataOnly(file_des,&nroi,sizeof(nroi)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - - if(nroi>=0){ - n = receiveDataOnly(file_des,arg,nroi*sizeof(ROI)); - if (n != (nroi*sizeof(ROI))) { - sprintf(mess,"Received wrong number of bytes for ROI\n"); - ret=FAIL; - } - - printf("Setting ROI to:"); - for( i=0;i=0){//necessary??? - sprintf(mess,"Detector locked by %s\n", lastClientIP); - ret=FAIL; - } else{ - retval=setROI(nroi,arg,&retvalsize,&ret); - if (ret==FAIL){ - printf("mess:%s\n",mess); - sprintf(mess,"Could not set all roi, should have set %d rois, but only set %d rois\n",nroi,retvalsize); - } - } - - if(ret==OK && differentClients){ - printf("Force update\n"); - ret=FORCE_UPDATE; - } - - /* send answer */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if(ret==FAIL) - n = sendDataOnly(file_des,mess,sizeof(mess)); - else{ - sendDataOnly(file_des,&retvalsize,sizeof(retvalsize)); - sendDataOnly(file_des,arg,retvalsize*sizeof(ROI)); - } - /*return ok/fail*/ - return ret; -} - -int get_roi(int file_des) { - - - return FAIL; -} - -int set_speed(int file_des) { - - enum speedVariable arg; - int val,n; - int ret=OK; - int retval; - - n=receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - n=receiveDataOnly(file_des,&val,sizeof(val)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - - - if (ret==OK) { - - /* if (arg==PHASE_SHIFT || arg==ADC_PHASE) { */ - - - /* retval=phaseStep(val); */ - - /* } else if ( arg==DBIT_PHASE) { */ - /* retval=dbitPhaseStep(val); */ - /* } else { */ - - - /* if (val!=-1) { */ - - - if (differentClients==1 && lockStatus==1 && val>=0) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - switch (arg) { - case PHASE_SHIFT: - case ADC_PHASE: - if (val==-1) - retval=getPhase(run_clk_c); - else - retval=configurePhase(val,run_clk_c); - break; - - case DBIT_PHASE: - if (val==-1) - retval=getPhase(dbit_clk_c); - else - retval=configurePhase(val,dbit_clk_c); - break; - - case CLOCK_DIVIDER: - retval=configureFrequency(val,run_clk_c);//setClockDivider(val,0); - if (configureFrequency(-1,sync_clk_c)>retval) { - configureFrequency(retval,sync_clk_c); - printf("--Configuring sync clk to %d MHz\n",val); - } else if (configureFrequency(-1,dbit_clk_c)>val && configureFrequency(-1,adc_clk_c)>retval) { - printf("++Configuring sync clk to %d MHz\n",val); - configureFrequency(retval,sync_clk_c); - } - break; - -/* case PHASE_SHIFT: */ -/* retval=phaseStep(val,0); */ -/* break; */ - - case OVERSAMPLING: - retval=setOversampling(val); - break; - - case ADC_CLOCK: - retval=configureFrequency(val,adc_clk_c);//setClockDivider(val,1); - if (configureFrequency(-1,sync_clk_c)>val) { - configureFrequency(retval,sync_clk_c); - printf("--Configuring sync clk to %d MHz\n",val); - } else if (configureFrequency(-1,dbit_clk_c)>val && configureFrequency(-1,run_clk_c)>retval) { - printf("++Configuring sync clk to %d MHz\n",val); - configureFrequency(retval,sync_clk_c); - } - break; - - case DBIT_CLOCK: - retval=configureFrequency(val,dbit_clk_c);//setClockDivider(val,2); - if (configureFrequency(-1,sync_clk_c)>retval){ - configureFrequency(retval,sync_clk_c); - printf("--Configuring sync clk to %d MHz\n",val); - } else if (configureFrequency(-1,adc_clk_c)>retval && configureFrequency(-1,run_clk_c)>retval) { - printf("++Configuring sync clk to %d MHz\n",val); - configureFrequency(retval,sync_clk_c); - } - - break; - - - - case ADC_PIPELINE: - retval=adcPipeline(val); - break; - - - case DBIT_PIPELINE: - retval=dbitPipeline(val); - break; - - default: - ret=FAIL; - sprintf(mess,"Unknown speed parameter %d",arg); - } - } - // } - - - } - - - - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else { - n = sendDataOnly(file_des,&retval,sizeof(retval)); - } - return ret; -} - - - -int set_readout_flags(int file_des) { - - enum readOutFlags arg; - int ret=OK; - enum readOutFlags v=-1; - - receiveDataOnly(file_des,&arg,sizeof(arg)); - - switch (arg) { - case NORMAL_READOUT: - case DIGITAL_ONLY: - case ANALOG_AND_DIGITAL: - case GET_READOUT_FLAGS: - break; - default: - sprintf(mess,"unknown readout flags for jctb\n"); - ret=FAIL; - } - if (ret==OK) - v=setReadOutMode(arg); - - if (v<0) { - ret=FAIL; - sprintf(mess,"found non valid readout mode (neither analog nor digital)\n"); - } - sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==OK) - sendDataOnly(file_des,&v,sizeof(v)); - else - sendDataOnly(file_des,mess,sizeof(mess)); - // sendDataOnly(file_des,mess,sizeof(mess)); - - return ret; -} - - - - - -int execute_trimming(int file_des) { - - int arg[3]; - int ret=FAIL; - enum trimMode mode; - - sprintf(mess,"can't set execute trimming for moench\n"); - - receiveDataOnly(file_des,&mode,sizeof(mode)); - receiveDataOnly(file_des,arg,sizeof(arg)); - - - sendDataOnly(file_des,&ret,sizeof(ret)); - sendDataOnly(file_des,mess,sizeof(mess)); - - return ret; -} - - -int lock_server(int file_des) { - - - int n; - int ret=OK; - - int lock; - n = receiveDataOnly(file_des,&lock,sizeof(lock)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - printf("Error reading from socket (lock)\n"); - ret=FAIL; - } - if (lock>=0) { - if (lockStatus==0 || strcmp(lastClientIP,thisClientIP)==0 || strcmp(lastClientIP,"none")==0) - lockStatus=lock; - else { - ret=FAIL; - sprintf(mess,"Server already locked by %s\n", lastClientIP); - } - } - if (differentClients && ret==OK) - ret=FORCE_UPDATE; - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else - n = sendDataOnly(file_des,&lockStatus,sizeof(lockStatus)); - - return ret; - -} - -int set_port(int file_des) { - int n; - int ret=OK; - int sd=-1; - - enum portType p_type; /** data? control? stop? Unused! */ - int p_number; /** new port number */ - - n = receiveDataOnly(file_des,&p_type,sizeof(p_type)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - printf("Error reading from socket (ptype)\n"); - ret=FAIL; - } - - n = receiveDataOnly(file_des,&p_number,sizeof(p_number)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - printf("Error reading from socket (pnum)\n"); - ret=FAIL; - } - if (differentClients==1 && lockStatus==1 ) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - if (p_number<1024) { - sprintf(mess,"Too low port number %d\n", p_number); - printf("\n"); - ret=FAIL; - } - - printf("set port %d to %d\n",p_type, p_number); - - sd=bindSocket(p_number); - } - if (sd>=0) { - ret=OK; - if (differentClients ) - ret=FORCE_UPDATE; - } else { - ret=FAIL; - sprintf(mess,"Could not bind port %d\n", p_number); - printf("Could not bind port %d\n", p_number); - if (sd==-10) { - sprintf(mess,"Port %d already set\n", p_number); - printf("Port %d already set\n", p_number); - - } - } - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else { - n = sendDataOnly(file_des,&p_number,sizeof(p_number)); - closeConnection(file_des); - exitServer(sockfd); - sockfd=sd; - - } - - return ret; - -} - -int get_last_client_ip(int file_des) { - int ret=OK; - int n; - if (differentClients ) - ret=FORCE_UPDATE; - n = sendDataOnly(file_des,&ret,sizeof(ret)); - n = sendDataOnly(file_des,lastClientIP,sizeof(lastClientIP)); - - return ret; - -} - - -int send_update(int file_des) { - - int ret=OK; - enum detectorSettings t; - int n;//int thr, n; - //int it; - int64_t retval, tns=-1; - enum readOutFlags v=-1; - n = sendDataOnly(file_des,lastClientIP,sizeof(lastClientIP)); - n = sendDataOnly(file_des,&nModX,sizeof(nModX)); - n = sendDataOnly(file_des,&nModY,sizeof(nModY)); - n = sendDataOnly(file_des,&dynamicRange,sizeof(dynamicRange)); - n = sendDataOnly(file_des,&dataBytes,sizeof(dataBytes)); - t=GET_SETTINGS;//setSettings(GET_SETTINGS,-1); - n = sendDataOnly(file_des,&t,sizeof(t)); -/* thr=getThresholdEnergy(); - n = sendDataOnly(file_des,&thr,sizeof(thr));*/ - retval=setFrames(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); - retval=setExposureTime(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); - retval=setPeriod(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); - retval=setDelay(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); - retval=setGates(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); -/* retval=setProbes(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t));*/ - retval=setTrains(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); - retval=setSamples(tns); - n = sendDataOnly(file_des,&retval,sizeof(int64_t)); - - v=setReadOutMode(-1); - sendDataOnly(file_des,&v,sizeof(v)); - - if (lockStatus==0) { - strcpy(lastClientIP,thisClientIP); - } - - return ret; - - -} -int update_client(int file_des) { - - int ret=OK; - - sendDataOnly(file_des,&ret,sizeof(ret)); - return send_update(file_des); - - - -} - - -int configure_mac(int file_des) { - - int ret=OK; - char arg[5][50]; - int n; - - int imod=0;//should be in future sent from client as -1, arg[2] - int ipad; - long long int imacadd; - long long int idetectormacadd; - int udpport; - int detipad; - int retval=-100; - - sprintf(mess,"Can't configure MAC\n"); - - - n = receiveDataOnly(file_des,arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - sscanf(arg[0], "%x", &ipad); - sscanf(arg[1], "%llx", &imacadd); - sscanf(arg[2], "%x", &udpport); - sscanf(arg[3], "%llx", &idetectormacadd); - sscanf(arg[4], "%x", &detipad); - - //#ifdef VERBOSE - int i; - printf("\ndigital_test_bit in server %d\t",digitalTestBit); - printf("\nipadd %x\t",ipad); - printf("destination ip is %d.%d.%d.%d = 0x%x \n",(ipad>>24)&0xff,(ipad>>16)&0xff,(ipad>>8)&0xff,(ipad)&0xff,ipad); - printf("macad:%llx\n",imacadd); - for (i=0;i<6;i++) - printf("mac adress %d is 0x%x \n",6-i,(unsigned int)(((imacadd>>(8*i))&0xFF))); - printf("udp port:0x%x\n",udpport); - printf("detector macad:%llx\n",idetectormacadd); - for (i=0;i<6;i++) - printf("detector mac adress %d is 0x%x \n",6-i,(unsigned int)(((idetectormacadd>>(8*i))&0xFF))); - printf("detipad %x\n",detipad); - printf("\n"); - //#endif - - - - if (imod>=getNModBoard()) - ret=FAIL; - if (imod<0) - imod=ALLMOD; - - //#ifdef VERBOSE - printf("Configuring MAC of module %d at port %x\n", imod, udpport); - //#endif - //#ifdef MCB_FUNCS - if (ret==OK){ - if(runBusy()){ - ret=stopStateMachine(); - if(ret==FAIL) - strcpy(mess,"could not stop detector acquisition to configure mac"); - } - - if(ret==OK) - configureMAC(ipad,imacadd,idetectormacadd,detipad,digitalTestBit,udpport); - retval=getAdcConfigured(); - } - //#endif - if (ret==FAIL) - printf("configuring MAC of mod %d failed\n", imod); - else - printf("Configuremac successful of mod %d and adc %d\n",imod,retval); - - if (differentClients) - ret=FORCE_UPDATE; - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else - n += sendDataOnly(file_des,&retval,sizeof(retval)); - /*return ok/fail*/ - return ret; - -} - - - -int load_image(int file_des) { - int retval; - int ret=OK; - int n; - enum imageType index; - short int ImageVals[N_CHAN*N_CHIP]; - - sprintf(mess,"Loading image failed\n"); - - n = receiveDataOnly(file_des,&index,sizeof(index)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - n = receiveDataOnly(file_des,ImageVals,dataBytes); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - switch (index) { - case DARK_IMAGE : -#ifdef VERBOSE - printf("Loading Dark image\n"); -#endif - break; - case GAIN_IMAGE : -#ifdef VERBOSE - printf("Loading Gain image\n"); -#endif - break; - default: - printf("Unknown index %d\n",index); - sprintf(mess,"Unknown index %d\n",index); - ret=FAIL; - break; - } - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else{ - retval=loadImage(index,ImageVals); - if (retval==-1) - ret = FAIL; - } - } - - if(ret==OK){ - if (differentClients) - ret=FORCE_UPDATE; - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; -} - - - -int set_master(int file_des) { - - enum masterFlags retval=GET_MASTER; - enum masterFlags arg; - int n; - int ret=OK; - // int regret=OK; - - - sprintf(mess,"can't set master flags\n"); - - - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - -#ifdef VERBOSE - printf("setting master flags to %d\n",arg); -#endif - - if (differentClients==1 && lockStatus==1 && arg!=GET_READOUT_FLAGS) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - retval=setMaster(arg); - - } - if (retval==GET_MASTER) { - ret=FAIL; - } - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else { - n = sendDataOnly(file_des,&retval,sizeof(retval)); - } - return ret; -} - - - - - - -int set_synchronization(int file_des) { - - enum synchronizationMode retval=GET_MASTER; - enum synchronizationMode arg; - int n; - int ret=OK; - //int regret=OK; - - - sprintf(mess,"can't set synchronization mode\n"); - - - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } -#ifdef VERBOSE - printf("setting master flags to %d\n",arg); -#endif - - if (differentClients==1 && lockStatus==1 && arg!=GET_READOUT_FLAGS) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - //ret=setStoreInRAM(0); - // initChipWithProbes(0,0,0, ALLMOD); - retval=setSynchronization(arg); - } - if (retval==GET_SYNCHRONIZATION_MODE) { - ret=FAIL; - } - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n = sendDataOnly(file_des,mess,sizeof(mess)); - } else { - n = sendDataOnly(file_des,&retval,sizeof(retval)); - } - return ret; -} - - - - - - -int read_counter_block(int file_des) { - - int ret=OK; - int n; - int startACQ; - //char *retval=NULL; - short int CounterVals[N_CHAN*N_CHIP]; - - sprintf(mess,"Read counter block failed\n"); - - n = receiveDataOnly(file_des,&startACQ,sizeof(startACQ)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else{ - ret=readCounterBlock(startACQ,CounterVals); -#ifdef VERBOSE - int i; - for(i=0;i<6;i++) - printf("%d:%d\t",i,CounterVals[i]); -#endif - } - } - - if(ret!=FAIL){ - if (differentClients) - ret=FORCE_UPDATE; - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,CounterVals,dataBytes);//1280*2 - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; -} - - - - - -int reset_counter_block(int file_des) { - - int ret=OK; - int n; - int startACQ; - - sprintf(mess,"Reset counter block failed\n"); - - n = receiveDataOnly(file_des,&startACQ,sizeof(startACQ)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else - ret=resetCounterBlock(startACQ); - } - - if(ret==OK){ - if (differentClients) - ret=FORCE_UPDATE; - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - - /*return ok/fail*/ - return ret; -} - - - -int calibrate_pedestal(int file_des){ - - int ret=OK; - int retval=-1; - int n; - int frames; - - sprintf(mess,"Could not calibrate pedestal\n"); - - n = receiveDataOnly(file_des,&frames,sizeof(frames)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - if (ret==OK) { - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else - ret=calibratePedestal(frames); - } - - if(ret==OK){ - if (differentClients) - ret=FORCE_UPDATE; - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else - n += sendDataOnly(file_des,&retval,sizeof(retval)); - - /*return ok/fail*/ - return ret; -} - - -int set_ctb_pattern(int file_des){ - - int ret=OK;//FAIL; - int retval=-1; - int n; - int mode; - uint64_t word, retval64, t; - int addr; - int level, start, stop, nl; - uint64_t pat[1024]; - - sprintf(mess,"Could not set pattern\n"); - - n = receiveDataOnly(file_des,&mode,sizeof(mode)); - printf("pattern mode is %d\n",mode); - switch (mode) { - - case 0: //sets word - n = receiveDataOnly(file_des,&addr,sizeof(addr)); - n = receiveDataOnly(file_des,&word,sizeof(word)); - ret=OK; - - printf("pattern addr is %d %x\n",addr, word); - switch (addr) { - case -1: - retval64=writePatternIOControl(word); - break; - case -2: - retval64=writePatternClkControl(word); - break; - default: - retval64=writePatternWord(addr,word); - }; - - - //write word; - //@param addr address of the word, -1 is I/O control register, -2 is clk control register - //@param word 64bit word to be written, -1 gets - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else - n += sendDataOnly(file_des,&retval64,sizeof(retval64)); - break; - - case 1: //pattern loop - // printf("loop\n"); - n = receiveDataOnly(file_des,&level,sizeof(level)); - n = receiveDataOnly(file_des,&start,sizeof(start)); - n = receiveDataOnly(file_des,&stop,sizeof(stop)); - n = receiveDataOnly(file_des,&nl,sizeof(nl)); - - - - // printf("level %d start %x stop %x nl %d\n",level, start, stop, nl); - /** Sets the pattern or loop limits in the CTB - @param level -1 complete pattern, 0,1,2, loop level - @param start start address if >=0 - @param stop stop address if >=0 - @param n number of loops (if level >=0) - @returns OK/FAIL - */ - ret=setPatternLoop(level, &start, &stop, &nl); - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else { - n += sendDataOnly(file_des,&start,sizeof(start)); - n += sendDataOnly(file_des,&stop,sizeof(stop)); - n += sendDataOnly(file_des,&nl,sizeof(nl)); - } - break; - - - - case 2: //wait address - printf("wait\n"); - n = receiveDataOnly(file_des,&level,sizeof(level)); - n = receiveDataOnly(file_des,&addr,sizeof(addr)); - - - - /** Sets the wait address in the CTB - @param level 0,1,2, wait level - @param addr wait address, -1 gets - @returns actual value - */ - printf("wait addr %d %x\n",level, addr); - retval=setPatternWaitAddress(level,addr); - printf("ret: wait addr %d %x\n",level, retval); - ret=OK; - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else { - n += sendDataOnly(file_des,&retval,sizeof(retval)); - - } - - - break; - - - case 3: //wait time - printf("wait time\n"); - n = receiveDataOnly(file_des,&level,sizeof(level)); - n = receiveDataOnly(file_des,&t,sizeof(t)); - - - /** Sets the wait time in the CTB - @param level 0,1,2, wait level - @param t wait time, -1 gets - @returns actual value - */ - - ret=OK; - - retval64=setPatternWaitTime(level,t); - - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else - n += sendDataOnly(file_des,&retval64,sizeof(retval64)); - - break; - - - - case 4: - n = receiveDataOnly(file_des,pat,sizeof(pat)); - for (addr=0; addr<1024; addr++) - writePatternWord(addr,word); - ret=OK; - retval=0; - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - else - n += sendDataOnly(file_des,&retval64,sizeof(retval64)); - - break; - - - - - - default: - ret=FAIL; - printf(mess); - sprintf(mess,"%s - wrong mode %d\n",mess, mode); - n = sendDataOnly(file_des,&ret,sizeof(ret)); - n += sendDataOnly(file_des,mess,sizeof(mess)); - - - - } - - - /*return ok/fail*/ - return ret; -} - - -int write_adc_register(int file_des) { - - int retval; - int ret=OK; - int arg[2]; - int addr, val; - int n; - - sprintf(mess,"Can't write to register\n"); - - n = receiveDataOnly(file_des,arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - addr=arg[0]; - val=arg[1]; - -#ifdef VERBOSE - printf("writing to register 0x%x data 0x%x\n", addr, val); -#endif - - if (differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } - - - if(ret!=FAIL){ - ret=writeADC(addr,val); - if (ret==OK) - retval=val; - } - - -#ifdef VERBOSE - printf("Data set to 0x%x\n", retval); -#endif - if (retval==val) { - ret=OK; - if (differentClients) - ret=FORCE_UPDATE; - } else { - ret=FAIL; - sprintf(mess,"Writing to register 0x%x failed: wrote 0x%x but read 0x%x\n", addr, val, retval); - } - - /* send answer */ - /* send OK/failed */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret!=FAIL) { - /* send return argument */ - n += sendDataOnly(file_des,&retval,sizeof(retval)); - } else { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - - /*return ok/fail*/ - return ret; - -} - -int power_chip(int file_des) { - - int retval=-1; - int ret=OK; - int arg=-1; - int n; - - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - -#ifdef VERBOSE - printf("Power chip to %d\n", arg); -#endif - - if (differentClients==1 && lockStatus==1 && arg!=-1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - } else { - retval=powerChip(arg); -#ifdef VERBOSE - printf("Chip powered: %d\n",retval); -#endif - - if (retval==arg || arg<0) { - ret=OK; - } else { - ret=FAIL; - printf("Powering chip failed, wrote %d but read %d\n", arg, retval); - } - - } - if (ret==OK && differentClients==1) - ret=FORCE_UPDATE; - - /* send answer */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } else - n += sendDataOnly(file_des,&retval,sizeof(retval)); - - return ret; -} - - -int reset_fpga(int file_des) { - int ret=OK; - int n; - sprintf(mess,"Reset FPGA unsuccessful\n"); - - resetFPGA(); - initializeDetector(); - - ret = FORCE_UPDATE; - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - - /*return ok/fail*/ - return ret; -} - - -int program_fpga(int file_des) { - int ret=OK; - int n; - sprintf(mess,"Program FPGA unsuccessful\n"); - char* fpgasrc = NULL; - FILE* fp = NULL; - size_t filesize = 0; - size_t unitprogramsize = 0; - size_t totalsize = 0; - - - //filesize - n = receiveDataOnly(file_des,&filesize,sizeof(filesize)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - totalsize = filesize; -#ifdef VERY_VERBOSE - printf("\n\n Total size is:%d\n",totalsize); -#endif - - //lock - if (ret==OK && differentClients==1 && lockStatus==1) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - filesize = 0; - } - - //opening file pointer to flash and telling FPGA to not touch flash - if(ret == OK && startWritingFPGAprogram(&fp) != OK){ - sprintf(mess,"Could not write to flash. Error at startup.\n"); - cprintf(RED,"%s",mess); - ret=FAIL; - filesize = 0; - } - - //---------------- first ret ---------------- - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - //---------------- first ret ---------------- - - - //erasing flash - if(ret != FAIL){ - eraseFlash(); - fpgasrc = (char*)malloc(MAX_FPGAPROGRAMSIZE); - } - - - - //writing to flash part by part - while(ret != FAIL && filesize){ - - unitprogramsize = MAX_FPGAPROGRAMSIZE; //2mb - if(unitprogramsize > filesize) //less than 2mb - unitprogramsize = filesize; -#ifdef VERY_VERBOSE - printf("unit size to receive is:%d\n",unitprogramsize); - printf("filesize:%d currentpointer:%d\n",filesize,currentPointer); -#endif - - - //receive - n = receiveDataOnly(file_des,fpgasrc,unitprogramsize); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - - if (ret==OK) { - if(!(unitprogramsize - filesize)){ - fpgasrc[unitprogramsize]='\0'; - filesize-=unitprogramsize; - unitprogramsize++; - }else - filesize-=unitprogramsize; - - ret = writeFPGAProgram(fpgasrc,unitprogramsize,fp); - } - - - //---------------- middle rets ---------------- - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n += sendDataOnly(file_des,mess,sizeof(mess)); - cprintf(RED,"Failure: Breaking out of program receiving\n"); - } - //---------------- middle rets ---------------- - - - if(ret != FAIL){ - //print progress - printf("Writing to Flash:%d%%\r",(int) (((double)(totalsize-filesize)/totalsize)*100) ); - fflush(stdout); - } - - } - - - - printf("\n"); - - //closing file pointer to flash and informing FPGA - if(stopWritingFPGAprogram(fp) == FAIL){ - sprintf(mess,"Could not write to flash. Error at end.\n"); - cprintf(RED,"%s",mess); - ret=FAIL; - } - - if(ret!=FAIL){ - ret=FORCE_UPDATE; - } - - - //---------------- last ret ---------------- - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) - n += sendDataOnly(file_des,mess,sizeof(mess)); - //---------------- last ret ---------------- - - - //free resources - if(fpgasrc != NULL) - free(fpgasrc); - if(fp!=NULL) - fclose(fp); -#ifdef VERY_VERBOSE - printf("Done with program receiving command\n"); -#endif - /*return ok/fail*/ - return ret; -} - - -int activate(int file_des) { - - int retval=-1; - int ret=OK; - int arg=-1; - int n; - - sprintf(mess,"Can't activate detector\n"); - n = receiveDataOnly(file_des,&arg,sizeof(arg)); - if (n < 0) { - sprintf(mess,"Error reading from socket\n"); - ret=FAIL; - } - - if (ret==OK && differentClients==1) - ret=FORCE_UPDATE; - retval=arg; - /* send answer */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } else - n += sendDataOnly(file_des,&retval,sizeof(retval)); - - return ret; -} - -int prepare_acquisition(int file_des) { - int ret = OK; - int n=0; - strcpy(mess,"prepare acquisition failed\n"); - - - ret = FAIL; - strcpy(mess,"Not implemented for this detector\n"); - cprintf(RED, "Warning: %s", mess); - /* - //lock - if (ret==OK && differentClients && lockStatus) { - ret=FAIL; - sprintf(mess,"Detector locked by %s\n",lastClientIP); - cprintf(RED, "Warning: %s", mess); - } - else { - ret = startReceiver(1); - if (ret == FAIL) - cprintf(RED, "Warning: %s", mess); - } -*/ - - if(ret==OK && differentClients) - ret=FORCE_UPDATE; - - /* send answer */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - return ret; -} - -int cleanup_acquisition(int file_des) { - int ret = OK; - int n=0; - - - //to receive any arguments - while (n > 0) - n = receiveDataOnly(file_des,mess,MAX_STR_LENGTH); - - ret = FAIL; - strcpy(mess,"Not implemented for this detector\n"); - cprintf(RED, "Warning: %s", mess); - /* - if (lockStatus && differentClients){//necessary??? - sprintf(mess,"Detector locked by %s\n", lastClientIP); - cprintf(RED, "Warning: %s", mess); - ret=FAIL; - } - else { - ret=startReceiver(0); - if (ret == FAIL) - cprintf(RED, "Warning: %s", mess); - } - */ - if(ret==OK && differentClients) - ret=FORCE_UPDATE; - - /* send answer */ - n = sendDataOnly(file_des,&ret,sizeof(ret)); - if (ret==FAIL) { - n += sendDataOnly(file_des,mess,sizeof(mess)); - } - return ret; -} diff --git a/slsDetectorServers/jctbDetectorServer/server_funcs.h b/slsDetectorServers/jctbDetectorServer/server_funcs.h deleted file mode 100755 index 40da3b75a..000000000 --- a/slsDetectorServers/jctbDetectorServer/server_funcs.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef SERVER_FUNCS_H -#define SERVER_FUNCS_H - - -#include "sls_detector_defs.h" - - -#include -/* -#include -#include -#include -*/ -#include "communication_funcs.h" - - - - -#define GOODBYE -200 - -int sockfd; - -int function_table(); - -int decode_function(int); -const char* getFunctionName(enum detFuncs func); -int init_detector(int,int); - -int M_nofunc(int); -int exit_server(int); - - - - -// General purpose functions -int get_detector_type(int); -int set_number_of_modules(int); -int get_max_number_of_modules(int); - - -int exec_command(int); -int set_external_signal_flag(int); -int set_external_communication_mode(int); -int get_id(int); -int digital_test(int); -int write_register(int); -int read_register(int); -int set_dac(int); -int get_adc(int); -int set_channel(int); -int set_chip(int); -int set_module(int); -int get_channel(int); -int get_chip(int); -int get_module(int); - -int get_threshold_energy(int); -int set_threshold_energy(int); -int set_settings(int); -int start_acquisition(int); -int stop_acquisition(int); -int start_readout(int); -int get_run_status(int); -int read_frame(int); -int read_all(int); -int start_and_read_all(int); -int set_timer(int); -int get_time_left(int); -int set_dynamic_range(int); -int set_roi(int); -int get_roi(int); -int set_speed(int); -int set_readout_flags(int); -int execute_trimming(int); -int lock_server(int); -int set_port(int); -int get_last_client_ip(int); -int set_master(int); -int set_synchronization(int); - -int update_client(int); -int send_update(int); -int configure_mac(int); - -int load_image(int); -int read_counter_block(int); -int reset_counter_block(int); - -int calibrate_pedestal(int); - -int set_roi(int); -int set_ctb_pattern(int); - -int write_adc_register(int); -int power_chip(int); -int reset_fpga(int); -int program_fpga(int); - -int activate(int); -int prepare_acquisition(int); -int cleanup_acquisition(int); -#endif diff --git a/slsDetectorServers/jctbDetectorServer/sharedmemory.c b/slsDetectorServers/jctbDetectorServer/sharedmemory.c deleted file mode 100755 index 4504cfe05..000000000 --- a/slsDetectorServers/jctbDetectorServer/sharedmemory.c +++ /dev/null @@ -1,39 +0,0 @@ -#include "sharedmemory.h" - -struct statusdata *stdata; - -int inism(int clsv) { - -static int scansmid; - - if (clsv==SMSV) { - if ( (scansmid=shmget(SMKEY,1024,IPC_CREAT | 0666 ))==-1 ) { - return -1; - } - if ( (stdata=shmat(scansmid,NULL,0))==(void*)-1) { - return -2; - } - } - - if (clsv==SMCL) { - if ( (scansmid=shmget(SMKEY,0,0) )==-1 ) { - return -3; - } - if ( (stdata=shmat(scansmid,NULL,0))==(void*)-1) { - return -4; - } - } - return 1; -} - -void write_status_sm(char *status) { - strcpy(stdata->status,status); -} - -void write_stop_sm(int v) { - stdata->stop=v; -} - -void write_runnumber_sm(int v) { - stdata->runnumber=v; -} diff --git a/slsDetectorServers/jctbDetectorServer/sharedmemory.h b/slsDetectorServers/jctbDetectorServer/sharedmemory.h deleted file mode 100755 index bdbddf719..000000000 --- a/slsDetectorServers/jctbDetectorServer/sharedmemory.h +++ /dev/null @@ -1,48 +0,0 @@ -#ifndef SM -#define SM - -#include "sls_detector_defs.h" - -#include -#include -#include -#include -#include -#include -#include -//#include -#include -#include -#include -#include -#include -#include - - -#include - -#include -#include - -/* key for shared memory */ -#define SMKEY 10001 - -#define SMSV 1 -#define SMCL 2 - - -struct statusdata { - int runnumber; - int stop; - char status[20]; -} ; - - -/* for shared memory */ - -int inism(int clsv); -void write_status_sm(char *status); -void write_stop_sm(int v); -void write_runnumber_sm(int v); - -#endif diff --git a/slsDetectorServers/jctbDetectorServer/slow_adc.c b/slsDetectorServers/jctbDetectorServer/slow_adc.c deleted file mode 100644 index 6f1b764b0..000000000 --- a/slsDetectorServers/jctbDetectorServer/slow_adc.c +++ /dev/null @@ -1,245 +0,0 @@ -#include "firmware_funcs.h" -#include "registers_m.h" -#include "server_defs.h" -#include "blackfin.h" - -int prepareSlowADCSeq() { - - // u_int16_t vv=0x3c40; - u_int16_t codata=( 1<<13) | (7<<10) | (7<<7) | (1<<6) | (0<<3) | (2<<1) | 1; - - u_int32_t valw; - int obit, ibit; - - // int cnv_bit=16, sdi_bit=17, sck_bit=18; - int cnv_bit=10, sdi_bit=8, sck_bit=9; - - // int oval=0; - - - printf("Codata is %04x\n",codata); - - /* //convert */ - valw=(1<> (13-ibit)) & 1); - // printf("%d",obit); - valw = obit << sdi_bit; - - bus_w(ADC_WRITE_REG,valw); - - usleep(20); - - bus_w(ADC_WRITE_REG,valw|(1<> (13-ibit)) & 1); - // printf("%d",obit); - valw = obit << sdi_bit; - - bus_w(ADC_WRITE_REG,valw); - - usleep(20); - - bus_w(ADC_WRITE_REG,valw|(1<7) - return -1; - - - prepareSlowADC(ichan); - - - /* printf("Codata is %04x\n",codata); */ - - /* /\* //convert *\/ */ - /* valw=(1<> (13-ibit)) & 1); */ - /* // printf("%d",obit); */ - /* valw = obit << sdi_bit; */ - - /* bus_w(ADC_WRITE_REG,valw); */ - - /* usleep(20); */ - - /* bus_w(ADC_WRITE_REG,valw|(1<> CHIP_POWER_STATUS_OFST); -} - - - -int autoCompDisable(int on) { - if(on != -1){ - if(on){ - FILE_LOG(logINFO, ("Auto comp disable mode: on\n")); - bus_w(VREF_COMP_MOD_REG, bus_r(VREF_COMP_MOD_REG) | VREF_COMP_MOD_ENABLE_MSK); - } - else{ - FILE_LOG(logINFO, ("Auto comp disable mode: off\n")); - bus_w(VREF_COMP_MOD_REG, bus_r(VREF_COMP_MOD_REG) & ~VREF_COMP_MOD_ENABLE_MSK); - } - } - - return (bus_r(VREF_COMP_MOD_REG) & VREF_COMP_MOD_ENABLE_MSK); -} - void cleanFifos() { #ifdef VIRTUAL @@ -524,33 +492,6 @@ void resetPeripheral() { bus_w(CONTROL_REG, bus_r(CONTROL_REG) & ~CONTROL_PERIPHERAL_RST_MSK); } -int adcPhase(int st){ /**carlos needed clkphase 1 and 2? cehck with Aldo */ - FILE_LOG(logINFO, ("Setting ADC Phase to %d\n", st)); - if (st > 65535 || st < -65535) - return clkPhase[0]; - - clkPhase[1] = st - clkPhase[0]; - if (clkPhase[1] == 0) - return clkPhase[0]; - - configurePll(); - clkPhase[0] = st; - return clkPhase[0]; -} - -int getPhase() { - return clkPhase[0]; -} - -void configureASICTimer() { - FILE_LOG(logINFO, ("Configuring ASIC Timer\n")); - bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_PRCHRG_TMR_MSK) | ASIC_CTRL_PRCHRG_TMR_VAL); - bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | ASIC_CTRL_DS_TMR_VAL); -} - - - - @@ -566,91 +507,29 @@ int setDynamicRange(int dr){ -/* parameters - readout */ +/* parameters - speed, readout */ -enum speedVariable setSpeed(int val) { - - // setting - if(val >= 0) { - - // stop state machine if running - if(runBusy()) - stopStateMachine(); - - uint32_t txndelay_msk = 0; - - switch(val){ - - // todo in firmware, for now setting half speed - case FULL_SPEED://40 - FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); - - FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED)); - bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); - - txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value - FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk)); - bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk); - - FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL)); - bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); - - FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED)); - adcPhase(ADC_PHASE_HALF_SPEED); - - break; - case HALF_SPEED: - FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); - - FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED)); - bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); - - txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value - FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk)); - bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk); - - FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL)); - bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); - - FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED)); - adcPhase(ADC_PHASE_HALF_SPEED); - - break; - case QUARTER_SPEED: - FILE_LOG(logINFO, ("Setting Half Speed (10 MHz):\n")); - - FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED)); - bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED); - - txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value - FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED | txndelay_msk)); - bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED | txndelay_msk); - - FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL)); - bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL); - - FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED)); - adcPhase(ADC_PHASE_QUARTER_SPEED); - - break; - } - } - - //getting - u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK; - switch(speed){ - case CONFIG_FULL_SPEED_40MHZ_VAL: - return FULL_SPEED; - case CONFIG_HALF_SPEED_20MHZ_VAL: - return HALF_SPEED; - case CONFIG_QUARTER_SPEED_10MHZ_VAL: - return QUARTER_SPEED; - default: - return -1; - } +void setSpeed(enum speedVariable ind, int val) { + switch(ind) { + case CLOCK_DIVIDER: + setClockDivider(val); + case ADC_PHASE: + setAdcPhase(val); + default: + return; + } } - +int getSpeed(enum speedVariable ind) { + switch(ind) { + case CLOCK_DIVIDER: + return getClockDivider(); + case ADC_PHASE: + return getPhase(); + default: + return -1; + } +} @@ -1292,10 +1171,149 @@ int setDetectorPosition(int pos[]) { -/* jungfrau specific - pll, flashing fpga */ +/* jungfrau specific - powerchip, autocompdisable, asictimer, clockdiv, pll, flashing fpga */ +int powerChip (int on){ + if(on != -1){ + if(on){ + FILE_LOG(logINFO, ("Powering chip: on\n")); + bus_w(CHIP_POWER_REG, bus_r(CHIP_POWER_REG) | CHIP_POWER_ENABLE_MSK); + } + else{ + FILE_LOG(logINFO, ("Powering chip: off\n")); + bus_w(CHIP_POWER_REG, bus_r(CHIP_POWER_REG) & ~CHIP_POWER_ENABLE_MSK); + } + } + + return ((bus_r(CHIP_POWER_REG) & CHIP_POWER_STATUS_MSK) >> CHIP_POWER_STATUS_OFST); +} + + + +int autoCompDisable(int on) { + if(on != -1){ + if(on){ + FILE_LOG(logINFO, ("Auto comp disable mode: on\n")); + bus_w(VREF_COMP_MOD_REG, bus_r(VREF_COMP_MOD_REG) | VREF_COMP_MOD_ENABLE_MSK); + } + else{ + FILE_LOG(logINFO, ("Auto comp disable mode: off\n")); + bus_w(VREF_COMP_MOD_REG, bus_r(VREF_COMP_MOD_REG) & ~VREF_COMP_MOD_ENABLE_MSK); + } + } + + return (bus_r(VREF_COMP_MOD_REG) & VREF_COMP_MOD_ENABLE_MSK); +} + +void configureASICTimer() { + FILE_LOG(logINFO, ("Configuring ASIC Timer\n")); + bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_PRCHRG_TMR_MSK) | ASIC_CTRL_PRCHRG_TMR_VAL); + bus_w(ASIC_CTRL_REG, (bus_r(ASIC_CTRL_REG) & ~ASIC_CTRL_DS_TMR_MSK) | ASIC_CTRL_DS_TMR_VAL); +} + +int setClockDivider(int val) { + // setting + if(val >= 0) { + + // stop state machine if running + if(runBusy()) + stopStateMachine(); + + uint32_t txndelay_msk = 0; + + switch(val){ + + // todo in firmware, for now setting half speed + case FULL_SPEED://40 + FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); + + FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED)); + bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); + + txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value + FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk)); + bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk); + + FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL)); + bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); + + FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED)); + setAdcPhase(ADC_PHASE_HALF_SPEED); + + break; + case HALF_SPEED: + FILE_LOG(logINFO, ("Setting Half Speed (20 MHz):\n")); + + FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_HALF_SPEED)); + bus_w(SAMPLE_REG, SAMPLE_ADC_HALF_SPEED); + + txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value + FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_HALF_SPEED | txndelay_msk)); + bus_w(CONFIG_REG, CONFIG_HALF_SPEED | txndelay_msk); + + FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_HALF_SPEED_VAL)); + bus_w(ADC_OFST_REG, ADC_OFST_HALF_SPEED_VAL); + + FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_HALF_SPEED)); + setAdcPhase(ADC_PHASE_HALF_SPEED); + + break; + case QUARTER_SPEED: + FILE_LOG(logINFO, ("Setting Half Speed (10 MHz):\n")); + + FILE_LOG(logINFO, ("\tSetting Sample Reg to 0x%x\n", SAMPLE_ADC_QUARTER_SPEED)); + bus_w(SAMPLE_REG, SAMPLE_ADC_QUARTER_SPEED); + + txndelay_msk = (bus_r(CONFIG_REG) & CONFIG_TDMA_TIMESLOT_MSK); // read config tdma timeslot value + FILE_LOG(logINFO, ("\tSetting Config Reg to 0x%x\n", CONFIG_QUARTER_SPEED | txndelay_msk)); + bus_w(CONFIG_REG, CONFIG_QUARTER_SPEED | txndelay_msk); + + FILE_LOG(logINFO, ("\tSetting ADC Ofst Reg to 0x%x\n", ADC_OFST_QUARTER_SPEED_VAL)); + bus_w(ADC_OFST_REG, ADC_OFST_QUARTER_SPEED_VAL); + + FILE_LOG(logINFO, ("\tSetting ADC Phase Reg to 0x%x\n", ADC_PHASE_QUARTER_SPEED)); + setAdcPhase(ADC_PHASE_QUARTER_SPEED); + + break; + } + } +} + +int getClockDivider() { + u_int32_t speed = bus_r(CONFIG_REG) & CONFIG_READOUT_SPEED_MSK; + switch(speed){ + case CONFIG_FULL_SPEED_40MHZ_VAL: + return FULL_SPEED; + case CONFIG_HALF_SPEED_20MHZ_VAL: + return HALF_SPEED; + case CONFIG_QUARTER_SPEED_10MHZ_VAL: + return QUARTER_SPEED; + default: + return -1; + } +} + +int setAdcPhase(int st){ /**carlos needed clkphase 1 and 2? cehck with Aldo */ + FILE_LOG(logINFO, ("Setting ADC Phase to %d\n", st)); + if (st > 65535 || st < -65535) + return clkPhase[0]; + + clkPhase[1] = st - clkPhase[0]; + if (clkPhase[1] == 0) + return clkPhase[0]; + + configurePll(); + clkPhase[0] = st; + return clkPhase[0]; +} + +int getPhase() { + return clkPhase[0]; +} + + void resetPLL() { #ifdef VIRTUAL return; @@ -1530,8 +1548,8 @@ enum runStatus getRunStatus(){ FILE_LOG(logINFO, ("Status Register: %08x\n",retval)); //running - if(((retval & RUN_BUSY_MSK) >> RUN_BUSY_OFST)) { - if ((retval & WAITING_FOR_TRIGGER_MSK) >> WAITING_FOR_TRIGGER_OFST) { + if (retval & RUN_BUSY_MSK) { + if (retval & WAITING_FOR_TRIGGER_MSK) { FILE_LOG(logINFOBLUE, ("Status: WAITING\n")); s = WAITING; } @@ -1543,10 +1561,10 @@ enum runStatus getRunStatus(){ //not running else { - if ((retval & STOPPED_MSK) >> STOPPED_OFST) { + if (retval & STOPPED_MSK) { FILE_LOG(logINFOBLUE, ("Status: STOPPED\n")); s = STOPPED; - } else if ((retval & RUNMACHINE_BUSY_MSK) >> RUNMACHINE_BUSY_OFST) { + } else if (retval & RUNMACHINE_BUSY_MSK) { FILE_LOG(logINFOBLUE, ("Status: READ MACHINE BUSY\n")); s = TRANSMITTING; } else if (!retval) { diff --git a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h index 4f283fc4b..c95430da9 100644 --- a/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h +++ b/slsDetectorServers/jungfrauDetectorServer/slsDetectorServer_defs.h @@ -46,8 +46,8 @@ enum NETWORKINDEX { TXN_FRAME }; #define NDAC (8) #define NDAC_OLDBOARD (16) #define DYNAMIC_RANGE (16) -#define NUM_BITS_PER_PIXEL (DYNAMIC_RANGE / 8) -#define DATA_BYTES (NCHIP * NCHAN * NUM_BITS_PER_PIXEL) +#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8) +#define DATA_BYTES (NCHIP * NCHAN * NUM_BYTES_PER_PIXEL) #define IP_PACKETSIZE (0x2052) #define CLK_RUN (40) /* MHz */ #define CLK_SYNC (20) /* MHz */ @@ -66,6 +66,9 @@ enum NETWORKINDEX { TXN_FRAME }; #define DEFAULT_NUM_STRG_CLLS (0) #define DEFAULT_STRG_CLL_STRT (0xf) +#define MAX_DAC_VOLTAGE_VALUE (2500) +#define MAX_DAC_UNIT_VALUE (4096) + /* Defines in the Firmware */ #define FIX_PATT_VAL (0xACDC2014) #define ADC_PORT_INVERT_VAL (0x453b2a9c) diff --git a/slsDetectorServers/slsDetectorServer/AD7689.h b/slsDetectorServers/slsDetectorServer/AD7689.h new file mode 100755 index 000000000..d9b3b0e9c --- /dev/null +++ b/slsDetectorServers/slsDetectorServer/AD7689.h @@ -0,0 +1,94 @@ +#pragma once + +//#include "commonServerFunctions.h" // blackfin.h, ansi.h + + + +/* AD7689 ADC DEFINES */ + +/** Read back CFG Register */ +#define AD7689_CFG_RB_OFST (0) +#define AD7689_CFG_RB_MSK (0x00000001 << AD7689_CFG_RB_OFST) + +/** Channel sequencer */ +#define AD7689_CFG_SEQ_OFST (1) +#define AD7689_CFG_SEQ_MSK (0x00000003 << AD7689_CFG_SEQ_OFST) +#define AD7689_CFG_SEQ_DSBLE_VAL ((0x0 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_UPDTE_DRNG_SQNCE_VAL ((0x1 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_SCN_WTH_TMP_VAL ((0x2 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) +#define AD7689_CFG_SEQ_SCN_WTHT_TMP_VAL ((0x3 << AD7689_CFG_SEQ_OFST) & AD7689_CFG_SEQ_MSK) + +/** Reference/ buffer selection */ +#define AD7689_CFG_REF_OFST (3) +#define AD7689_CFG_REF_MSK (0x00000007 << AD7689_CFG_REF_OFST) +/** Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. */ +#define AD7689_CFG_REF_INT_2500MV_VAL ((0x0 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_OFST) +/** Internal reference. REF = 4.096V buffered output. Temperature sensor enabled. */ +#define AD7689_CFG_REF_INT_4096MV_VAL ((0x1 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +/** External reference. Temperature sensor enabled. Internal buffer disabled. */ +#define AD7689_CFG_REF_EXT_TMP_VAL ((0x2 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +/** External reference. Temperature sensor enabled. Internal buffer enabled. */ +#define AD7689_CFG_REF_EXT_TMP_INTBUF_VAL ((0x3 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +/** External reference. Temperature sensor disabled. Internal buffer disabled. */ +#define AD7689_CFG_REF_EXT_VAL ((0x6 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) +/** External reference. Temperature sensor disabled. Internal buffer enabled. */ +#define AD7689_CFG_REF_EXT_INTBUF_VAL ((0x7 << AD7689_CFG_REF_OFST) & AD7689_CFG_REF_MSK) + +/** bandwidth of low pass filter */ +#define AD7689_CFG_BW_OFST (6) +#define AD7689_CFG_BW_MSK (0x00000001 << AD7689_CFG_REF_OFST) +#define AD7689_CFG_BW_ONE_FOURTH_VAL ((0x0 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) +#define AD7689_CFG_BW_FULL_VAL ((0x1 << AD7689_CFG_BW_OFST) & AD7689_CFG_BW_MSK) + +/** input channel selection IN0 - IN7 */ +#define AD7689_CFG_IN_OFST (7) +#define AD7689_CFG_IN_MSK (0x00000007 << AD7689_CFG_IN_OFST) + +/** input channel configuration */ +#define AD7689_CFG_INCC_OFST (10) +#define AD7689_CFG_INCC_MSK (0x00000007 << AD7689_CFG_INCC_OFST) +#define AD7689_CFG_INCC_BPLR_DFFRNTL_PRS_VAL ((0x0 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_BPLR_IN_COM_VAL ((0x2 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_TMP_VAL ((0x3 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_UNPLR_DFFRNTL_PRS_VAL ((0x4 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_UNPLR_IN_COM_VAL ((0x6 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) +#define AD7689_CFG_INCC_UNPLR_IN_GND_VAL ((0x7 << AD7689_CFG_INCC_OFST) & AD7689_CFG_INCC_MSK) + +/** configuration update */ +#define AD7689_CFG_CFG_OFST (13) +#define AD7689_CFG_CFG_MSK (0x00000001 << AD7689_CFG_CFG_OFST) +#define AD7689_CFG_CFG_NO_UPDATE_VAL ((0x0 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) +#define AD7689_CFG_CFG_OVRWRTE_VAL ((0x1 << AD7689_CFG_CFG_OFST) & AD7689_CFG_CFG_MSK) + +int getAD7689(int ind) { + +} + +void setAD7689(int addr, int val) { + u_int32_t codata; + codata = val + (addr << 8); + FILE_LOG(logINFO, ("\tSetting ADC SPI Register. Wrote 0x%04x at 0x%04x\n", val, addr)); + serializeToSPI(ADC_SPI_REG, codata, ADC_SERIAL_CS_OUT_MSK, AD9257_ADC_NUMBITS, + ADC_SERIAL_CLK_OUT_MSK, ADC_SERIAL_DATA_OUT_MSK, ADC_SERIAL_DATA_OUT_OFST); +} + +void prepareAD7689(){ + FILE_LOG(logINFOBLUE, ("Preparing AD7689 (Slow ADCs):\n")); + + uint16_t codata = ( + // read back + AD7689_CFG_RB_MSK | + // scan sequence IN0-IN7 then temperature sensor + AD7689_CFG_SEQ_SCN_WTH_TMP_VAL | + // Internal reference. REF = 2.5V buffered output. Temperature sensor enabled. + AD7689_CFG_REF_INT_2500MV_VAL | + // full bandwidth of low pass filter + AD7689_CFG_BW_FULL_VAL | + // scan upto channel 7 + AD7689_CFG_IN_MSK | + // input channel configuration (unipolar. inx to gnd) + AD7689_CFG_INCC_UNPLR_IN_GND_VAL | + // overwrite configuration + AD7689_CFG_CFG_OVRWRTE_VAL); + +} diff --git a/slsDetectorServers/slsDetectorServer/AD9257.h b/slsDetectorServers/slsDetectorServer/AD9257.h index a445c5510..ad471a2d7 100755 --- a/slsDetectorServers/slsDetectorServer/AD9257.h +++ b/slsDetectorServers/slsDetectorServer/AD9257.h @@ -125,6 +125,13 @@ #define AD9257_VREF_1_6_VAL ((0x3 << AD9257_VREF_OFST) & AD9257_VREF_MSK) #define AD9257_VREF_2_0_VAL ((0x4 << AD9257_VREF_OFST) & AD9257_VREF_MSK) +int getMaxValidVref() { + return 0x4; +} + +void setVrefVoltage(int val) { + setAdc9257(AD9257_VREF_REG, val); +} void setAdc9257(int addr, int val) { diff --git a/slsDetectorServers/slsDetectorServer/I2C.h b/slsDetectorServers/slsDetectorServer/I2C.h new file mode 100755 index 000000000..4e449fbed --- /dev/null +++ b/slsDetectorServers/slsDetectorServer/I2C.h @@ -0,0 +1,136 @@ +#pragma once + +#include "blackfin.h" /** I2C_CLOCK_MHZ should be defined */ + +#define I2C_DATA_RATE_KBPS (200) +#define I2C_SCL_PERIOD_NS ((1000 * 1000) / I2C_DATA_RATE_KBPS) +#define I2C_SCL_LOW_PERIOD_NS (I2C_SCL_PERIOD_NS / 2) +#define I2C_SDA_DATA_HOLD_TIME_NS (I2C_SCL_HIGH_PERIOD_NS / 2) +#define I2C_SCL_LOW_COUNT ((I2C_SCL_LOW_PERIOD_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h) +#define I2C_SDA_DATA_HOLD_COUNT ((I2C_SDA_DATA_HOLD_TIME_NS / 1000) * I2C_CLOCK_MHZ) // convert to us, then to clock (defined in blackfin.h) + +/** Control Register */ +#define I2C_CTRL_ENBLE_CORE_OFST (0) +#define I2C_CTRL_ENBLE_CORE_MSK (0x00000001 << I2C_CTRL_ENBLE_CORE_OFST) +#define I2C_CTRL_BUS_SPEED_OFST (1) +#define I2C_CTRL_BUS_SPEED_MSK (0x00000001 << I2C_CTRL_BUS_SPEED_OFST) +#define I2C_CTRL_BUS_SPEED_STNDRD_100_VAL ((0x0 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // standard mode (up to 100 kbps) +#define I2C_CTRL_BUS_SPEED_FAST_400_VAL ((0x1 << I2C_CTRL_BUS_SPEED_OFST) & I2C_CTRL_BUS_SPEED_MSK) // fast mode (up to 400 kbps) +/** if actual level of transfer command fifo <= thd level, TX_READY interrupt asserted */ +#define I2C_CTRL_TFR_CMD_FIFO_THD_OFST (2) +#define I2C_CTRL_TFR_CMD_FIFO_THD_MSK (0x00000003 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) +#define I2C_CTRL_TFR_CMD_EMPTY_VAL ((0x0 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +#define I2C_CTRL_TFR_CMD_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +#define I2C_CTRL_TFR_CMD_ONE_HALF_VAL ((0x2 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +#define I2C_CTRL_TFR_CMD_NOT_FULL_VAL ((0x3 << I2C_CTRL_TFR_CMD_FIFO_THD_OFST) & I2C_CTRL_TFR_CMD_FIFO_THD_MSK) +/** if actual level of receive data fifo <= thd level, RX_READY interrupt asserted */ +#define I2C_CTRL_RX_DATA_FIFO_THD_OFST (4) +#define I2C_CTRL_RX_DATA_FIFO_THD_MSK (0x00000003 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) +#define I2C_CTRL_RX_DATA_1_VALID_ENTRY_VAL ((0x0 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_RX_DATA_ONE_FOURTH_VAL ((0x1 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_RX_DATA_ONE_HALF_VAL ((0x2 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) +#define I2C_CTRL_RX_DATA_FULL_VAL ((0x3 << I2C_CTRL_RX_DATA_FIFO_THD_OFST) & I2C_CTRL_RX_DATA_FIFO_THD_MSK) + +/** Transfer Command Fifo register */ +#define I2C_TFR_CMD_RW_OFST (0) +#define I2C_TFR_CMD_RW_MSK (0x00000001 << I2C_TFR_CMD_RW_OFST) +#define I2C_TFR_CMD_RW_WRITE_VAL ((0x0 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) +#define I2C_TFR_CMD_RW_READ_VAL ((0x1 << I2C_TFR_CMD_RW_OFST) & I2C_TFR_CMD_RW_MSK) +#define I2C_TFR_CMD_ADDR_OFST (1) +#define I2C_TFR_CMD_ADDR_MSK (0x0000007F << I2C_TFR_CMD_ADDR_OFST) +/** when writing, rw and addr converts to data to be written mask */ +#define I2C_TFR_CMD_DATA_FR_WR_OFST (0) +#define I2C_TFR_CMD_DATA_FR_WR_MSK (0x000000FF << I2C_TFR_CMD_DATA_FR_WR_OFST) +#define I2C_TFR_CMD_STOP_OFST (8) +#define I2C_TFR_CMD_STOP_MSK (0x00000001 << I2C_TFR_CMD_ADDR_OFST) +#define I2C_TFR_CMD_RPTD_STRT_OFST (9) +#define I2C_TFR_CMD_RPTD_STRT_MSK (0x00000001 << I2C_TFR_CMD_RPTD_STRT_OFST) + + +/** + * Configure the I2C core, + * Enable core and + * Calibrate the calibration register for current readout + * @param sclLowCountReg register to set low count of the serial clock + * @param sclHighCountReg register to set high count of the serial clock + * @param sdaHoldTimeReg register to set hold time of the serial data + * @oaram controlReg register to set control reg (bus speed and enabling core) + */ +void I2C_ConfigureI2CCore(uint32_t sclLowCountReg, uint32_t sclHighCountReg, uint32_t sdaHoldTimeReg, uint32_t controlReg) { + FILE_LOG(logINFOBLUE, ("Configuring I2C Core for %d kbps:\n", I2C_DATA_RATE_KBPS)); + + FILE_LOG(logINFOBLUE, ("\tSetting SCL Low Period: %d ns (0x%x clocks)\n", I2C_SCL_LOW_PERIOD_NS, I2C_SCL_LOW_COUNT)); + bus_w(sclLowPeriodReg, (uint32_t)I2C_SCL_LOW_COUNT); + + FILE_LOG(logINFOBLUE, ("\tSetting SCL High Period: %d ns (0x%x clocks)\n", I2C_SCL_HIGH_PERIOD_NS, I2C_SCL_LOW_COUNT)); + bus_w(sclHighPeriodReg, (uint32_t)I2C_SCL_LOW_COUNT); + + FILE_LOG(logINFOBLUE, ("\tSetting SDA Hold Time: %d ns (0x%x clocks)\n", I2C_SDA_DATA_HOLD_TIME_NS, I2C_SDA_DATA_HOLD_COUNT)); + bus_w(sdaHoldTimeReg, (uint32_t)I2C_SDA_DATA_HOLD_COUNT); + + FILE_LOG(logINFOBLUE, ("\tEnabling core\n")); + bus_w(controlReg, I2C_CNTRL_ENBLE_CORE_MSK | I2C_CTRL_BUS_SPEED_FAST_400_VAL);// fixme: (works?) +} + +/** + * Read register + * @param transferCommandReg transfer command fifo register + * @param rxDataFifoLevelReg receive data fifo level register + * @param deviceId device Id + * @param addr register address + * @returns value read from register + */ +uint32_t I2C_Read(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t devId, uint32_t addr) { + // device Id mask + uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); + + // write I2C ID + bus_w(transferCommandReg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK))); + + // write register addr + bus_w(transferCommandReg, addr); + + // repeated start with read + bus_w(transferCommandReg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK | I2C_TFR_CMD_RW_READ_VAL)); + + // continue reading + bus_w(transferCommandReg, 0x0); + + // stop reading + bus_w(transferCommandReg, I2C_TFR_CMD_STOP_MSK); + + // read value + return bus_r(rxDataFifoLevelReg); +} + +/** + * Write register (16 bit value) + * @param transferCommandReg transfer command fifo register + * @param deviceId device Id + * @param addr register address + * @param data data to be written (16 bit) + */ +void I2C_Write(uint32_t transferCommandReg, uint32_t devId, uint32_t addr, uint16_t data) { + // device Id mask + uint32_t devIdMask = ((devId << I2C_TFR_CMD_ADDR_OFST) & I2C_TFR_CMD_ADDR_MSK); + + // write I2C ID + bus_w(transferCommandReg, (devIdMask & ~(I2C_TFR_CMD_RW_MSK))); + + // write register addr + bus_w(transferCommandReg, addr); + + // repeated start with write + bus_w(transferCommandReg, (devIdMask | I2C_TFR_CMD_RPTD_STRT_MSK & ~(I2C_TFR_CMD_RW_MSK))); + + uint8_t msb = data & 0xFF00; + uint8_t lsb = data & 0x00FF; + + // writing data MSB + bus_w(transferCommandReg, ((msb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK)); + + // writing data LSB and stop writing bit + bus_w(transferCommandReg, ((lsb << I2C_TFR_CMD_DATA_FR_WR_OFST) & I2C_TFR_CMD_DATA_FR_WR_MSK) | I2C_TFR_CMD_STOP_MSK); +} + + diff --git a/slsDetectorServers/slsDetectorServer/INA226.h b/slsDetectorServers/slsDetectorServer/INA226.h new file mode 100755 index 000000000..85deb0560 --- /dev/null +++ b/slsDetectorServers/slsDetectorServer/INA226.h @@ -0,0 +1,126 @@ +#pragma once + +#include "I2C.h" + +/** INA226 defines */ + +/** Register set */ +#define INA226_CONFIGURATION_REG (0x00) //R/W +#define INA226_SHUNT_VOLTAGE_REG (0x01) //R +#define INA226_BUS_VOLTAGE_REG (0x02) //R +#define INA226_POWER_REG (0x03) //R +#define INA226_CURRENT_REG (0x04) //R +#define INA226_CALIBRATION_REG (0x05) //R/W +#define INA226_MASK_ENABLE_REG (0x06) //R/W +#define INA226_ALERT_LIMIT_REG (0x07) //R/W +#define INA226_MANUFACTURER_ID_REG (0xFE) //R +#define INA226_DIE_ID_REG (0xFF) //R + +/** bus voltage register */ +#define INA226_BUS_VOLTAGE_VMIN_UV (1250) // 1.25mV +#define INA226_BUS_VOLTAGE_MX_STPS (0x7FFF + 1) +#define INA226_BUS_VOLTAGE_VMAX_UV (INA226_BUS_VOLTAGE_VMIN_UV * INA226_BUS_VOLTAGE_MX_STPS) // 40960000uV, 40.96V + +/** current register */ +#define INA226_CURRENT_IMIN_UA (100) //100uA can be changed +#define INA226_CURRENT_MX_STPS (0x7FFF + 1) +#define INA226_CURRENT_IMAX_UA (INA226_CURRENT_IMIN_UA * INA226_CURRENT_MX_STPS) + +/** calibration register */ +#define INA226_CALIBRATION_MSK (0x7FFF) + +/** get calibration register value to be set */ +#define INA226_getCalibrationValue(rOhm) (0.00512 /(INA226_CURRENT_IMIN_UA * 1e-6 * rohm)) + +/** get current unit */ +#define INA226_getConvertedCurrentUnits(shuntVReg, calibReg) (shuntVReg * calibReg / 2048) + +/** + * Configure the I2C core and Enable core + * @param sclLowCountReg register to set low count of the serial clock (defined in Registerdefs.h) + * @param sclHighCountReg register to set high count of the serial clock (defined in Registerdefs.h) + * @param sdaHoldTimeReg register to set hold time of the serial data (defined in Registerdefs.h) + * @param controlReg register to set control reg (bus speed and enabling core) (defined in Registerdefs.h) + */ +void INA226_ConfigureI2CCore(uint32_t sclLowCountReg, uint32_t sclHighCountReg, uint32_t sdaHoldTimeReg, uint32_t controlReg) { + I2C_ConfigureI2CCore(sclLowCountReg, sclHighCountReg, sdaHoldTimeReg, controlReg); +} + +/** + * Calibrate resolution of current register + * @param shuntResisterOhm shunt resister value in Ohms + * @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h) + * @param deviceId device Id (defined in slsDetectorServer_defs.h) + */ +void INA226_CalibrateCurrentRegister(uint32_t shuntResisterOhm, uint32_t transferCommandReg, uint32_t deviceId) { + + // get calibration value based on shunt resistor + uint16_t calVal = INA226_getCalibrationValue(shuntResisterOhm) & INA226_CALIBRATION_MSK; + FILE_LOG(logINFO, ("\tWriting to Calibration reg: 0x%0x\n", calVal)); + + // calibrate current register + I2C_Write(transferCommandReg, deviceId, INA226_CALIBRATION_REG, calVal); +} + +/** + * Read voltage of device + * @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h) + * @param rxDataFifoLevelReg receive data fifo level register (defined in RegisterDefs.h) + * @param deviceId device Id (defined in slsDetectorServer_defs.h) + * @returns voltage in mV + */ +int INA226_ReadVoltage(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId) { + FILE_LOG(logDEBUG1, ("\tReading voltage\n")); + uint32_t regval = I2C_Read(transferCommandReg, rxDataFifoLevelReg, deviceId, INA226_BUS_VOLTAGE_REG); + FILE_LOG(logDEBUG1, ("\tvoltage read: 0x%08x\n", regval)); + + // value converted in mv + uint32_t vmin = INA226_BUS_VOLTAGE_VMIN_UV; + uint32_t vmax = INA226_BUS_VOLTAGE_VMAX_UV; + uint32_t nsteps = INA226_BUS_VOLTAGE_MX_STPS; + + // value in uV + int retval = (vmin + (vmax - vmin) * regval / (nsteps - 1)); + FILE_LOG(logDEBUG1, ("\tvoltage read: 0x%d uV\n", retval)); + + // value in mV + retval /= 1000; + FILE_LOG(logDEBUG1, ("\tvoltage read: %d mV\n", retval)); + + return retval; +} + +/** + * Read current + * @param transferCommandReg transfer command fifo register (defined in RegisterDefs.h) + * @param rxDataFifoLevelReg receive data fifo level register (defined in RegisterDefs.h) + * @param deviceId device Id (should be defined in slsDetectorServer_defs.h) + * @returns current in mA + */ +int INA226_ReadCurrent(uint32_t transferCommandReg, uint32_t rxDataFifoLevelReg, uint32_t deviceId) { + FILE_LOG(logDEBUG1, ("\tReading current\n")); + + // read shunt voltage register + FILE_LOG(logDEBUG1, ("\tReading shunt voltage reg\n")); + uint32_t shuntVoltageRegVal = I2C_Read(transferCommandReg, rxDataFifoLevelReg, deviceId, INA226_SHUNT_VOLTAGE_REG); + FILE_LOG(logDEBUG1, ("\tshunt voltage reg: 0x%08x\n", regval)); + + // read calibration register + FILE_LOG(logDEBUG1, ("\tReading calibration reg\n")); + uint32_t calibrationRegVal = I2C_Read(transferCommandReg, rxDataFifoLevelReg, deviceId, INA226_CALIBRATION_REG); + FILE_LOG(logDEBUG1, ("\tcalibration reg: 0x%08x\n", regval)); + + // value for current + uint32_t retval = INA226_getConvertedCurrentUnits(shuntVoltageRegVal, calibrationRegVal); + FILE_LOG(logDEBUG1, ("\tcurrent unit value: %d\n", retval)); + + // current in uA + retval *= INA226_CURRENT_IMIN_UA; + FILE_LOG(logDEBUG1, ("\tcurrent: %d uA\n", retval)); + + // current in mA + retval /= 1000; + FILE_LOG(logDEBUG1, ("\tcurrent: %d mA\n", retval)); + + return retval; +} diff --git a/slsDetectorServers/slsDetectorServer/Makefile b/slsDetectorServers/slsDetectorServer/Makefile deleted file mode 100644 index 8c3ee8d97..000000000 --- a/slsDetectorServers/slsDetectorServer/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -CC = gcc -CLAGS += -Wall -DVIRTUAL -DDACS_INT -DGENERICD # -DSLS_DETECTOR_FUNCTION_LIST -LDLIBS += -lm - -PROGS = genericDetectorServer -DESTDIR ?= bin -INSTMODE = 0777 - -SRC_CLNT = slsDetectorServer.c slsDetectorServer_funcs.c communication_funcs.c slsDetectorFunctionList.c -OBJS = $(SRC_CLNT:.cpp=.o) - - - -all: clean $(PROGS) - -boot: $(OBJS) - -$(PROGS): - echo $(OBJS) - mkdir -p $(DESTDIR) - $(CC) $(SRC_CLNT) $(CLAGS) $(LDLIBS) -o $@ - mv $(PROGS) $(DESTDIR) - - -clean: - rm -rf $(DESTDIR)/$(PROGS) *.o diff --git a/slsDetectorServers/slsDetectorServer/blackfin.h b/slsDetectorServers/slsDetectorServer/blackfin.h index 56ee1a6e2..dd8c38ec7 100755 --- a/slsDetectorServers/slsDetectorServer/blackfin.h +++ b/slsDetectorServers/slsDetectorServer/blackfin.h @@ -11,7 +11,8 @@ u_int64_t CSP0BASE = 0; #define CSP0 0x20200000 #define MEM_SIZE 0x100000 - +/** I2C defines */ +#define I2C_CLOCK_MHZ (131.25) /** * Write into a 16 bit register diff --git a/slsDetectorServers/slsDetectorServer/commonServerFunctions.h b/slsDetectorServers/slsDetectorServer/commonServerFunctions.h index cf62d90af..59f106e08 100755 --- a/slsDetectorServers/slsDetectorServer/commonServerFunctions.h +++ b/slsDetectorServers/slsDetectorServer/commonServerFunctions.h @@ -2,7 +2,7 @@ #include "blackfin.h" -void SPIChipSelect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask) { +void SPIChipSelect (uint32_t* valw, uint32_t addr, uint32_t csmask) { // start point (*valw) = 0xffffffff; // old board compatibility (not using specific bits) @@ -14,7 +14,7 @@ void SPIChipSelect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask) { } -void SPIChipDeselect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask, u_int32_t clkmask) { +void SPIChipDeselect (uint32_t* valw, uint32_t addr, uint32_t csmask, uint32_t clkmask) { // chip sel bar up (*valw) |= csmask; /* todo with test: not done for spi */ bus_w (addr, (*valw)); @@ -28,7 +28,7 @@ void SPIChipDeselect (u_int32_t* valw, u_int32_t addr, u_int32_t csmask, u_int3 bus_w (addr, (*valw)); } -void sendDataToSPI (u_int32_t* valw, u_int32_t addr, u_int32_t val, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) { +void sendDataToSPI (uint32_t* valw, uint32_t addr, uint32_t val, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) { int i = 0; for (i = 0; i < numbitstosend; ++i) { @@ -48,13 +48,13 @@ void sendDataToSPI (u_int32_t* valw, u_int32_t addr, u_int32_t val, int numbitst } -void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset) { +void serializeToSPI(uint32_t addr, uint32_t val, uint32_t csmask, int numbitstosend, uint32_t clkmask, uint32_t digoutmask, int digofset) { if (numbitstosend == 16) { FILE_LOG(logDEBUG1, ("Writing to SPI Register: 0x%04x\n", val)); } else { FILE_LOG(logDEBUG1, ("Writing to SPI Register: 0x%08x\n", val)); } - u_int32_t valw; + uint32_t valw; SPIChipSelect (&valw, addr, csmask); diff --git a/slsDetectorServers/slsDetectorServer/communication_funcs.c b/slsDetectorServers/slsDetectorServer/communication_funcs.c index af69a89ff..620605df1 100755 --- a/slsDetectorServers/slsDetectorServer/communication_funcs.c +++ b/slsDetectorServers/slsDetectorServer/communication_funcs.c @@ -299,14 +299,52 @@ int receiveData(int file_des, void* buf,int length, intType itype){ int sendDataOnly(int file_des, void* buf,int length) { - if (!length) - return 0; - int lret = write(file_des, buf, length); //value of -1 is other end socket crash as sigpipe is ignored - if (lret < 0) { - FILE_LOG(logERROR, ("Could not write to %s socket. Possible socket crash\n", - (isControlServer ? "control":"stop"))); - } - return lret; + if (!length) + return 0; + + + int bytesSent = 0; + int retry = 0; // retry index when buffer is blocked (write returns 0) + while (bytesSent < length) { + + // setting a max packet size for blackfin driver (and network driver does not do a check if packets sent) + int bytesToSend = length - bytesSent; + if (bytesToSend > BLACKFIN_DRVR_SND_LMT) + bytesToSend = BLACKFIN_DRVR_SND_LMT; + + // send + int rc = write(file_des, (char*)((char*)buf + bytesSent), bytesToSend); + // error + if (rc < 0) { + FILE_LOG(logERROR, ("Could not write to %s socket. Possible socket crash\n", + (isControlServer ? "control":"stop"))); + return bytesSent; + } + // also error, wrote nothing, buffer blocked up, too fast sending for client + if (rc == 0) { + FILE_LOG(logERROR, ("Could not write to %s socket. Buffer full. Retry: %d\n", + (isControlServer ? "control":"stop"), retry)); + ++retry; + // wrote nothing for many loops + if (retry >= BLACKFIN_RSND_PCKT_LOOP) { + FILE_LOG(logERROR, ("Could not write to %s socket. Buffer full! Too fast! No more.\n", + (isControlServer ? "control":"stop"))); + return bytesSent; + } + usleep(BLACKFIN_RSND_WAIT_US); + } + // wrote something, reset retry + else { + retry = 0; + if (rc != bytesToSend) { + FILE_LOG(logWARNING, ("Only partial write to %s socket. Expected to write %d bytes, wrote %d\n", + (isControlServer ? "control":"stop"), bytesToSend, rc)); + } + } + bytesSent += rc; + } + + return bytesSent; } diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.c b/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.c deleted file mode 100644 index c28ab462d..000000000 --- a/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.c +++ /dev/null @@ -1,838 +0,0 @@ -#ifdef SLS_DETECTOR_FUNCTION_LIST - -#include "slsDetectorFunctionList.h" -#include "slsDetectorServer_defs.h" - -#include -#include - - -const int nChans=NCHAN; -const int nChips=NCHIP; -const int nDacs=NDAC; -const int nAdcs=NADC; -const int allSelected=-2; -const int noneSelected=-1; - -sls_detector_module *detectorModules=NULL; -int *detectorChips=NULL; -int *detectorChans=NULL; -dacs_t *detectorDacs=NULL; -dacs_t *detectorAdcs=NULL; - -int nModY = NMAXMOD; -int nModX = NMAXMOD; -int dynamicRange= DYNAMIC_RANGE; -int dataBytes = NMAXMOD*NCHIP*NCHAN*2; -int masterMode = NO_MASTER; -int syncMode = NO_SYNCHRONIZATION; -int timingMode = AUTO_TIMING; - - - -enum detectorSettings thisSettings; -int sChan, sChip, sMod, sDac, sAdc; -int nModBoard; -extern int dataBytes; - - -int initializeDetectorStructure(){ - - int imod; - int n=getNModBoard(X)*getNModBoard(Y); -#ifdef VERBOSE - printf("Board is for %d modules\n",n); -#endif - detectorModules=malloc(n*sizeof(sls_detector_module)); - detectorChips=malloc(n*NCHIP*sizeof(int)); - detectorChans=malloc(n*NCHIP*NCHAN*sizeof(int)); - detectorDacs=malloc(n*NDAC*sizeof(int)); - detectorAdcs=malloc(n*NADC*sizeof(int)); -#ifdef VERBOSE - printf("modules from 0x%x to 0x%x\n",(unsigned int)(detectorModules), (unsigned int)(detectorModules+n)); - printf("chips from 0x%x to 0x%x\n",(unsigned int)(detectorChips), (unsigned int)(detectorChips+n*NCHIP)); - printf("chans from 0x%x to 0x%x\n",(unsigned int)(detectorChans), (unsigned int)(detectorChans+n*NCHIP*NCHAN)); - printf("dacs from 0x%x to 0x%x\n",(unsigned int)(detectorDacs), (unsigned int)(detectorDacs+n*NDAC)); - printf("adcs from 0x%x to 0x%x\n",(unsigned int)(detectorAdcs), (unsigned int)(detectorAdcs+n*NADC)); -#endif - for (imod=0; imoddacs=detectorDacs+imod*NDAC; - (detectorModules+imod)->adcs=detectorAdcs+imod*NADC; - (detectorModules+imod)->chipregs=detectorChips+imod*NCHIP; - (detectorModules+imod)->chanregs=detectorChans+imod*NCHIP*NCHAN; - (detectorModules+imod)->ndac=NDAC; - (detectorModules+imod)->nadc=NADC; - (detectorModules+imod)->nchip=NCHIP; - (detectorModules+imod)->nchan=NCHIP*NCHAN; - (detectorModules+imod)->module=imod; - (detectorModules+imod)->gain=0; - (detectorModules+imod)->offset=0; - (detectorModules+imod)->reg=0; - /* initialize registers, dacs, retrieve sn, adc values etc */ - } - thisSettings=UNINITIALIZED; - sChan=noneSelected; - sChip=noneSelected; - sMod=noneSelected; - sDac=noneSelected; - sAdc=noneSelected; - - return OK; -} - - - - - - -int setupDetector(){ - //testFpga(); - //testRAM(); - - //setSettings(GET_SETTINGS,-1); - //setFrames(1); - //setTrains(1); - //setExposureTime(1e6); - //setPeriod(1e9); - //setDelay(0); - //setGates(0); - - //setTiming(GET_EXTERNAL_COMMUNICATION_MODE); - //setMaster(GET_MASTER); - //setSynchronization(GET_SYNCHRONIZATION_MODE); - return OK; -} - - - - -int setNMod(int nm, enum dimension dim){ - return 1; -} - - - -int getNModBoard(enum dimension arg){ - return 1; -} - - - - - - - - -int64_t getModuleId(enum idMode arg, int imod){ - //DETECTOR_SERIAL_NUMBER - //DETECTOR_FIRMWARE_VERSION - return 0; -} - - - - -int64_t getDetectorId(enum idMode arg){ - //DETECTOR_SOFTWARE_VERSION defined in slsDetector_defs.h? - return 0; -} - - - - - -int moduleTest( enum digitalTestMode arg, int imod){ - //template testShiftIn from mcb_funcs.c - - //CHIP_TEST - //testShiftIn - //testShiftOut - //testShiftStSel - //testDataInOutMux - //testExtPulseMux - //testOutMux - //testFpgaMux - - return OK; -} - - - - - -int detectorTest( enum digitalTestMode arg){ - //templates from firmware_funcs.c - - //DETECTOR_FIRMWARE_TEST:testFpga() - //DETECTOR_MEMORY_TEST:testRAM() - //DETECTOR_BUS_TEST:testBus() - //DETECTOR_SOFTWARE_TEST:testFpga() - return OK; -} - - - - - - -double setDAC(enum dacIndex ind, double val, int imod){ - //template initDACbyIndexDACU from mcb_funcs.c - - //check that slsDetectorServer_funcs.c set_dac() has all the specific dac enums - //set dac and write to a register in fpga to remember dac value when server restarts - return 0; -} - - - -double getADC(enum dacIndex ind, int imod){ - //get adc value - return 0; -} - - - - -int setChannel(sls_detector_channel myChan){ - //template initChannelByNumber() from mcb_funcs.c - - return myChan.reg; -} - - -int getChannel(sls_detector_channel *myChan){ - //template getChannelbyNumber() from mcb_funcs.c - return FAIL; -} - - - -int setChip(sls_detector_chip myChip){ - //template initChipbyNumber() from mcb_funcs.c - return myChip.reg; -} - - -int getChip(sls_detector_chip *myChip){ - //template getChipbyNumber() from mcb_funcs.c - return FAIL; -} - -int setModule(sls_detector_module myChan){ - //template initModulebyNumber() from mcb_funcs.c - return OK; -} - -int getModule(sls_detector_module *myChan){ - //template getModulebyNumber() from mcb_funcs.c - return FAIL; -} - -int getThresholdEnergy(int imod){ - //template getThresholdEnergy() from mcb_funcs.c - //depending on settings - return FAIL; -} - - -int setThresholdEnergy(int thr, int imod){ - //template getThresholdEnergy() from mcb_funcs.c - //depending on settings - return FAIL; -} - - - -enum detectorSettings setSettings(enum detectorSettings sett, int imod){ - //template setSettings() from mcb_funcs.c - //reads the dac registers from fpga to confirm which settings, if weird, undefined - - return OK; -} - -int startStateMachine(){ - //template startStateMachine() from firmware_funcs.c - /* - fifoReset(); - now_ptr=(char*)ram_values; - //send start acquisition to fpga - */ - return FAIL; -} - - -int stopStateMachine(){ - //template stopStateMachine() from firmware_funcs.c - // send stop to fpga - //if status = busy after 500us, return FAIL - return FAIL; -} - - -int startReadOut(){ - //template startReadOut() from firmware_funcs.c - //send fpga start readout - return FAIL; -} - - -enum runStatus getRunStatus(){ - //template runState() from firmware_funcs.c - //get status from fpga - return ERROR; -} - - -char *readFrame(int *ret, char *mess){ - //template fifo_read_event() from firmware_funcs.c - //checks if state machine running and if fifo has data(look_at_me_reg) and accordingly reads frame - // memcpy(now_ptr, values, dataBytes); - //returns ptr to values - return NULL; -} - - -int64_t setTimer(enum timerIndex ind, int64_t val){ - //template setDelay() from firmware_funcs.c - //writes to reg - //FRAME_NUMBER - //ACQUISITION_TIME - //FRAME_PERIOD - //DELAY_AFTER_TRIGGER - //GATES_NUMBER - //PROBES_NUMBER - //CYCLES_NUMBER - return 0; -} - - -int64_t getTimeLeft(enum timerIndex ind){ - //template getDelay() from firmware_funcs.c - //reads from reg - //FRAME_NUMBER - //ACQUISITION_TIME - //FRAME_PERIOD - //DELAY_AFTER_TRIGGER - //GATES_NUMBER - //PROBES_NUMBER - //CYCLES_NUMBER - return -1; -} - - -int setDynamicRange(int dr){ - //template setDynamicRange() from firmware_funcs.c - return 0; -} - - -enum readOutFlags setReadOutFlags(enum readOutFlags val){ - //template setStoreInRAM from firmware_funcs.c - return -1; -} - - - - -int setROI(int n, ROI arg[], int *retvalsize, int *ret){ - return FAIL; -} - - - -int setSpeed(enum speedVariable arg, int val){ - //template setClockDivider() from firmware_funcs.c - //CLOCK_DIVIDER - //WAIT_STATES - //SET_SIGNAL_LENGTH - //TOT_CLOCK_DIVIDER - //TOT_DUTY_CYCLE - - //returns eg getClockDivider from firmware_funcs.c - return 0; -} - - - -int executeTrimming(enum trimMode mode, int par1, int par2, int imod){ - // template trim_with_noise from trimming_funcs.c - return FAIL; -} - - - - -int configureMAC(int ipad, long long int imacadd, long long int iservermacadd, int dtb){ - //detector specific. - return FAIL; -} - - -int loadImage(enum imageType index, char *imageVals){ - //detector specific. - return FAIL; -} - - -int readCounterBlock(int startACQ, char *counterVals){ - //detector specific. - return FAIL; -} - -int resetCounterBlock(int startACQ){ - //detector specific. - return FAIL; -} - -int startReceiver(int d){ - - return 0; -} - -int calibratePedestal(int frames){ - - return 0; -} - -int calculateDataBytes(){ - return 0; -} - -int getTotalNumberOfChannels(){return 0;} -int getTotalNumberOfChips(){return 0;} -int getTotalNumberOfModules(){return 0;} -int getNumberOfChannelsPerChip(){return 0;} -int getNumberOfChannelsPerModule(){return 0;} -int getNumberOfChipsPerModule(){return 0;} -int getNumberOfDACsPerModule(){return 0;} -int getNumberOfADCsPerModule(){return 0;} - - - - - - - -enum externalSignalFlag getExtSignal(int signalindex){ - //template getExtSignal from firmware_funcs.c - //return signals[signalindex]; - return -1; -} - - - - - -enum externalSignalFlag setExtSignal(int signalindex, enum externalSignalFlag flag){ - //template setExtSignal from firmware_funcs.c - - //in short..sets signals array, checks if agrees with timing mode, writes to fpga reg, calls synchronization and then settiming - /* - if (signalindex>=0 && signalindex<4) { - signals[signalindex]=flag; -#ifdef VERBOSE - printf("settings signal variable number %d to value %04x\n", signalindex, signals[signalindex]); -#endif - // if output signal, set it! - switch (flag) { - case GATE_IN_ACTIVE_HIGH: - case GATE_IN_ACTIVE_LOW: - if (timingMode==GATE_FIX_NUMBER || timingMode==GATE_WITH_START_TRIGGER)//timingMode = AUTO_TIMING by default and is set in setTiming() - setFPGASignal(signalindex,flag); //not implemented here, checks if flag within limits and writes to fpga reg - else - setFPGASignal(signalindex,SIGNAL_OFF); - break; - case TRIGGER_IN_RISING_EDGE: - case TRIGGER_IN_FALLING_EDGE: - if (timingMode==TRIGGER_EXPOSURE || timingMode==GATE_WITH_START_TRIGGER) - setFPGASignal(signalindex,flag); - else - setFPGASignal(signalindex,SIGNAL_OFF); - break; - case RO_TRIGGER_IN_RISING_EDGE: - case RO_TRIGGER_IN_FALLING_EDGE: - if (timingMode==BURST_TRIGGER) - setFPGASignal(signalindex,flag); - else - setFPGASignal(signalindex,SIGNAL_OFF); - break; - case MASTER_SLAVE_SYNCHRONIZATION: - setSynchronization(syncMode);//syncmode = NO_SYNCHRONIZATION by default and set with this function - break; - default: - setFPGASignal(signalindex,mode); - } - - setTiming(GET_EXTERNAL_COMMUNICATION_MODE); - } - */ - return getExtSignal(signalindex); -} - - - - - - -enum externalCommunicationMode setTiming( enum externalCommunicationMode arg){ - //template setTiming from firmware_funcs.c - //template getFPGASignal from firmware_funcs.c - - - //getFPGASignal(signalindex) used later on in this fucntion - //gets flag from fpga reg, checks if flag within limits, - //if( flag=SIGNAL_OFF and signals[signalindex]==MASTER_SLAVE_SYNCHRONIZATION), return -1, (ensures masterslaveflag !=off now) - //else return flag - - int ret=GET_EXTERNAL_COMMUNICATION_MODE; - //sets timingmode variable - //ensures that the signals are in acceptance with timing mode and according sets the timing mode - /* - int g=-1, t=-1, rot=-1; - - int i; - - switch (ti) { - case AUTO_TIMING: - timingMode=ti; - // disable all gates/triggers in except if used for master/slave synchronization - for (i=0; i<4; i++) { - if (getFPGASignal(i)>0 && getFPGASignal(i)=0 && t>=0 && rot<0) { - ret=GATE_WITH_START_TRIGGER; - } else if (g<0 && t>=0 && rot<0) { - ret=TRIGGER_EXPOSURE; - } else if (g>=0 && t<0 && rot<0) { - ret=GATE_FIX_NUMBER; - } else if (g<0 && t<0 && rot>0) { - ret=TRIGGER_READOUT; - } else if (g<0 && t<0 && rot<0) { - ret=AUTO_TIMING; - } - - */ - return ret; -} - - - -enum masterFlags setMaster(enum masterFlags arg){ - //template setMaster from firmware_funcs.c - /* - int i; - switch(f) { - case NO_MASTER: - // switch of gates or triggers - masterMode=NO_MASTER; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - setFPGASignal(i,SIGNAL_OFF); - } - } - break; - case IS_MASTER: - // configure gate or trigger out - masterMode=IS_MASTER; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - setFPGASignal(i,SIGNAL_OFF); - break; - case MASTER_GATES: - setFPGASignal(i,GATE_OUT_ACTIVE_HIGH); - break; - case MASTER_TRIGGERS: - setFPGASignal(i,TRIGGER_OUT_RISING_EDGE); - break; - case SLAVE_STARTS_WHEN_MASTER_STOPS: - setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE); - break; - default: - ; - } - } - } - break; - case IS_SLAVE: - // configure gate or trigger in - masterMode=IS_SLAVE; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - setFPGASignal(i,SIGNAL_OFF); - break; - case MASTER_GATES: - setFPGASignal(i,GATE_IN_ACTIVE_HIGH); - break; - case MASTER_TRIGGERS: - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - break; - case SLAVE_STARTS_WHEN_MASTER_STOPS: - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - break; - default: - ; - } - } - } - break; - default: - //do nothing - ; - } - - switch(masterMode) { - case NO_MASTER: - return NO_MASTER; - - - case IS_MASTER: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - return IS_MASTER; - case MASTER_GATES: - if (getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH) - return IS_MASTER; - else - return NO_MASTER; - case MASTER_TRIGGERS: - if (getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE) - return IS_MASTER; - else - return NO_MASTER; - case SLAVE_STARTS_WHEN_MASTER_STOPS: - if (getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE) - return IS_MASTER; - else - return NO_MASTER; - default: - return NO_MASTER; - } - - } - } - - case IS_SLAVE: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - switch (syncMode) { - case NO_SYNCHRONIZATION: - return IS_SLAVE; - case MASTER_GATES: - if (getFPGASignal(i)==GATE_IN_ACTIVE_HIGH) - return IS_SLAVE; - else - return NO_MASTER; - case MASTER_TRIGGERS: - case SLAVE_STARTS_WHEN_MASTER_STOPS: - if (getFPGASignal(i)==TRIGGER_IN_RISING_EDGE) - return IS_SLAVE; - else - return NO_MASTER; - default: - return NO_MASTER; - } - - } - } - - } - */ - - return NO_MASTER; -} - - - -enum synchronizationMode setSynchronization(enum synchronizationMode arg){ - /* - int i; - - switch(s) { - case NO_SYNCHRONIZATION: - syncMode=NO_SYNCHRONIZATION; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - setFPGASignal(i,SIGNAL_OFF); - } - } - break; - // disable external signals? - case MASTER_GATES: - // configure gate in or out - syncMode=MASTER_GATES; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER) - setFPGASignal(i,GATE_OUT_ACTIVE_HIGH); - else if (masterMode==IS_SLAVE) - setFPGASignal(i,GATE_IN_ACTIVE_HIGH); - } - } - - break; - case MASTER_TRIGGERS: - // configure trigger in or out - syncMode=MASTER_TRIGGERS; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER) - setFPGASignal(i,TRIGGER_OUT_RISING_EDGE); - else if (masterMode==IS_SLAVE) - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - } - } - break; - - - case SLAVE_STARTS_WHEN_MASTER_STOPS: - // configure trigger in or out - syncMode=SLAVE_STARTS_WHEN_MASTER_STOPS; - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER) - setFPGASignal(i,RO_TRIGGER_OUT_RISING_EDGE); - else if (masterMode==IS_SLAVE) - setFPGASignal(i,TRIGGER_IN_RISING_EDGE); - } - } - break; - - - default: - //do nothing - ; - } - - switch (syncMode) { - - case NO_SYNCHRONIZATION: - return NO_SYNCHRONIZATION; - - case MASTER_GATES: - - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER && getFPGASignal(i)==GATE_OUT_ACTIVE_HIGH) - return MASTER_GATES; - else if (masterMode==IS_SLAVE && getFPGASignal(i)==GATE_IN_ACTIVE_HIGH) - return MASTER_GATES; - } - } - return NO_SYNCHRONIZATION; - - case MASTER_TRIGGERS: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER && getFPGASignal(i)==TRIGGER_OUT_RISING_EDGE) - return MASTER_TRIGGERS; - else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE) - return MASTER_TRIGGERS; - } - } - return NO_SYNCHRONIZATION; - - case SLAVE_STARTS_WHEN_MASTER_STOPS: - for (i=0; i<4; i++) { - if (signals[i]==MASTER_SLAVE_SYNCHRONIZATION) { - if (masterMode==IS_MASTER && getFPGASignal(i)==RO_TRIGGER_OUT_RISING_EDGE) - return SLAVE_STARTS_WHEN_MASTER_STOPS; - else if (masterMode==IS_SLAVE && getFPGASignal(i)==TRIGGER_IN_RISING_EDGE) - return SLAVE_STARTS_WHEN_MASTER_STOPS; - } - } - return NO_SYNCHRONIZATION; - - default: - return NO_SYNCHRONIZATION; - - } - - - */ - return NO_SYNCHRONIZATION; -} - - - -#endif diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h b/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h index 17c19fbc5..db498ffd2 100644 --- a/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h +++ b/slsDetectorServers/slsDetectorServer/slsDetectorFunctionList.h @@ -15,12 +15,10 @@ Here are the definitions, but the actual implementation should be done for each // basic tests -#if defined(EIGERD) || defined(JUNGFRAUD) || defined(GOTTHARDD) int isFirmwareCheckDone(); int getFirmwareCheckResult(char** mess); -#endif void basictests(); -#if defined(GOTTHARDD) || defined(JUNGFRAUD) +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) int checkType(); u_int32_t testFpga(void); int testBus(void); @@ -28,14 +26,14 @@ int testBus(void); #ifdef GOTTHARDD int detectorTest(enum digitalTestMode arg, int ival); -#elif JUNGFRAUD +#elif defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) int detectorTest(enum digitalTestMode arg); #endif // Ids int64_t getDetectorId(enum idMode arg); u_int64_t getFirmwareVersion(); -#ifdef JUNGFRAUD +#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) u_int64_t getFirmwareAPIVersion(); u_int16_t getHardwareVersionNumber(); u_int16_t getHardwareSerialNumber(); @@ -60,6 +58,11 @@ void getModuleConfiguration(); void allocateDetectorStructureMemory(); #endif void setupDetector(); +#ifdef CHIPTESTBOARDD +int allocateRAM(); +void updateDataBytes(); +int getChannels(); +#endif #if defined(GOTTHARDD) || defined(JUNGFRAUD) int setDefaultDacs(); #endif @@ -80,14 +83,9 @@ uint32_t readRegister16And32(uint32_t offset); // firmware functions (resets) #ifdef JUNGFRAUD -int powerChip (int on); void cleanFifos(); void resetCore(); void resetPeripheral(); -int autoCompDisable(int on); -int adcPhase(int st); -int getPhase(); -void configureASICTimer(); #elif GOTTHARDD void setPhaseShiftOnce(); void setPhaseShift(int numphaseshift); @@ -100,19 +98,24 @@ void setROIADC(int adc); void setGbitReadout(); int readConfigFile(); void setMasterSlaveConfiguration(); +#elif CHIPTESTBOARDD +void cleanFifos(); +void resetCore(); +void resetPeripheral(); #endif // parameters - dr, roi int setDynamicRange(int dr); -#ifdef GOTTHARDD +#if defined(GOTTHARDD) || defined(CHIPTESTBOARDD) ROI* setROI(int n, ROI arg[], int *retvalsize, int *ret); #endif // parameters - readout #ifndef GOTTHARDD -enum speedVariable setSpeed(int val); +void setSpeed(enum speedVariable ind, int val); +int getSpeed(enum speedVariable ind); #endif -#ifdef EIGERD +#if defined(EIGERD) || defined(CHIPTESTBOARDD) enum readOutFlags setReadOutFlags(enum readOutFlags val); #endif @@ -122,16 +125,17 @@ int selectStoragecellStart(int pos); #endif int64_t setTimer(enum timerIndex ind, int64_t val); int64_t getTimeLeft(enum timerIndex ind); -#if defined(JUNGFRAUD) || (GOTTHARDD) +#if defined(JUNGFRAUD) || defined(GOTTHARDD) || defined(CHIPTESTBOARDD) int validateTimer(enum timerIndex ind, int64_t val, int64_t retval); #endif // parameters - module, settings +#ifndef CHIPTESTBOARDD int setModule(sls_detector_module myMod, char* mess); int getModule(sls_detector_module *myMod); enum detectorSettings setSettings(enum detectorSettings sett); enum detectorSettings getSettings(); - +#endif // parameters - threshold #ifdef EIGERD @@ -140,20 +144,42 @@ int setThresholdEnergy(int ev); #endif // parameters - dac, adc, hv -#if defined(GOTTHARDD) || defined(JUNGFRAUD) +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined (CHIPTESTBOARDD) void serializeToSPI(u_int32_t addr, u_int32_t val, u_int32_t csmask, int numbitstosend, u_int32_t clkmask, u_int32_t digoutmask, int digofset); //commonServerFunction.h void initDac(int dacnum); int voltageToDac(int value); int dacToVoltage(unsigned int digital); #endif +#ifdef CHIPTESTBOARDD +int generalVoltageToDac(int value, int vmin, int vmax, int check); +int generalDacToVoltage(unsigned int digital, int vmin, int vmax, int check); +#endif #ifdef GOTTHARDD -extern void setAdc9257(int addr, int val); // AD9257.h extern void setAdc9252(int addr, int val); // AD9252.h (old board) -#elif JUNGFRAUD +#endif +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) extern void setAdc9257(int addr, int val); // AD9257.h #endif +#ifdef CHIPTESTBOARDD +extern int getMaxValidVref(); // AD9257.h +extern void setVrefVoltage(int val) // AD9257.h +#endif void setDAC(enum DACINDEX ind, int val, int mV, int retval[]); +#ifdef CHIPTESTBOARDD +int isVLimitCompliant(int mV); +int getVLimit(); +void setVLimit(int l); +int isVchipValid(int val); +int getVchip(); +void setVchip(int val); +int getVChipToSet(enum DACINDEX ind, int val); +int getDACIndexFromADCIndex(enum ADCINDEX ind); +int getADCIndexFromDACIndex(enum DACINDEX ind); +int isPowerValid(int val); +int getPower(); +void setPower(DACINDEX ind, int val); +#endif /*#ifdef GOTTHARDD void initDAC(int dac_addr, int value); void clearDACSregister(); @@ -162,6 +188,10 @@ void program_one_dac(int addr, int value); u_int32_t putout(char *s); #endif*/ int getADC(enum ADCINDEX ind); +#ifdef CHIPTESTBOARDD +int getVoltage(int idac); +int getCurrent(int idac); +#endif int setHighVoltage(int val); @@ -198,8 +228,41 @@ void loadImage(enum imageType index, short int imageVals[]); int readCounterBlock(int startACQ, short int counterVals[]); int resetCounterBlock(int startACQ); -// jungfrau specific - pll, flashing firmware +// chip test board specific - powerchip, sendudp, pll, flashing firmware +#elif CHIPTESTBOARDD +int powerChip (int on); +int sendUDP(int enable); +void resetPLL(); +void setPllReconfigReg(u_int32_t reg, u_int32_t val); +void configurePhase(CLKINDEX ind, int val); +int getPhase(CLKINDEX ind); +void configureFrequency(CLKINDEX ind, int val); +int getFrequency(CLKINDEX ind); +void configureSyncFrequency(CLKINDEX ind); +void setAdcOffsetRegister(int adc, int val); +void getAdcOffsetRegister(int adc); +extern void eraseFlash(); // programfpga.h +extern int startWritingFPGAprogram(FILE** filefp); // programfpga.h +extern void stopWritingFPGAprogram(FILE* filefp); // programfpga.h +extern int writeFPGAProgram(char* fpgasrc, size_t fsize, FILE* filefp); // programfpga.h +// ctb patterns +uint64_t writePatternIOControl(uint64_t word); +uint64_t writePatternClkControl(uint64_t word); +uint64_t readPatternWord(int addr); +uint64_t writePatternWord(int addr, uint64_t word); +int setPatternWaitAddress(int level, int addr); +uint64_t setPatternWaitTime(int level, uint64_t t); +void setPatternLoop(int level, int *startAddr, int *stopAddr, int *nLoop); + +// jungfrau specific - powerchip, autocompdisable, clockdiv, asictimer, clock, pll, flashing firmware #elif JUNGFRAUD +int powerChip (int on); +int autoCompDisable(int on); +void configureASICTimer(); +int setClockDivider(int val); +int getClockDivider(); +int setAdcPhase(int st); +int getPhase(); void resetPLL(); u_int32_t setPllReconfigReg(u_int32_t reg, u_int32_t val); void configurePll(); @@ -230,6 +293,7 @@ int getAllTrimbits(); int getBebFPGATemp(); int activate(int enable); #endif + #if defined(JUNGFRAUD) || defined(EIGERD) int setNetworkParameter(enum NETWORKINDEX mode, int value); #endif @@ -254,6 +318,12 @@ int startReadOut(); #endif enum runStatus getRunStatus(); void readFrame(int *ret, char *mess); +#ifdef CHIPTESTBOARDD +void unsetFifoReadStrobes(); +void readSample(); +int checkDataPresent(); +int readFrameFromFifo(); +#endif #if defined(GOTTHARDD) || defined(JUNGFRAUD) u_int32_t runBusy(); #endif diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorServer.c b/slsDetectorServers/slsDetectorServer/slsDetectorServer.c index a13fe1c0a..9d0639af9 100755 --- a/slsDetectorServers/slsDetectorServer/slsDetectorServer.c +++ b/slsDetectorServers/slsDetectorServer/slsDetectorServer.c @@ -63,7 +63,7 @@ int main(int argc, char *argv[]){ FILE_LOG(logINFO, ("Detected phase shift of %d\n", phaseShift)); } #endif -#ifdef JUNGFRAUD +#if defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) else if(!strcasecmp(argv[i],"-update")){ FILE_LOG(logINFO, ("Detected update mode\n")); debugflag = PROGRAMMING_MODE; diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorServer_defs.h b/slsDetectorServers/slsDetectorServer/slsDetectorServer_defs.h deleted file mode 100644 index 02e45004a..000000000 --- a/slsDetectorServers/slsDetectorServer/slsDetectorServer_defs.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * slsDetectorServer_defs.h - * - * Created on: Jan 24, 2013 - * Author: l_maliakal_d - */ - -#ifndef SLSDETECTORSERVER_DEFS_H_ -#define SLSDETECTORSERVER_DEFS_H_ - -#include "sls_detector_defs.h" -#include - -/** This is only an example file!!! */ - -/* -#define GOODBYE (-200) -enum DAC_INDEX {examplesdac} - - Hardware Definitions -#define NMAXMOD (1) -#define NMOD (1) -#define NCHAN (256 * 256) -#define NCHIP (4) -#define NADC (0) -#define NDAC (16) -#define NGAIN (0) -#define NOFFSET (0) -*/ - -#endif /* SLSDETECTORSERVER_DEFS_H_ */ diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c b/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c index 7687ff510..765f7e433 100755 --- a/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c +++ b/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.c @@ -14,6 +14,8 @@ const enum detectorType myDetectorType = GOTTHARD; const enum detectorType myDetectorType = EIGER; #elif JUNGFRAUD const enum detectorType myDetectorType = JUNGFRAU; +#elif CHIPTESTBOARDD +const enum detectorType myDetectorType = CHIPTESTBOARD; #else const enum detectorType myDetectorType = GENERIC; #endif @@ -31,6 +33,11 @@ extern char mess[MAX_STR_LENGTH]; // Variables that will be exported int sockfd = 0; int debugflag = 0; +#ifdef CHIPTESTBOARDD +int dataBytes = 0; +uint16_t *ramValues = 0; +int nframes = 0; +#endif // Local variables int (*flist[NUM_DET_FUNCTIONS])(int); @@ -110,6 +117,42 @@ int decode_function(int file_des) { return ret; } +const char* getTimerName(enum timerIndex ind) { + switch (ind) { + case FRAME_NUMBER: return "frame_number"; + case ACQUISITION_TIME: return "acquisition_time"; + case FRAME_PERIOD: return "frame_period"; + case DELAY_AFTER_TRIGGER: return "delay_after_trigger"; + case GATES_NUMBER: return "gates_number"; + case CYCLES_NUMBER: return "cycles_number"; + case ACTUAL_TIME: return "actual_time"; + case MEASUREMENT_TIME: return "measurement_time"; + case PROGRESS: return "progress"; + case MEASUREMENTS_NUMBER: return "measurements_number"; + case FRAMES_FROM_START: return "frames_from_start"; + case FRAMES_FROM_START_PG: return "frames_from_start_pg"; + case SAMPLES_JCTB: return "samples_jctb"; + case SUBFRAME_ACQUISITION_TIME: return "subframe_acquisition_time"; + case SUBFRAME_DEADTIME: return "subframe_deadtime"; + case STORAGE_CELL_NUMBER: return "storage_cell_number"; + default: return "unknown_timer"; + } +} + +const char* getSpeedName(enum speedVariable ind) { + switch (ind) { + case CLOCK_DIVIDER: return "clock_divider"; + case PHASE_SHIFT: return "phase_shift"; + case OVERSAMPLING: return "oversampling"; + case ADC_CLOCK: return "adc_clock"; + case ADC_PHASE: return "adc_phase"; + case ADC_PIPELINE: return "adc_pipeline"; + case DBIT_CLOCK: return "dbit_clock"; + case DBIT_PHASE: return "dbit_phase"; + case DBIT_PIPELINE: return "dbit_pipeline"; + default: return "unknown_speed"; + } +} const char* getFunctionName(enum detFuncs func) { switch (func) { @@ -538,12 +581,6 @@ int set_dac(int file_des) { enum DACINDEX serverDacIndex = 0; // check if dac exists for this detector -#ifdef JUNGFRAUD - if ((ind != HV_NEW) && (ind >= NDAC_OLDBOARD)) { //for compatibility with old board - modeNotImplemented("Dac Index", (int)ind); - } else - serverDacIndex = ind; -#else switch (ind) { #ifdef GOTTHARDD case G_VREF_DS : @@ -570,72 +607,104 @@ int set_dac(int file_des) { case G_IB_TESTC: serverDacIndex = IB_TESTC; break; - case HV_POT: - break; + case HIGH_VOLTAGE: + break; #elif EIGERD case TRIMBIT_SIZE: - serverDacIndex = VTR; + serverDacIndex = VTR; break; case THRESHOLD: - serverDacIndex = VTHRESHOLD; + serverDacIndex = VTHRESHOLD; break; case E_SvP: - serverDacIndex = SVP; + serverDacIndex = SVP; break; case E_SvN: - serverDacIndex = SVN; + serverDacIndex = SVN; break; case E_Vtr: - serverDacIndex = VTR; + serverDacIndex = VTR; break; case E_Vrf: - serverDacIndex = VRF; + serverDacIndex = VRF; break; case E_Vrs: - serverDacIndex = VRS; + serverDacIndex = VRS; break; case E_Vtgstv: - serverDacIndex = VTGSTV; + serverDacIndex = VTGSTV; break; case E_Vcmp_ll: - serverDacIndex = VCMP_LL; + serverDacIndex = VCMP_LL; break; case E_Vcmp_lr: - serverDacIndex = VCMP_LR; + serverDacIndex = VCMP_LR; break; case E_cal: - serverDacIndex = CAL; + serverDacIndex = CAL; break; case E_Vcmp_rl: - serverDacIndex = VCMP_RL; + serverDacIndex = VCMP_RL; break; case E_Vcmp_rr: - serverDacIndex = VCMP_RR; + serverDacIndex = VCMP_RR; break; case E_rxb_rb: - serverDacIndex = RXB_RB; + serverDacIndex = RXB_RB; break; case E_rxb_lb: - serverDacIndex = RXB_LB; + serverDacIndex = RXB_LB; break; case E_Vcp: - serverDacIndex = VCP; + serverDacIndex = VCP; break; case E_Vcn: - serverDacIndex = VCN; + serverDacIndex = VCN; break; case E_Vis: - serverDacIndex = VIS; + serverDacIndex = VIS; break; - case HV_NEW: + case HIGH_VOLTAGE: case IO_DELAY: break; +#elif CHIPTESTBOARDD + case ADC_VPP: + case HIGH_VOLTAGE: + break; + case V_POWER_A: + serverDacIndex = D_PWR_A; + break; + case V_POWER_B: + serverDacIndex = D_PWR_B; + break; + case V_POWER_C: + serverDacIndex = D_PWR_C; + break; + case V_POWER_D: + serverDacIndex = D_PWR_D; + break; + case V_POWER_IO: + serverDacIndex = D_PWR_IO; + break; + case V_POWER_CHIP: + serverDacIndex = D_PWR_CHIP; + break; #endif default: - modeNotImplemented("Dac Index", (int)ind); +#ifdef JUNGFRAUD + if ((ind == HIGH_VOLTAGE) || (ind < NDAC_OLDBOARD)) { //for compatibility with old board + serverDacIndex = ind; + break; + } +#elif CHIPTESTBOARDD + if (ind < NDAC_ONLY) { + serverDacIndex = ind; + break; + } +#endif + modeNotImplemented("Dac Index", (int)ind); break; } -#endif // index exists if (ret == OK) { @@ -644,9 +713,23 @@ int set_dac(int file_des) { (mV ? "mV" : "dac units"))); // set & get - if ((val == -1) || ((val != -1) && (Server_VerifyLock() == OK))) { + if ((val == -1) || (Server_VerifyLock() == OK)) { switch(ind) { + // adc vpp +#ifdef CHIPTESTBOARDD + case ADC_VPP: + if (val < 0 || val > getMaxValidVref()) { + ret = FAIL; + strcpy(mess,"Could not set dac. Adc Vpp value should be between 0 and %d\n", maxValidVref()); + FILE_LOG(logERROR,(mess)); + } else { + setVrefVoltage(val); + retval = val; // cannot read + } + break; +#endif + // io delay #ifdef EIGERD case IO_DELAY: @@ -657,10 +740,12 @@ int set_dac(int file_des) { #endif // high voltage - case HV_POT: - case HV_NEW: + case HIGH_VOLTAGE: retval[0] = setHighVoltage(val); FILE_LOG(logDEBUG1, ("High Voltage: %d\n", retval[0])); +#if defined(JUNGFRAUD) || defined (CHIPTESTBOARDD) + validate(val, retval[0], "set high voltage", DEC); +#endif #ifdef GOTTHARDD if (retval[0] == -1) { ret = FAIL; @@ -685,9 +770,90 @@ int set_dac(int file_des) { #endif break; + // power, vlimit +#ifdef CHIPTESTBOARDD + case V_POWER_A: + case V_POWER_B: + case V_POWER_C: + case V_POWER_D: + case V_POWER_IO: + if (!mV) { + ret = FAIL; + sprintf(mess,"Could not set power. Power regulator %d should be in mV and not dac units.\n", ind); + FILE_LOG(logERROR,(mess)); + } else if (checkVLimitCompliant() == FAIL) { + ret = FAIL; + sprintf(mess,"Could not set power. Power regulator %d exceeds voltage limit %d.\n", ind, getVLimit()); + FILE_LOG(logERROR,(mess)); + } else if (!isPowerValid(val)) { + ret = FAIL; + sprintf(mess,"Could not set power. Power regulator %d should be between %d and %d mV\n", POWER_RGLTR_MIN, POWER_RGLTR_MAX); + FILE_LOG(logERROR,(mess)); + } else { + if (val != -1) + setPower(serverDacIndex, val); + retval[0] = getPower(serverDacIndex); + FILE_LOG(logDEBUG1, ("Power regulator(%d): %d\n", ind, retval[0])); + validate(val, retval[0], "set power regulator", DEC); + } + break; + + case V_POWER_CHIP: + if (!mV) { + ret = FAIL; + sprintf(mess,"Could not set Vchip. Should be in mV and not dac units.\n"); + FILE_LOG(logERROR,(mess)); + } else if (!isVchipValid(val)) { + ret = FAIL; + sprintf(mess,"Could not set Vchip. Should be between %d and %d mV\n", VCHIP_MIN_MV, VCHIP_MAX_MV); + FILE_LOG(logERROR,(mess)); + } else { + if (val >= 0) // not letting user set to -100, it will affect setting + setVchip(val); + retval[0] = getVchip(); + FILE_LOG(logDEBUG1, ("Vchip: %d\n", retval[0])); + validate(val, retval[0], "set vchip", DEC); + } + break; + + case VLIMIT: + if (!mV) { + ret = FAIL; + strcpy(mess,"Could not set power. VLimit should be in mV and not dac units.\n"); + FILE_LOG(logERROR,(mess)); + } else { + if (val >= 0) + setVLimit(val); + retval[0] = getVLimit(); + FILE_LOG(logDEBUG1, ("VLimit: %d\n", retval[0])); + validate(val, retval[0], "set vlimit", DEC); + } + break; +#endif + // dacs default: - setDAC(serverDacIndex, val, mV, retval); + if (mV && val > MAX_DAC_VOLTAGE_VALUE) { + ret = FAIL; + sprintf(mess,"Could not set dac %d to value %d. Allowed limits (0 - %d mV).\n", ind, val, MAX_DAC_VOLTAGE_VALUE); + FILE_LOG(logERROR,(mess)); + } else if (!mV && val > MAX_DAC_UNIT_VALUE ) { + ret = FAIL; + sprintf(mess,"Could not set dac %d to value %d. Allowed limits (0 - %d dac units).\n", ind, val, MAX_DAC_UNIT_VALUE); + FILE_LOG(logERROR,(mess)); + } else { +#ifdef CHIPTESTBOARDD + if ((mV && checkVLimitCompliant() == FAIL) || + (!mv && checkVLimitCompliant(dacToVoltage(val)) == FAIL)) { + ret = FAIL; + sprintf(mess,"Could not set dac %d to value %d. " + "Exceeds voltage limit %d.\n", + ind, (mV ? val : dacToVoltage(val)), getVLimit()); + FILE_LOG(logERROR,(mess)); + } else +#endif + setDAC(serverDacIndex, val, mV, retval); + } #ifdef EIGERD if (val != -1) { //changing dac changes settings to undefined @@ -779,8 +945,44 @@ int get_adc(int file_des) { case TEMPERATURE_FPGA3: serverAdcIndex = TEMP_FPGAFEBR; break; +#elif CHIPTESTBOARDD + case V_POWER_A: + serverAdcIndex = V_PWR_A; + break; + case V_POWER_B: + serverAdcIndex = V_PWR_B; + break; + case V_POWER_C: + serverAdcIndex = V_PWR_C; + break; + case V_POWER_D: + serverAdcIndex = V_PWR_D; + break; + case V_POWER_IO: + serverAdcIndex = V_PWR_IO; + break; + case I_POWER_A: + serverAdcIndex = I_PWR_A; + break; + case I_POWER_B: + serverAdcIndex = I_PWR_B; + break; + case I_POWER_C: + serverAdcIndex = I_PWR_C; + break; + case I_POWER_D: + serverAdcIndex = I_PWR_D; + break; + case I_POWER_IO: + serverAdcIndex = I_PWR_IO; + break; #endif default: +#ifdef CHIPTESTBOARDD + if (ind >= SLOW_ADC_START_INDEX && ind <= SLOW_ADC_END_INDEX) { + break; + } +#endif modeNotImplemented("Adc Index", (int)ind); break; } @@ -862,6 +1064,10 @@ int set_module(int file_des) { memset(mess, 0, sizeof(mess)); enum detectorSettings retval = -1; +#ifdef CHIPTESTBOARDD + functionNotImplemented(); +#else + sls_detector_module module; int *myDac = NULL; int *myChan = NULL; @@ -959,6 +1165,8 @@ int set_module(int file_des) { } if (myChan != NULL) free(myChan); if (myDac != NULL) free(myDac); +#endif + return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); } @@ -985,6 +1193,10 @@ int get_module(int file_des) { } else module.dacs = myDac; +#ifdef CHIPTESTBOARDD + functionNotImplemented(); +#endif + #ifdef EIGERD // allocate chans if (ret == OK) { @@ -1034,10 +1246,14 @@ int set_settings(int file_des) { if (receiveData(file_des, &isett, sizeof(isett), INT32) < 0) return printSocketReadError(); + +#ifdef CHIPTESTBOARDD + functionNotImplemented(); +#else FILE_LOG(logDEBUG1, ("Setting settings %d\n", isett)); //set & get - if ((isett == GET_SETTINGS) || ((isett != GET_SETTINGS) && (Server_VerifyLock() == OK))) { + if ((isett == GET_SETTINGS) || (Server_VerifyLock() == OK)) { // check index switch(isett) { @@ -1083,6 +1299,8 @@ int set_settings(int file_des) { #endif } } +#endif + return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); } @@ -1229,6 +1447,35 @@ int read_all(int file_des) { FILE_LOG(logDEBUG1, ("Reading all frames\n")); // only set if (Server_VerifyLock() == OK) { +#ifdef CHIPTESTBOARDD + // read from fifo enabled + if (!sendUDP(-1)) { + nframes = 0; + + // keep reading frames + while(readFrameFromFifo() == OK) { + // (to the receiver) + Server_SendResult(file_des, INT32, NO_UPDATE, ramValues, dataBytes);// (or get as arg first)send number of bytes (dataBytes) first //FIXME + FILE_LOG(logDEBUG1, "Frame %d sent\n", nframes); + ++nframes; + } + + // finished readng frames + // frames left to give status + int64_t retval = getTimeLeft(FRAME_NUMBER) + 2; + if ( retval > 1) { + ret = FAIL; + sprintf(mess,"No data and run stopped: %lld frames left\n",(long long int)retval); + FILE_LOG(logERROR, (mess)); + } else { + ret = OK; // send number of bytes (8) first to acknowledge finish of acquisition //FIXME + FILE_LOG(logINFOGREEN, ("Acquisition successfully finished\n")); + } + Server_SendResult(file_des, INT32, UPDATE, NULL, 0); // to the client + } + // read from receiver + else +#endif readFrame(&ret, mess); } return Server_SendResult(file_des, INT32, UPDATE, NULL, 0); @@ -1249,21 +1496,26 @@ int set_timer(int file_des) { return printSocketReadError(); enum timerIndex ind = (int)args[0]; int64_t tns = args[1]; + char timerName[20] = {0}; + strcpy(timerName, getTimerName(ind)); #ifdef EIGERD int64_t subexptime = 0; #endif - FILE_LOG(logDEBUG1, ("Setting timer index %d to %lld ns\n", ind, tns)); + FILE_LOG(logDEBUG1, ("Setting timer %s(%d) to %lld ns\n", ind, timerName, tns)); // set & get - if ((tns == -1) || ((tns != -1) && (Server_VerifyLock() == OK))) { + if ((tns == -1) || (Server_VerifyLock() == OK)) { // check index switch (ind) { case FRAME_NUMBER: +#ifndef CHIPTESTBOARDD case ACQUISITION_TIME: +#endif case FRAME_PERIOD: case CYCLES_NUMBER: -#if defined(GOTTHARDD) || defined(JUNGFRAUD) + case SAMPLES_JCTB: +#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(CHIPTESTBOARDD) case DELAY_AFTER_TRIGGER: #endif retval = setTimer(ind, tns); @@ -1305,20 +1557,30 @@ int set_timer(int file_des) { break; #endif default: - modeNotImplemented("Timer index", (int)ind); + modeNotImplemented(timerName, (int)ind); break; } // validate + sprintf(timerName, "set %s", timerName); #ifdef EIGERD - validate64(tns, retval, "set timer", DEC); // copied to server, not read from detector register + validate64(tns, retval, timerName, DEC); // copied to server, not read from detector register #else switch(ind) { case FRAME_NUMBER: case CYCLES_NUMBER: case STORAGE_CELL_NUMBER: - validate64(tns, retval, "set timer", DEC); // no conversion, so all good + validate64(tns, retval, timerName, DEC); // no conversion, so all good break; + case SAMPLES_JCTB: + if (retval == -1) { + ret = FAIL; + retval = setTimer(ind, -1); + sprintf(mess, "Could not set samples to %lld. Could not allocate RAM\n", + (long long unsigned int)tns); + FILE_LOG(logERROR,(mess)); + } else + validate64(tns, retval, timerName, DEC); // no conversion, so all good case ACQUISITION_TIME: case FRAME_PERIOD: case DELAY_AFTER_TRIGGER: @@ -1327,11 +1589,12 @@ int set_timer(int file_des) { // losing precision due to conversion to clock (also gotthard master delay is different) if (validateTimer(ind, tns, retval) == FAIL) { ret = FAIL; - sprintf(mess, "Could not set timer. Set %lld, but read %lld\n", + sprintf(mess, "Could not %s. Set %lld, but read %lld\n", timerName, (long long unsigned int)tns, (long long unsigned int)retval); FILE_LOG(logERROR,(mess)); } break; + default: break; } @@ -1378,10 +1641,21 @@ int get_time_left(int file_des) { case FRAMES_FROM_START_PG: case ACTUAL_TIME: case MEASUREMENT_TIME: + case FRAME_NUMBER: + case FRAME_PERIOD: + case DELAY_AFTER_TRIGGER: + case CYCLES_NUMBER: #elif GOTTHARDD case ACQUISITION_TIME: -#endif -#if defined(GOTTHARDD) || defined(JUNGFRAUD) + case FRAME_NUMBER: + case FRAME_PERIOD: + case DELAY_AFTER_TRIGGER: + case CYCLES_NUMBER: +#elif CHIPTESTBOARDD + case FRAMES_FROM_START: + case FRAMES_FROM_START_PG: + case ACTUAL_TIME: + case MEASUREMENT_TIME: case FRAME_NUMBER: case FRAME_PERIOD: case DELAY_AFTER_TRIGGER: @@ -1414,7 +1688,7 @@ int set_dynamic_range(int file_des) { FILE_LOG(logDEBUG1, ("Setting dr to %d\n", dr)); // set & get - if ((dr == -1) || ((dr != -1) && (Server_VerifyLock() == OK))) { + if ((dr == -1) || (Server_VerifyLock() == OK)) { #ifdef EIGERD int old_dr = setDynamicRange(-1); @@ -1480,7 +1754,7 @@ int set_readout_flags(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == GET_READOUT_FLAGS) || ((arg != GET_READOUT_FLAGS) && (Server_VerifyLock() == OK))) { + if ((arg == GET_READOUT_FLAGS) || (Server_VerifyLock() == OK)) { switch(arg) { case STORE_IN_RAM: @@ -1493,6 +1767,13 @@ int set_readout_flags(int file_des) { retval = setReadOutFlags(arg); FILE_LOG(logDEBUG1, ("Read out flags: 0x%x\n", retval)); validate((int)arg, (int)(retval & arg), "set readout flag", HEX); +#ifdef CHIPTESTBOARDD + if (retval == -2) { + ret = FAIL; + sprintf(mess, "Readout Flags failed. Cannot allocate RAM\n"); + FILE_LOG(logERROR,(mess)); + } +#endif break; default: modeNotImplemented("Read out flag index", (int)arg); @@ -1542,20 +1823,26 @@ int set_roi(int file_des) { } } -#ifndef GOTTHARDD +#if !defined(GOTTHARDD) || !defined(CHIPTESTBOARDD) functionNotImplemented(); #else // set & get - if ((narg == GET_READOUT_FLAGS) || ((narg != GET_READOUT_FLAGS) && (Server_VerifyLock() == OK))) { - if (narg > 1) { + if ((narg == GET_READOUT_FLAGS) || (Server_VerifyLock() == OK)) { + if (myDetectorType == GOTTHARDD && narg > 1) { ret = FAIL; strcpy(mess,"Can not set more than one ROI per module.\n"); FILE_LOG(logERROR,(mess)); } else { retval = setROI(narg, arg, &nretval, &ret); if (ret == FAIL) { - sprintf(mess,"Could not set all roi. " - "Set %d rois, but read %d rois\n", narg, nretval); + if (nretval == -1) // chip test board + sprintf(mess,"Could not set ROI. Max ROI level (100) reached!\n"); + else if (nretval == -2) + sprintf(mess, "Could not set ROI. Could not allocate RAM\n", + (long long unsigned int)tns); + else + sprintf(mess,"Could not set all roi. " + "Set %d rois, but read %d rois\n", narg, nretval); FILE_LOG(logERROR,(mess)); } FILE_LOG(logDEBUG1, ("nRois: %d\n", nretval)); @@ -1598,31 +1885,52 @@ int set_speed(int file_des) { #else enum speedVariable ind = args[0]; int val = args[1]; - FILE_LOG(logDEBUG1, ("Setting speed index %d to %d\n", ind, val)); + int GET_VAL = -1; + if ((ind == PHASESHIFT) || (val == ADC_PHASE) || (val == DBIT_PHASE)) + GET_VAL = 100000; - // set & get - if ((val == -1) || ((val != -1) && (Server_VerifyLock() == OK))) { - // check index - switch(ind) { + char speedName[20] = {0}; + strcpy(speedName, getSpeedName(ind)); + FILE_LOG(logDEBUG1, ("Setting speed index %s (%d) to %d\n", speedName, ind, val)); + + // check index + switch(ind) { #ifdef JUNGFRAUD - case ADC_PHASE: - retval = adcPhase(val); - FILE_LOG(logDEBUG1, ("ADc Phase: %d\n", retval)); - if (val != 100000) { - validate(val, retval, "set adc phase ", DEC); - } - break; + case ADC_PHASE: +#elif CHIPTESTBOARDD + case ADC_PHASE: + case PHASE_SHIFT: + case DBIT_PHASE: + case ADC_CLOCK: + case DBIT_CLOCK: + case ADC_PIPELINE: + case DBIT_PIPELINE: #endif - case CLOCK_DIVIDER: - retval = setSpeed(val); - FILE_LOG(logDEBUG1, ("Clock: %d\n", retval)); - validate(val, retval, "set clock ", DEC); - break; - default: - modeNotImplemented("Speed index", (int)ind); - break; - } - } + case CLOCK_DIVIDER: + break; + default: + modeNotImplemented(speedName, (int)ind); + break; + } + + if (ret == OK) { + // set + if ((val != GET_VAL) && (Server_VerifyLock() == OK)) + setSpeed(ind, val); + // get + retval = getSpeed(ind); + FILE_LOG(logDEBUG1, ("%s: %d\n", speedName, retval)); + // validate + if (GET_VAL == -1) { + char validateName[20] = {0}; + sprintf(validateName, "set %s", speedName); + validate(val, retval, validateName, DEC); + } else if (ret == OK && val != GET_VAL && retval != val ) { + ret = FAIL; + sprintf(mess, "Could not set %s. Set %d, but read %d\n", speedName, val, retval); + FILE_LOG(logERROR,(mess)); + } + } #endif return Server_SendResult(file_des, INT32, UPDATE, &retval, sizeof(retval)); @@ -2080,7 +2388,7 @@ int enable_ten_giga(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { retval = enableTenGigabitEthernet(arg); FILE_LOG(logDEBUG1, ("10GbE: %d\n", retval)); validate(arg, retval, "enable/disable 10GbE", DEC); @@ -2127,7 +2435,208 @@ int set_all_trimbits(int file_des) { int set_ctb_pattern(int file_des) { ret = OK; memset(mess, 0, sizeof(mess)); + int retval32 = -1; + int64_t retval64 = -1; + int retvals[3] = {-1, -1, -1}; + + int mode = -1; + // mode 0: control or word + int addr = -1; + uint64_t word = -1; + // mode 1: pattern loop + int loopLevel = -1; + int startAddr = -1; + int stopAddr = -1; + int numLoops = -1; + // mode 2: wait address + // mode 3: wait time + uint64_t timeval = -1; + // mode 4: set word + uint64_t pattern[MAX_PATTERN_LENGTH] = {0}; + + if (receiveData(file_des, &mode, sizeof(mode), INT32) < 0) + return printSocketReadError(); + switch (mode) { + case 0:// control or word + if (receiveData(file_des, &addr, sizeof(addr), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &word, sizeof(word), INT64) < 0) + return printSocketReadError(); + break; + case 1:// pattern loop + if (receiveData(file_des, &loopLevel, sizeof(loopLevel), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &startAddr, sizeof(startAddr), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &stopAddr, sizeof(stopAddr), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &numLoops, sizeof(numLoops), INT32) < 0) + return printSocketReadError(); + break; + case 2: // wait address + if (receiveData(file_des, &loopLevel, sizeof(loopLevel), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &addr, sizeof(addr), INT32) < 0) + return printSocketReadError(); + break; + case 3:// wait time + if (receiveData(file_des, &loopLevel, sizeof(loopLevel), INT32) < 0) + return printSocketReadError(); + if (receiveData(file_des, &t, sizeof(t), INT32) < 0) + return printSocketReadError(); + case 4:// set word + if (receiveData(file_des, &pattern, sizeof(pattern), INT64) < 0) + return printSocketReadError(); + break; + default: + break; + } + +#ifndef CHIPTESTBOARDD functionNotImplemented(); +#else + FILE_LOG(logDEBUG1, ("Setting Pattern: mode %d\n", mode)); + char tempName[100]; + memset(tempName, 0, 100); + int failCount = 0; + + switch (mode) { + + case 0: + // control or word + if ((word == -1) || (Server_VerifyLock() == OK)) { + + // address for set word should be valid (if not -1 or -2, it goes to setword) + if (addr < -2 || addr > MAX_PATTERN_LENGTH) { + ret = FAIL; + sprintf(mess, "Cannot set Pattern (Word, addr:%d). Addr must be less than %d\n", + addr, MAX_PATTERN_LENGTH); + FILE_LOG(logERROR, (mess)); + } else { + switch (addr) { + case -1: + strcpy(tempName, "Pattern (I/O Control Register)"); + FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word)); + retval64 = writePatternIOControl(word); + break; + case -2: + strcpy(tempName, "Pattern (Clock Control Register)"); + FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word)); + retval64 = writePatternClkControl(word); + break; + default: + sprintf(tempName, "Pattern (Word, addr:0x%x)", addr); + FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) word)); + retval64 = writePatternWord(word); + break; + } + FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64)); + validate64(word, retval64, tempName, HEX); + } + } + return Server_SendResult(file_des, INT64, UPDATE, retval64, sizeof(retval64); + + + // pattern loop + case 1: + if (loopLevel < -1 || loopLevel > 2) { // -1 complete pattern + modeNotImplemented("Pattern (Pattern Loop) Level", loopLevel); + } + + // level 0-2, addr upto patternlength + 1 + else if ((level != -1) && (startAddr > (MAX_PATTERN_LENGTH + 1) || stopAddr > (MAX_PATTERN_LENGTH + 1))) { + ret = FAIL; + sprintf(mess, "Cannot set Pattern (Pattern Loop, level:%d, addr:%d). Addr must be less than %d\n", + level, addr, MAX_PATTERN_LENGTH + 1); + FILE_LOG(logERROR, (mess)); + } + + //level -1, addr upto patternlength + else if ((level == -1) && (startAddr > MAX_PATTERN_LENGTH || stopAddr > MAX_PATTERN_LENGTH)) { + ret = FAIL; + sprintf(mess, "Cannot set Pattern (Pattern Loop, complete pattern, addr:%d). Addr must be less than %d\n", + addr, MAX_PATTERN_LENGTH); + FILE_LOG(logERROR, (mess)); + } + + else if ((startAddr == -1 && stopAddr == -1 && numLoops == -1) || (Server_VerifyLock() == OK)) { + setPatternLoop(loopLevel, &startAddr, &stopAddr, &numLoops); + } + retval[0] = startAddr; + retval[1] = stopAddr; + retval[2] = numLoops; + return Server_SendResult(file_des, INT32, UPDATE, retvals, sizeof(retvals); + + + case 2: + // wait address + if ((addr == -1) || (Server_VerifyLock() == OK)) { + if (loopLevel < 0 || loopLevel > 2) { + modeNotImplemented("Pattern (Wait Address) Level", loopLevel); + } else if (addr > (MAX_PATTERN_LENGTH + 1)) { + ret = FAIL; + sprintf(mess, "Cannot set Pattern (Wait Address, addr:%d). Addr must be less than %d\n", + addr, MAX_PATTERN_LENGTH + 1); + FILE_LOG(logERROR, (mess)); + } else { + sprintf(tempName, "Pattern (Wait Address, Level:%d)", loopLevel); + FILE_LOG(logDEBUG1, ("Setting %s to 0x%x\n", tempName, addr)); + retval32 = setPatternWaitAddress(loopLevel, addr); + FILE_LOG(logDEBUG1, ("%s: 0x%x\n", tempName, retval32)); + validate(addr, retval32, tempName, HEX); + } + } + return Server_SendResult(file_des, INT32, UPDATE, retval32, sizeof(retval32); + + + case 3: + // wait time + if ((timeval == -1) || (Server_VerifyLock() == OK)) { + if (loopLevel < 0 || loopLevel > 2) { + modeNotImplemented("Pattern (Wait Time) Level", loopLevel); + } else { + sprintf(tempName, "Pattern (Wait Time, Level:%d)", loopLevel); + FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int)timeval)); + retval64 = setPatternWaitTime(loopLevel, timeval); + FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64)); + validate64(timeval, retval64, tempName, HEX); + } + } + return Server_SendResult(file_des, INT64, UPDATE, retval64, sizeof(retval64); + + + case 4: + // set word array(set only) + if (Server_VerifyLock() == OK) { + FILE_LOG(logDEBUG1, ("Setting Pattern (Word Array)\n")); + failCount = 0; + int iaddr = 0; // if warning change to addr // FIXME + for (iaddr = 0; iaddr < MAX_PATTERN_LENGTH; ++iaddr) { + sprintf(tempName, "Pattern (Word Array, addr:%d)", iaddr); + FILE_LOG(logDEBUG1, ("Setting %s to 0x%llx\n", tempName, (long long int) pattern[iaddr])); + retval64 = writePatternWord(iaddr, pattern[iaddr]);//FIXME: earlier was word, but makes no sense (random value) + FILE_LOG(logDEBUG1, ("%s: 0x%llx\n", tempName, (long long int)retval64)); + validate64(pattern[iaddr], retval64, tempName, HEX); + if (ret == FAIL) { + ++failCount; + ret = OK; + } + } + if (failCount) { + ret = FAIL; + sprintf(mess, "Could not set Pattern (Word Array) %d addresses.\n", failCount); + FILE_LOG(logERROR,(mess)); + } + } + return Server_SendResult(file_des, INT64, UPDATE, NULL, 0); + + + default: + modeNotImplemented("Pattern mode index", mode); + break; + } + +#endif return Server_SendResult(file_des, INT32, UPDATE, NULL, 0); } @@ -2364,7 +2873,7 @@ int set_network_parameter(int file_des) { enum NETWORKINDEX serverIndex = 0; // set & get - if ((value == -1) || ((value != -1) && (Server_VerifyLock() == OK))) { + if ((value == -1) || (Server_VerifyLock() == OK)) { // check index switch (mode) { #ifdef EIGERD @@ -2572,7 +3081,7 @@ int power_chip(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { retval = powerChip(arg); FILE_LOG(logDEBUG1, ("Power chip: %d\n", retval)); validate(arg, retval, "power on/off chip", DEC); @@ -2605,7 +3114,7 @@ int set_activate(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { retval = activate(arg); FILE_LOG(logDEBUG1, ("Activate: %d\n", retval)); validate(arg, retval, "set activate", DEC); @@ -2655,7 +3164,7 @@ int threshold_temp(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { if (arg > MAX_THRESHOLD_TEMP_VAL) { ret = FAIL; sprintf(mess,"Threshold Temp %d should be in range: 0 - %d\n", @@ -2689,7 +3198,7 @@ int temp_control(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { retval = setTemperatureControl(arg); FILE_LOG(logDEBUG1, ("Temperature control: %d\n", retval)); validate(arg, retval, "set temperature control", DEC); @@ -2715,7 +3224,7 @@ int temp_event(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { retval = setTemperatureEvent(arg); FILE_LOG(logDEBUG1, ("Temperature event: %d\n", retval)); validate(arg, retval, "set temperature event", DEC); @@ -2742,7 +3251,7 @@ int auto_comp_disable(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { retval = autoCompDisable(arg); FILE_LOG(logDEBUG1, ("Auto comp disable: %d\n", retval)); validate(arg, retval, "set auto comp disable", DEC); @@ -2769,7 +3278,7 @@ int storage_cell_start(int file_des) { functionNotImplemented(); #else // set & get - if ((arg == -1) || ((arg != -1) && (Server_VerifyLock() == OK))) { + if ((arg == -1) || (Server_VerifyLock() == OK)) { if (arg > MAX_STORAGE_CELL_VAL) { ret = FAIL; strcpy(mess,"Max Storage cell number should not exceed 15\n"); diff --git a/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.h b/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.h index 580e86c19..dcf6a8b99 100755 --- a/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.h +++ b/slsDetectorServers/slsDetectorServer/slsDetectorServer_funcs.h @@ -7,6 +7,8 @@ enum numberMode {DEC, HEX}; int printSocketReadError(); void init_detector(); int decode_function(int); +const char* getTimerName(enum timerIndex ind); +const char* getSpeedName(enum speedVariable ind); const char* getFunctionName(enum detFuncs func); void function_table(); void functionNotImplemented(); diff --git a/slsDetectorServers/slsDetectorServer/slsDetector_stopServer.c b/slsDetectorServers/slsDetectorServer/slsDetector_stopServer.c deleted file mode 100755 index 1772ce2b6..000000000 --- a/slsDetectorServers/slsDetectorServer/slsDetector_stopServer.c +++ /dev/null @@ -1,46 +0,0 @@ -/* A simple server in the internet domain using TCP - The port number is passed as an argument */ -#include "communication_funcs.h" - -#include "slsDetectorFunctionList.h"/*#include "slsDetector_firmware.h" for the time being*/ -#include "slsDetectorServer_defs.h" - -#include -#include - -int sockfd; - -int main(int argc, char *argv[]) -{ - int portno; - int retval=0; - int sd,fd; - - portno = DEFAULT_PORTNO; - - - sd=bindSocket(portno); //defined in communication_funcs - if (getServerError(sd)) //defined in communication_funcs - return -1; - - - - /* waits for connection */ - while(retval!=GOODBYE) { -#ifdef VERBOSE - printf("\n"); -#endif -#ifdef VERY_VERBOSE - printf("Stop server: waiting for client call\n"); -#endif - fd=acceptConnection(sd); //defined in communication_funcs - retval=stopStateMachine();//defined in slsDetectorFirmare_funcs - closeConnection(fd); //defined in communication_funcs - } - - exitServer(sd); //defined in communication_funcs - printf("Goodbye!\n"); - - return 0; -} - diff --git a/slsDetectorServers/slsDetectorServer/sls_detector_defs.h b/slsDetectorServers/slsDetectorServer/sls_detector_defs.h deleted file mode 120000 index c5062e03f..000000000 --- a/slsDetectorServers/slsDetectorServer/sls_detector_defs.h +++ /dev/null @@ -1 +0,0 @@ -../commonFiles/sls_detector_defs.h \ No newline at end of file diff --git a/slsDetectorServers/slsDetectorServer/sls_detector_funcs.h b/slsDetectorServers/slsDetectorServer/sls_detector_funcs.h deleted file mode 120000 index 844b67129..000000000 --- a/slsDetectorServers/slsDetectorServer/sls_detector_funcs.h +++ /dev/null @@ -1 +0,0 @@ -../commonFiles/sls_detector_funcs.h \ No newline at end of file diff --git a/slsDetectorSoftware/multiSlsDetector/multiSlsDetector.cpp b/slsDetectorSoftware/multiSlsDetector/multiSlsDetector.cpp index c245aa820..9327af05a 100644 --- a/slsDetectorSoftware/multiSlsDetector/multiSlsDetector.cpp +++ b/slsDetectorSoftware/multiSlsDetector/multiSlsDetector.cpp @@ -1404,7 +1404,7 @@ int multiSlsDetector::setDAC(int val, dacIndex idac, int mV, int detPos) { // multi auto r = parallelCall(&slsDetector::setDAC, val, idac, mV); - if (idac != HV_NEW) + if (getDetectorsType() != EIGER || idac != HIGH_VOLTAGE) return sls::minusOneIfDifferent(r); // ignore slave values for hv (-999) @@ -3286,7 +3286,7 @@ int multiSlsDetector::dumpDetectorSetup(const std::string &fname, int level) { names[nvar++] = "delay"; names[nvar++] = "clkdivider"; break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: names[nvar++] = "dac:0"; names[nvar++] = "dac:1"; names[nvar++] = "dac:2"; diff --git a/slsDetectorSoftware/slsDetector/slsDetector.cpp b/slsDetectorSoftware/slsDetector/slsDetector.cpp index ce3c0199a..29c2411fd 100644 --- a/slsDetectorSoftware/slsDetector/slsDetector.cpp +++ b/slsDetectorSoftware/slsDetector/slsDetector.cpp @@ -328,7 +328,7 @@ void slsDetector::setDetectorSpecificParameters(detectorType type, detParameterL list.nGappixelsX = 0; list.nGappixelsY = 0; break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: list.nChanX = 36; list.nChanY = 1; list.nChipX = 1; @@ -463,7 +463,7 @@ void slsDetector::initializeDetectorStructure(detectorType type) { case JUNGFRAU: thisDetector->receiver_framesPerFile = JFRAU_MAX_FRAMES_PER_FILE; break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: thisDetector->receiver_framesPerFile = JFRAU_MAX_FRAMES_PER_FILE; break; default: @@ -500,7 +500,7 @@ void slsDetector::initializeDetectorStructure(detectorType type) { thisDetector->dynamicRange/8; // special for jctb - if (thisDetector->myDetectorType==JUNGFRAUCTB) { + if (thisDetector->myDetectorType==CHIPTESTBOARD) { getTotalNumberOfChannels(); } @@ -885,7 +885,7 @@ std::string slsDetector::getDetectorType() { int slsDetector::getTotalNumberOfChannels() { FILE_LOG(logDEBUG1) << "Get total number of channels"; - if (thisDetector->myDetectorType == JUNGFRAUCTB) { + if (thisDetector->myDetectorType == CHIPTESTBOARD) { if (thisDetector->roFlags & DIGITAL_ONLY) thisDetector->nChan[X] = 4; else if (thisDetector->roFlags & ANALOG_AND_DIGITAL) @@ -1405,7 +1405,7 @@ int slsDetector::updateDetectorNoWait() { n += controlSocket->ReceiveDataOnly(&i64, sizeof(i64)); thisDetector->timerValue[CYCLES_NUMBER] = i64; - if (thisDetector->myDetectorType == JUNGFRAUCTB) { + if (thisDetector->myDetectorType == CHIPTESTBOARD) { n += controlSocket->ReceiveDataOnly(&i64, sizeof(i64)); if (i64 >= 0) thisDetector->timerValue[SAMPLES_JCTB] = i64; @@ -1501,7 +1501,7 @@ int slsDetector::writeConfigurationFile(std::ofstream &outfile, multiSlsDetector names.push_back("powerchip"); names.push_back("vhighvoltage"); break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: names.push_back("powerchip"); names.push_back("vhighvoltage"); break; @@ -2252,7 +2252,7 @@ int64_t slsDetector::setTimer(timerIndex index, int64_t t) { // (a get can also change timer value, hence check difference) if (oldtimer != thisDetector->timerValue[index]) { // jctb: change samples, change databytes - if (thisDetector->myDetectorType == JUNGFRAUCTB) { + if (thisDetector->myDetectorType == CHIPTESTBOARD) { if (index == SAMPLES_JCTB) { setDynamicRange(); FILE_LOG(logINFO) << "Changing samples: data size = " << thisDetector->dataBytes; @@ -2438,7 +2438,7 @@ int slsDetector::setDynamicRange(int n) { (thisDetector->nChip[Y] * thisDetector->nChan[Y] + thisDetector->gappixels * thisDetector->nGappixels[Y]) * retval / 8; - if (thisDetector->myDetectorType == JUNGFRAUCTB) + if (thisDetector->myDetectorType == CHIPTESTBOARD) getTotalNumberOfChannels(); FILE_LOG(logDEBUG1) << "Data bytes " << thisDetector->dataBytes; FILE_LOG(logDEBUG1) << "Data bytes including gap pixels" << thisDetector->dataBytesInclGapPixels; @@ -2480,9 +2480,6 @@ int slsDetector::getDataBytesInclGapPixels() { int slsDetector::setDAC(int val, dacIndex index, int mV) { - if ((index == HV_NEW) && (thisDetector->myDetectorType == GOTTHARD)) - index = HV_POT; - int fnum = F_SET_DAC; int ret = FAIL; int args[3] = {(int)index, mV, val}; @@ -2991,7 +2988,7 @@ std::string slsDetector::setReceiver(std::string receiverIP) { thisDetector->timerValue[SUBFRAME_ACQUISITION_TIME]); setTimer(SUBFRAME_DEADTIME,thisDetector->timerValue[SUBFRAME_DEADTIME]); } - if (thisDetector->myDetectorType == JUNGFRAUCTB) + if (thisDetector->myDetectorType == CHIPTESTBOARD) setTimer(SAMPLES_JCTB,thisDetector->timerValue[SAMPLES_JCTB]); setDynamicRange(thisDetector->dynamicRange); if (thisDetector->myDetectorType == EIGER) { @@ -3503,7 +3500,7 @@ int slsDetector::setROI(int n,ROI roiLimits[]) { } int ret = sendROI(n,roiLimits); - if (thisDetector->myDetectorType == JUNGFRAUCTB) + if (thisDetector->myDetectorType == CHIPTESTBOARD) getTotalNumberOfChannels(); return ret; } @@ -3512,7 +3509,7 @@ int slsDetector::setROI(int n,ROI roiLimits[]) { slsDetectorDefs::ROI* slsDetector::getROI(int &n) { sendROI(-1,NULL); n = thisDetector->nROI; - if (thisDetector->myDetectorType == JUNGFRAUCTB) + if (thisDetector->myDetectorType == CHIPTESTBOARD) getTotalNumberOfChannels(); return thisDetector->roiLimits; } @@ -3988,7 +3985,7 @@ int slsDetector::setStoragecellStart(int pos) { int slsDetector::programFPGA(std::string fname) { // only jungfrau implemented (client processing, so check now) - if (thisDetector->myDetectorType != JUNGFRAU && thisDetector->myDetectorType != JUNGFRAUCTB) { + if (thisDetector->myDetectorType != JUNGFRAU && thisDetector->myDetectorType != CHIPTESTBOARD) { FILE_LOG(logERROR) << "Not implemented for this detector"; setErrorMask((getErrorMask())|(PROGRAMMING_ERROR)); return FAIL; diff --git a/slsDetectorSoftware/slsDetector/slsDetectorCommand.cpp b/slsDetectorSoftware/slsDetector/slsDetectorCommand.cpp index 015ecf157..3f6e65ffc 100644 --- a/slsDetectorSoftware/slsDetector/slsDetectorCommand.cpp +++ b/slsDetectorSoftware/slsDetector/slsDetectorCommand.cpp @@ -3903,7 +3903,7 @@ string slsDetectorCommand::cmdDAC(int narg, char *args[], int action, int detPos else if (cmd=="vshaper2") dac=SHAPER2; else if (cmd=="vhighvoltage") - dac=HV_NEW; + dac=HIGH_VOLTAGE; else if (cmd=="vapower") dac=VA_POT; else if (cmd=="vddpower") diff --git a/slsDetectorSoftware/slsDetector/slsDetectorUsers.cpp b/slsDetectorSoftware/slsDetector/slsDetectorUsers.cpp index 9b60f3731..59c1d43d8 100644 --- a/slsDetectorSoftware/slsDetector/slsDetectorUsers.cpp +++ b/slsDetectorSoftware/slsDetector/slsDetectorUsers.cpp @@ -246,7 +246,7 @@ int slsDetectorUsers::setStoragecellStart(int pos, int detPos) { } int slsDetectorUsers::setHighVoltage(int i, int detPos) { - return myDetector->setDAC(i, slsDetectorDefs::HV_NEW, 0, detPos); + return myDetector->setDAC(i, slsDetectorDefs::HIGH_VOLTAGE, 0, detPos); } int slsDetectorUsers::setFlowControl10G(int i, int detPos) { diff --git a/slsDetectorSoftware/slsDetector/slsDetectorUsers.h b/slsDetectorSoftware/slsDetector/slsDetectorUsers.h index 0c6a8e25d..974cd2bbb 100644 --- a/slsDetectorSoftware/slsDetector/slsDetectorUsers.h +++ b/slsDetectorSoftware/slsDetector/slsDetectorUsers.h @@ -477,9 +477,9 @@ public: * @param val value (in V) (-1 gets) * @param index DAC index * Options: slsDetectorDefs::dacIndex - * (Eiger: E_SvP up to IO_DELAY, THRESHOLD, HV_NEW) + * (Eiger: E_SvP up to IO_DELAY, THRESHOLD, HIGH_VOLTAGE) * (Jungfrau: 0-7) - * (Gotthard: G_VREF_DS up to G_IB_TESTC, HV_NEW) + * (Gotthard: G_VREF_DS up to G_IB_TESTC, HIGH_VOLTAGE) * @param detPos -1 for all detectors in list or specific detector position * @returns current DAC value */ diff --git a/slsReceiverSoftware/include/GeneralData.h b/slsReceiverSoftware/include/GeneralData.h index 0ee8a0ec6..2f8f10dcb 100644 --- a/slsReceiverSoftware/include/GeneralData.h +++ b/slsReceiverSoftware/include/GeneralData.h @@ -421,7 +421,7 @@ private: /** Constructor */ JCTBData(){ - myDetectorType = slsDetectorDefs::JUNGFRAUCTB; + myDetectorType = slsDetectorDefs::CHIPTESTBOARD; nPixelsX = 400; nPixelsY = 400; headerSizeinPacket = 22; diff --git a/slsReceiverSoftware/src/DataProcessor.cpp b/slsReceiverSoftware/src/DataProcessor.cpp index 2c8996f00..3633e793d 100644 --- a/slsReceiverSoftware/src/DataProcessor.cpp +++ b/slsReceiverSoftware/src/DataProcessor.cpp @@ -468,7 +468,7 @@ void DataProcessor::PadMissingPackets(char* buf) { else memset(buf + fifohsize + (pnum * dsize), 0xFF, dsize+2); break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: if (pnum == (pperFrame-1)) memset(buf + fifohsize + (pnum * dsize), 0xFF, corrected_dsize); else diff --git a/slsReceiverSoftware/src/Listener.cpp b/slsReceiverSoftware/src/Listener.cpp index 934f2c14f..069f99d0f 100644 --- a/slsReceiverSoftware/src/Listener.cpp +++ b/slsReceiverSoftware/src/Listener.cpp @@ -461,7 +461,7 @@ uint32_t Listener::ListenToAnImage(char* buf) { else memcpy(buf + fifohsize + dsize - 2, carryOverPacket + hsize, dsize+2); break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: if (pnum == (pperFrame-1)) memcpy(buf + fifohsize + (pnum * dsize), carryOverPacket + hsize, corrected_dsize); else @@ -594,7 +594,7 @@ uint32_t Listener::ListenToAnImage(char* buf) { else memcpy(buf + fifohsize + (pnum * dsize) - 2, listeningPacket + hsize, dsize+2); break; - case JUNGFRAUCTB: + case CHIPTESTBOARD: if (pnum == (pperFrame-1)) memcpy(buf + fifohsize + (pnum * dsize), listeningPacket + hsize, corrected_dsize); else diff --git a/slsReceiverSoftware/src/slsReceiverImplementation.cpp b/slsReceiverSoftware/src/slsReceiverImplementation.cpp index fe9588fae..7e1a91993 100644 --- a/slsReceiverSoftware/src/slsReceiverImplementation.cpp +++ b/slsReceiverSoftware/src/slsReceiverImplementation.cpp @@ -832,7 +832,7 @@ int slsReceiverImplementation::setDetectorType(const detectorType d) { switch(myDetectorType) { case GOTTHARD: case EIGER: - case JUNGFRAUCTB: + case CHIPTESTBOARD: case JUNGFRAU: FILE_LOG(logINFO) << " ***** " << getDetectorType(d) << " Receiver *****"; break; @@ -846,7 +846,7 @@ int slsReceiverImplementation::setDetectorType(const detectorType d) { switch(myDetectorType) { case GOTTHARD: generalData = new GotthardData(); break; case EIGER: generalData = new EigerData(); break; - case JUNGFRAUCTB: generalData = new JCTBData(); break; + case CHIPTESTBOARD: generalData = new JCTBData(); break; case JUNGFRAU: generalData = new JungfrauData(); break; default: break; } diff --git a/slsReceiverSoftware/src/slsReceiverTCPIPInterface.cpp b/slsReceiverSoftware/src/slsReceiverTCPIPInterface.cpp index 67503f615..ab4f92894 100644 --- a/slsReceiverSoftware/src/slsReceiverTCPIPInterface.cpp +++ b/slsReceiverSoftware/src/slsReceiverTCPIPInterface.cpp @@ -582,7 +582,7 @@ int slsReceiverTCPIPInterface::set_detector_type(){ switch(arg) { case GOTTHARD: case EIGER: - case JUNGFRAUCTB: + case CHIPTESTBOARD: case JUNGFRAU: break; default: @@ -804,7 +804,7 @@ int slsReceiverTCPIPInterface::set_timer() { receiver->setSubPeriod(index[1] + receiver->getSubExpTime()); break; case SAMPLES_JCTB: - if (myDetectorType != JUNGFRAUCTB) { + if (myDetectorType != CHIPTESTBOARD) { modeNotImplemented("(Samples) Timer index", (int)index[0]); break; } @@ -836,7 +836,7 @@ int slsReceiverTCPIPInterface::set_timer() { retval=(receiver->getSubPeriod() - receiver->getSubExpTime()); break; case SAMPLES_JCTB: - if (myDetectorType != JUNGFRAUCTB) { + if (myDetectorType != CHIPTESTBOARD) { ret = FAIL; sprintf(mess,"This timer mode (%lld) does not exist for this receiver type\n", (long long int)index[0]); FILE_LOG(logERROR) << "Warning: " << mess; diff --git a/slsSupportLib/include/sls_detector_defs.h b/slsSupportLib/include/sls_detector_defs.h index 5858e1e31..cbdf17250 100755 --- a/slsSupportLib/include/sls_detector_defs.h +++ b/slsSupportLib/include/sls_detector_defs.h @@ -45,6 +45,9 @@ typedef int int32_t; /** maximum unit size of program sent to detector */ #define MAX_FPGAPROGRAMSIZE (2 * 1024 *1024) +/** maximum pattern length */ +#define MAX_PATTERN_LENGTH 65535 + /** get flag form most functions */ #define GET_FLAG -1 @@ -64,6 +67,7 @@ typedef int int32_t; #define DEFAULT_STREAMING_TIMER_IN_MS 200 + typedef char mystring[MAX_STR_LENGTH]; @@ -82,7 +86,7 @@ public: EIGER, /**< eiger */ GOTTHARD, /**< gotthard */ JUNGFRAU, /**< jungfrau */ - JUNGFRAUCTB /**< jungfrauCTBversion */ + CHIPTESTBOARD /**< CTB */ }; @@ -394,7 +398,6 @@ public: VDD_POT, /**< chiptest board power supply vdd */ VSH_POT, /**< chiptest board power supply vsh */ VIO_POT, /**< chiptest board power supply va */ - HV_POT, /**< gotthard, chiptest board high voltage */ G_VREF_DS, /**< gotthard */ G_VCASCN_PB, /**< gotthard */ G_VCASCP_PB, /**< gotthard */ @@ -421,7 +424,7 @@ public: E_Vis, /**< eiger */ IO_DELAY, /**< eiger io delay */ ADC_VPP, /**< adc vpp for jctb */ - HV_NEW, /**< new hv index for jungfrau & c */ + HIGH_VOLTAGE, /**< high voltage */ TEMPERATURE_FPGAEXT, /**< temperature sensor (close to fpga) */ TEMPERATURE_10GE, /**< temperature sensor (close to 10GE) */ TEMPERATURE_DCDC, /**< temperature sensor (close to DCDC) */ @@ -556,7 +559,7 @@ public: }; /** returns detector type string from detector type index - \param t string can be EIGER, GOTTHARD, JUNGFRAU, JUNGFRAUCTB + \param t string can be EIGER, GOTTHARD, JUNGFRAU, CHIPTESTBOARD \returns Eiger, Gotthard, Jungfrau, JungfrauCTB, Unknown */ static std::string getDetectorType(detectorType t){ \ @@ -564,19 +567,19 @@ public: case EIGER: return std::string("Eiger"); \ case GOTTHARD: return std::string("Gotthard"); \ case JUNGFRAU: return std::string("Jungfrau"); \ - case JUNGFRAUCTB: return std::string("JungfrauCTB"); \ + case CHIPTESTBOARD: return std::string("JungfrauCTB"); \ default: return std::string("Unknown"); \ }}; /** returns detector type index from detector type string \param type can be Eiger, Gotthard, Jungfrau, JungfrauCTB - \returns EIGER, GOTTHARD, JUNGFRAU, JUNGFRAUCTB, GENERIC + \returns EIGER, GOTTHARD, JUNGFRAU, CHIPTESTBOARD, GENERIC */ static detectorType getDetectorType(std::string const type){\ if (type=="Eiger") return EIGER; \ if (type=="Gotthard") return GOTTHARD; \ if (type=="Jungfrau") return JUNGFRAU; \ - if (type=="JungfrauCTB") return JUNGFRAUCTB; \ + if (type=="JungfrauCTB") return CHIPTESTBOARD; \ return GENERIC; \ }; diff --git a/slsSupportLib/include/versionAPI.h b/slsSupportLib/include/versionAPI.h index fd098d0b9..8a2fc4f70 100644 --- a/slsSupportLib/include/versionAPI.h +++ b/slsSupportLib/include/versionAPI.h @@ -3,4 +3,5 @@ #define APIEIGER 0x181031 #define APIJUNGFRAU 0x181102 #define APIGOTTHARD 0x181009 +#define APICTB 0x180101