Merge branch 'developer' into jf_singlemodule

This commit is contained in:
hinger_v 2024-02-26 16:44:23 +01:00
commit 732c54d273
68 changed files with 4022 additions and 2135 deletions

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@ -232,6 +232,8 @@ if (NOT TARGET slsProjectCSettings)
-Wredundant-decls
-Wdouble-promotion
-Werror=return-type
-Wno-format-overflow
-Wno-format-truncation
)
sls_disable_c_warning("-Wstringop-truncation")
endif()

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@ -414,7 +414,7 @@ class Detector(CppDetectorApi):
@element
def framecounter(self):
"""
[Jungfrau][Moench][Mythen3][Gotthard2][CTB] Number of frames from start run control.
[Jungfrau][Moench][Mythen3][Gotthard2][CTB][Xilinx Ctb] Number of frames from start run control.
Note
-----
@ -443,12 +443,13 @@ class Detector(CppDetectorApi):
@element
def powerchip(self):
"""
[Jungfrau][Moench][Mythen3][Gotthard2] Power the chip.
[Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] Power the chip.
Note
----
[Jungfrau][Moench] Default is disabled. Get will return power status. Can be off if temperature event occured (temperature over temp_threshold with temp_control enabled. Will configure chip (only chip v1.1).\n
[Mythen3][Gotthard2] Default is 1. If module not connected or wrong module, powerchip will fail.
[Xilinx Ctb] Default is 0. Also configures the chip if powered on.
"""
return self.getPowerChip()
@ -456,6 +457,16 @@ class Detector(CppDetectorApi):
def powerchip(self, value):
ut.set_using_dict(self.setPowerChip, value)
def configtransceiver(self):
"""
[Xilinx Ctb] Waits for transceiver to be aligned.
Note
----
Chip had to be configured (powered on) before this.
"""
self.configureTransceiver()
@property
@element
def triggers(self):
@ -620,7 +631,7 @@ class Detector(CppDetectorApi):
@element
def periodl(self):
"""
[Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2] Period left for current frame.
[Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2][Xilinx Ctb] Period left for current frame.
Note
-----
@ -642,7 +653,7 @@ class Detector(CppDetectorApi):
@element
def delay(self):
"""
[Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2] Delay after trigger, accepts either a value in seconds, DurationWrapper or datetime.timedelta
[Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2][Xilinx Ctb] Delay after trigger, accepts either a value in seconds, DurationWrapper or datetime.timedelta
:getter: always returns in seconds. To get in DurationWrapper, use getDelayAfterTrigger
@ -684,7 +695,7 @@ class Detector(CppDetectorApi):
@element
def delayl(self):
"""
[Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2] Delay left after trigger during acquisition, accepts either a value in seconds, datetime.timedelta or DurationWrapper
[Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2][Xilinx Ctb] Delay left after trigger during acquisition, accepts either a value in seconds, datetime.timedelta or DurationWrapper
Note
-----
@ -732,7 +743,7 @@ class Detector(CppDetectorApi):
@property
@element
def nextframenumber(self):
"""[Eiger][Jungfrau][Moench][CTB] Next frame number. Stopping acquisition might result in different frame numbers for different modules. """
"""[Eiger][Jungfrau][Moench][CTB][Xilinx CTB] Next frame number. Stopping acquisition might result in different frame numbers for different modules. """
return self.getNextFrameNumber()
@nextframenumber.setter
@ -1964,7 +1975,7 @@ class Detector(CppDetectorApi):
@property
@element
def frametime(self):
"""[Jungfrau][Moench][Mythen3][Gotthard2][CTB] Timestamp at a frame start.
"""[Jungfrau][Moench][Mythen3][Gotthard2][CTB][Xilinx Ctb] Timestamp at a frame start.
Note
----
@ -2602,7 +2613,7 @@ class Detector(CppDetectorApi):
@property
@element
def runtime(self):
"""[Jungfrau][Moench][Mythen3][Gotthard2][CTB] Time from detector start up.
"""[Jungfrau][Moench][Mythen3][Gotthard2][CTB][Xilinx Ctb] Time from detector start up.
Note
-----
@ -3237,7 +3248,7 @@ class Detector(CppDetectorApi):
@property
@element
def transceiverenable(self):
"""[Ctb] Transceiver Enable Mask. Enable for each 4 transceiver channel."""
"""[CTB][Xilinx CTB] Transceiver Enable Mask. Enable for each 4 transceiver channel."""
return self.getTransceiverEnableMask()
@transceiverenable.setter
@ -3276,8 +3287,10 @@ class Detector(CppDetectorApi):
Note
------
Options: ANALOG_ONLY, DIGITAL_ONLY, ANALOG_AND_DIGITAL, TRANSCEIVER_ONLY, DIGITAL_AND_TRANSCEIVER
Default: ANALOG_ONLY
[CTB] Options: ANALOG_ONLY, DIGITAL_ONLY, ANALOG_AND_DIGITAL, TRANSCEIVER_ONLY, DIGITAL_AND_TRANSCEIVER
[CTB] Default: ANALOG_ONLY
[Xilinx CTB] Options: TRANSCEIVER_ONLY
[Xilinx CTB] Default: TRANSCEIVER_ONLY
Example
--------
@ -3314,7 +3327,7 @@ class Detector(CppDetectorApi):
@property
@element
def tsamples(self):
"""[CTB] Number of transceiver samples expected. """
"""[CTB][Xilinx CTB] Number of transceiver samples expected. """
return self.getNumberOfTransceiverSamples()
@tsamples.setter
@ -3833,7 +3846,7 @@ class Detector(CppDetectorApi):
@property
@element
def v_a(self):
"""[Ctb] Power supply a in mV."""
"""[Ctb][Xilinx Ctb] Power supply a in mV."""
return self.getPower(dacIndex.V_POWER_A)
@v_a.setter
@ -3844,7 +3857,7 @@ class Detector(CppDetectorApi):
@property
@element
def v_b(self):
"""[Ctb] Power supply b in mV."""
"""[Ctb][Xilinx Ctb] Power supply b in mV."""
return self.getPower(dacIndex.V_POWER_B)
@v_b.setter
@ -3855,7 +3868,7 @@ class Detector(CppDetectorApi):
@property
@element
def v_c(self):
"""[Ctb] Power supply c in mV."""
"""[Ctb][Xilinx Ctb] Power supply c in mV."""
return self.getPower(dacIndex.V_POWER_C)
@v_c.setter
@ -3866,7 +3879,7 @@ class Detector(CppDetectorApi):
@property
@element
def v_d(self):
"""[Ctb] Power supply d in mV."""
"""[Ctb][Xilinx Ctb] Power supply d in mV."""
return self.getPower(dacIndex.V_POWER_D)
@v_d.setter
@ -3877,7 +3890,7 @@ class Detector(CppDetectorApi):
@property
@element
def v_io(self):
"""[Ctb] Power supply io in mV. Minimum 1200 mV.
"""[Ctb][Xilinx Ctb] Power supply io in mV. Minimum 1200 mV.
Note
----
@ -3893,7 +3906,7 @@ class Detector(CppDetectorApi):
@property
@element
def v_limit(self):
"""[Ctb] Soft limit for power supplies (ctb only) and DACS in mV."""
"""[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and DACS in mV."""
return self.getPower(dacIndex.V_LIMIT)
@v_limit.setter

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@ -1778,6 +1778,10 @@ void init_det(py::module &m) {
(std::string(Detector::*)(const defs::dacIndex) const) &
Detector::getSlowADCName,
py::arg());
CppDetectorApi.def("configureTransceiver",
(void (Detector::*)(sls::Positions)) &
Detector::configureTransceiver,
py::arg() = Positions{});
CppDetectorApi.def(
"getPatterFileName",
(Result<std::string>(Detector::*)(sls::Positions) const) &

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@ -25,6 +25,8 @@ void init_enums(py::module &m) {
.value("MOENCH", slsDetectorDefs::detectorType::MOENCH)
.value("MYTHEN3", slsDetectorDefs::detectorType::MYTHEN3)
.value("GOTTHARD2", slsDetectorDefs::detectorType::GOTTHARD2)
.value("XILINX_CHIPTESTBOARD",
slsDetectorDefs::detectorType::XILINX_CHIPTESTBOARD)
.export_values();
py::enum_<slsDetectorDefs::runStatus>(Defs, "runStatus")

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@ -37,8 +37,7 @@ target_compile_definitions(ctbDetectorServer_virtual
)
target_link_libraries(ctbDetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
m
PUBLIC pthread rt m slsProjectCSettings
)
set_target_properties(ctbDetectorServer_virtual PROPERTIES

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@ -55,7 +55,9 @@
#define DEFAULT_SYNC_CLK (40) // 20
#define DEFAULT_DBIT_CLK (200)
#define DEFAULT_TRANSCEIVER_MASK (0x3)
#define MAX_TRANSCEIVER_MASK (0xF)
#define MAX_TRANSCEIVER_MASK (0xF)
#define MAX_TRANSCEIVER_SAMPLES (0xFFFF)
#define UDP_HEADER_MAX_FRAME_VALUE (0xFFFFFFFFFFFF)

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@ -471,7 +471,8 @@ void setupDetector() {
// hv
DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME);
// dacs
LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC);
LTC2620_D_SetDefines(DAC_MIN_MV, DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC, 1,
0, "");
// on chip dacs
ASIC_Driver_SetDefines(ONCHIP_DAC_DRIVER_FILE_NAME);
setTimingSource(DEFAULT_TIMING_SOURCE);

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@ -35,6 +35,7 @@
#define TEMPERATURE_FILE_NAME ("/sys/class/hwmon/hwmon0/temp1_input")
#endif
#define CONFIG_FILE ("config_gotthard2.txt")
#define DAC_MIN_MV (0)
#define DAC_MAX_MV (2048)
#define ONCHIP_DAC_MAX_VAL (0x3FF)
#define ADU_MAX_VAL (0xFFF)

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@ -483,7 +483,8 @@ void setupDetector() {
// hv
DAC6571_SetDefines(HV_HARD_MAX_VOLTAGE, HV_DRIVER_FILE_NAME);
// dac
LTC2620_D_SetDefines(DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC);
LTC2620_D_SetDefines(DAC_MIN_MV, DAC_MAX_MV, DAC_DRIVER_FILE_NAME, NDAC, 1,
0, "");
resetCore();
resetPeripheral();

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@ -34,6 +34,7 @@
#else
#define TEMPERATURE_FILE_NAME ("/sys/class/hwmon/hwmon0/temp1_input")
#endif
#define DAC_MIN_MV (0)
#define DAC_MAX_MV (2048)
#define TYPE_MYTHEN3_MODULE_VAL (93)
#define TYPE_TOLERANCE (5)

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@ -4,18 +4,11 @@
#include <inttypes.h>
/**
* Set Defines
* @param hardMaxV maximum hardware limit
* @param driverfname driver file name
* @param numdacs number of dacs
*/
void LTC2620_D_SetDefines(int hardMaxV, char *driverfname, int numdacs);
/**
* Get max number of steps
*/
void LTC2620_D_SetDefines(int hardMinV, int hardMaxV, char *driverfname,
int numdacs, int numdevices, int startingDeviceIndex,
char *powerdownDriverfname);
int LTC2620_D_GetMaxNumSteps();
int LTC2620_D_GetPowerDownValue();
/**
* Convert voltage to dac units

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@ -9,4 +9,7 @@ void bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset);
uint64_t getU64BitReg(int aLSB, int aMSB);
void setU64BitReg(uint64_t value, int aLSB, int aMSB);
u_int32_t readRegister(u_int32_t offset);
u_int32_t writeRegister(u_int32_t offset, u_int32_t data);
int mapCSP0(void);
u_int32_t *Arm_getUDPBaseAddress();

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@ -11,7 +11,7 @@ void initializePatternAddresses();
void initializePatternWord();
#endif
#endif
#if defined(CHIPTESTBOARDD) // TODO || defined(XILINX_CHIPTESTBOARDD)
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
uint64_t validate_readPatternIOControl();
int validate_writePatternIOControl(char *message, uint64_t arg);
void writePatternIOControl(uint64_t word);

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@ -0,0 +1,12 @@
// SPDX-License-Identifier: LGPL-3.0-or-other
// Copyright (C) 2021 Contributors to the SLS Detector Package
#pragma once
#include <sys/types.h>
int resetFPGA(char *mess);
int loadDeviceTree(char *mess, int *adcDeviceIndex, int *dacDeviceIndex);
int checksBeforeCreatingDeviceTree(char *mess);
int createDeviceTree(char *mess);
int verifyDeviceTree(char *mess, int *adcDeviceIndex, int *dacDeviceIndex);

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@ -27,6 +27,7 @@
#ifdef ARMPROCESSOR
#include "arm64.h"
#include "programViaArm.h"
#endif
#ifdef MYTHEN3D
@ -68,8 +69,12 @@ void basictests();
#if !defined(EIGERD)
int checkType();
int testFpga();
#ifdef XILINX_CHIPTESTBOARDD
int testFixedFPGAPattern();
#else
int testBus();
#endif
#endif
#if defined(GOTTHARDD) || \
((defined(EIGERD) || defined(JUNGFRAUD) || defined(MOENCHD)) && \
@ -84,9 +89,7 @@ u_int64_t getFirmwareVersion();
#ifdef EIGERD
uint64_t getFrontEndFirmwareVersion(enum fpgaPosition fpgaPosition);
#endif
#ifndef XILINX_CHIPTESTBOARDD
u_int64_t getFirmwareAPIVersion();
#endif
void getHardwareVersion(char *version);
#ifdef EIGERD
int getHardwareVersionNumber();
@ -178,6 +181,22 @@ uint32_t readRegister16And32(uint32_t offset);
#endif
// firmware functions (resets)
#if defined(XILINX_CHIPTESTBOARDD)
void cleanFifos();
void resetFlow();
int waitTranseiverReset(char *mess);
#ifdef VIRTUAL
void setTransceiverAlignment(int align);
#endif
int isTransceiverAligned();
int waitTransceiverAligned(char *mess);
int configureTransceiver(char *mess);
int isChipConfigured();
int powerChip(int on, char *mess);
int getPowerChip();
int configureChip(char *mess);
void startPeriphery();
#endif
#if defined(JUNGFRAUD) || defined(MOENCHD) || defined(CHIPTESTBOARDD) || \
defined(MYTHEN3D) || defined(GOTTHARD2D)
void cleanFifos();
@ -217,6 +236,12 @@ uint32_t getTransceiverEnableMask();
void setADCInvertRegister(uint32_t val);
uint32_t getADCInvertRegister();
#endif
#ifdef XILINX_CHIPTESTBOARDD
void setADCEnableMask_10G(uint32_t mask);
uint32_t getADCEnableMask_10G();
int setTransceiverEnableMask(uint32_t mask);
uint32_t getTransceiverEnableMask();
#endif
#if defined(CHIPTESTBOARDD)
int setExternalSamplingSource(int val);
int setExternalSampling(int val);
@ -232,7 +257,7 @@ int getParallelMode();
int setOverFlowMode(int mode);
int getOverFlowMode();
#endif
#ifdef CHIPTESTBOARDD
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
int setReadoutMode(enum readoutMode mode);
int getReadoutMode();
#endif
@ -243,7 +268,7 @@ int selectStoragecellStart(int pos);
int getMaxStoragecellStart();
#endif
#if defined(JUNGFRAUD) || defined(MOENCHD) || defined(EIGERD) || \
defined(CHIPTESTBOARDD)
defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
int setNextFrameNumber(uint64_t value);
int getNextFrameNumber(uint64_t *value);
#endif
@ -251,14 +276,12 @@ void setNumFrames(int64_t val);
int64_t getNumFrames();
void setNumTriggers(int64_t val);
int64_t getNumTriggers();
#ifndef XILINX_CHIPTESTBOARDD
#ifndef MYTHEN3D
int setExpTime(int64_t val);
int64_t getExpTime();
#endif
int setPeriod(int64_t val);
int64_t getPeriod();
#endif
#ifdef MYTHEN3D
void setNumIntGates(int val);
void setNumGates(int val);
@ -290,11 +313,9 @@ int getNumAdditionalStorageCells();
int setStorageCellDelay(int64_t val);
int64_t getStorageCellDelay();
#endif
#if defined(CHIPTESTBOARDD)
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
int setNumAnalogSamples(int val);
int getNumAnalogSamples();
#endif
#ifdef CHIPTESTBOARDD
int setNumDigitalSamples(int val);
int getNumDigitalSamples();
int setNumTransceiverSamples(int val);
@ -312,10 +333,10 @@ int64_t getNumFramesLeft();
int64_t getNumTriggersLeft();
#endif
#if defined(JUNGFRAUD) || defined(MOENCHD) || defined(GOTTHARDD) || \
defined(CHIPTESTBOARDD) || defined(MYTHEN3D) || defined(GOTTHARD2D)
defined(CHIPTESTBOARDD) || defined(MYTHEN3D) || defined(GOTTHARD2D) || \
defined(XILINX_CHIPTESTBOARDD)
int setDelayAfterTrigger(int64_t val);
int64_t getDelayAfterTrigger();
int64_t getDelayAfterTriggerLeft();
int64_t getPeriodLeft();
#endif
@ -326,7 +347,7 @@ int64_t getNumBurstsLeft();
int64_t getExpTimeLeft();
#endif
#if defined(JUNGFRAUD) || defined(MOENCHD) || defined(CHIPTESTBOARDD) || \
defined(MYTHEN3D) || defined(GOTTHARD2D)
defined(MYTHEN3D) || defined(GOTTHARD2D) || defined(XILINX_CHIPTESTBOARDD)
int64_t getFramesFromStart();
int64_t getActualTime();
int64_t getMeasurementTime();
@ -379,15 +400,11 @@ void setDAC(enum DACINDEX ind, int val, int mV, int counterEnableCheck);
void setGeneralDAC(enum DACINDEX ind, int val, int mV);
void setVthDac(int index, int enable);
#else
#ifndef XILINX_CHIPTESTBOARDD
void setDAC(enum DACINDEX ind, int val, int mV);
#endif
#endif
#ifndef XILINX_CHIPTESTBOARDD
int getDAC(enum DACINDEX ind, int mV);
int getMaxDacSteps();
#endif
#if defined(CHIPTESTBOARDD)
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
int dacToVoltage(int dac);
int checkVLimitCompliant(int mV);
int checkVLimitDacCompliant(int dac);
@ -406,20 +423,24 @@ int isPowerValid(enum DACINDEX ind, int val);
int getPower();
void setPower(enum DACINDEX ind, int val);
void powerOff();
#elif XILINX_CHIPTESTBOARDD
int getPower();
void setPower(enum DACINDEX ind, int val);
#endif
#if defined(MYTHEN3D) || defined(GOTTHARD2D)
#if defined(MYTHEN3D) || defined(GOTTHARD2D) || defined(XILINX_CHIPTESTBOARDD)
int getADC(enum ADCINDEX ind, int *value);
#else
#ifndef XILINX_CHIPTESTBOARDD
int getADC(enum ADCINDEX ind);
#endif
#endif
#ifdef CHIPTESTBOARDD
int getSlowADC(int ichan);
int getSlowADCTemperature();
#endif
#ifndef XILINX_CHIPTESTBOARDD
#ifdef XILINX_CHIPTESTBOARDD
int getSlowADC(int ichan, int *retval);
int getTemperature(int *retval);
#else
int setHighVoltage(int val);
#endif
@ -491,7 +512,8 @@ void setupHeader(int iRxEntry, enum interfaceType type, uint32_t destip,
uint32_t sourceip, uint16_t sourceport);
#endif
#if defined(JUNGFRAUD) || defined(MOENCHD) || defined(GOTTHARD2D) || \
defined(MYTHEN3D) || defined(CHIPTESTBOARDD)
defined(MYTHEN3D) || defined(CHIPTESTBOARDD) || \
defined(XILINX_CHIPTESTBOARDD)
void calcChecksum(udp_header *udp);
#endif
#ifdef GOTTHARDD
@ -694,30 +716,27 @@ int setTransmissionDelayRight(int value);
#endif
// aquisition
#ifndef XILINX_CHIPTESTBOARDD
int startStateMachine();
#ifdef VIRTUAL
void *start_timer(void *arg);
#endif
int stopStateMachine();
#endif
#ifdef MYTHEN3D
#if defined(MYTHEN3D) || defined(XILINX_CHIPTESTBOARDD)
int softwareTrigger();
#endif
#if defined(EIGERD) || defined(JUNGFRAUD) || defined(MOENCHD)
int softwareTrigger(int block);
#endif
#if defined(EIGERD) || defined(MYTHEN3D) || defined(CHIPTESTBOARDD)
#if defined(EIGERD) || defined(MYTHEN3D) || defined(CHIPTESTBOARDD) || \
defined(XILINX_CHIPTESTBOARDD)
int startReadOut();
#endif
enum runStatus getRunStatus();
#ifdef EIGERD
void waitForAcquisitionEnd(int *ret, char *mess);
#else
#ifndef XILINX_CHIPTESTBOARDD
void waitForAcquisitionEnd();
#endif
#endif
#if defined(CHIPTESTBOARDD)
int validateUDPSocket();
void readandSendUDPFrames();
@ -729,7 +748,8 @@ int readFrameFromFifo();
#endif
#if defined(GOTTHARDD) || defined(JUNGFRAUD) || defined(MOENCHD) || \
defined(CHIPTESTBOARDD) || defined(MYTHEN3D) || defined(GOTTHARD2D)
defined(CHIPTESTBOARDD) || defined(MYTHEN3D) || defined(GOTTHARD2D) || \
defined(XILINX_CHIPTESTBOARDD)
u_int32_t runBusy();
#endif
@ -738,15 +758,11 @@ u_int32_t runState(enum TLogLevel lev);
#endif
// common
#ifndef XILINX_CHIPTESTBOARDD
int calculateDataBytes();
int getTotalNumberOfChannels();
#endif
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
void getNumberOfChannels(int *nchanx, int *nchany);
#endif
#ifndef XILINX_CHIPTESTBOARDD
int getNumberOfChips();
int getNumberOfDACs();
int getNumberOfChannelsPerChip();
#endif
int getNumberOfChannelsPerChip();

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@ -329,3 +329,4 @@ int getColumn();
int setColumn(int);
int get_pedestal_mode(int);
int set_pedestal_mode(int);
int config_transceiver(int);

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@ -13,35 +13,54 @@
#define LTC2620_D_MAX_STEPS (LTC2620_D_MAX_DAC_VAL + 1)
// defines from the fpga
int LTC2620_D_HardMinVoltage = 0;
int LTC2620_D_HardMaxVoltage = 0;
char LTC2620_D_DriverFileName[MAX_STR_LENGTH];
char LTC2620_D_PowerDownDriverFileName[MAX_STR_LENGTH];
int LTC2620_D_NumDacs = 0;
int LTC2620_D_NumDevices = 0;
int LTC2620_D_NumChannelsPerDevice = 0;
int LTC2620_D_DacDriverStartingDeviceIndex = 0;
void LTC2620_D_SetDefines(int hardMaxV, char *driverfname, int numdacs) {
void LTC2620_D_SetDefines(int hardMinV, int hardMaxV, char *driverfname,
int numdacs, int numdevices, int startingDeviceIndex,
char *powerdownDriverfname) {
LOG(logINFOBLUE,
("Configuring DACs (LTC2620) to %s (numdacs:%d, hard max: %dmV)\n",
driverfname, numdacs, hardMaxV));
("Configuring DACs (LTC2620) to %s\n\t (numdacs:%d, hard min:%d, hard "
"max: %dmV, idev:%d)\n",
driverfname, numdacs, hardMinV, hardMaxV, startingDeviceIndex));
LTC2620_D_HardMinVoltage = hardMinV;
LTC2620_D_HardMaxVoltage = hardMaxV;
memset(LTC2620_D_DriverFileName, 0, MAX_STR_LENGTH);
strcpy(LTC2620_D_DriverFileName, driverfname);
memset(LTC2620_D_PowerDownDriverFileName, 0, MAX_STR_LENGTH);
strcpy(LTC2620_D_PowerDownDriverFileName, powerdownDriverfname);
LTC2620_D_NumDacs = numdacs;
LTC2620_D_NumDevices = numdevices;
LTC2620_D_NumChannelsPerDevice = LTC2620_D_NumDacs / LTC2620_D_NumDevices;
LTC2620_D_DacDriverStartingDeviceIndex = startingDeviceIndex;
}
int LTC2620_D_GetMaxNumSteps() { return LTC2620_D_MAX_STEPS; }
int LTC2620_D_GetPowerDownValue() { return LTC2620_D_PWR_DOWN_VAL; }
int LTC2620_D_VoltageToDac(int voltage, int *dacval) {
return ConvertToDifferentRange(0, LTC2620_D_HardMaxVoltage, 0,
return ConvertToDifferentRange(LTC2620_D_HardMinVoltage,
LTC2620_D_HardMaxVoltage, 0,
LTC2620_D_MAX_DAC_VAL, voltage, dacval);
}
int LTC2620_D_DacToVoltage(int dacval, int *voltage) {
return ConvertToDifferentRange(0, LTC2620_D_MAX_DAC_VAL, 0,
return ConvertToDifferentRange(0, LTC2620_D_MAX_DAC_VAL,
LTC2620_D_HardMinVoltage,
LTC2620_D_HardMaxVoltage, dacval, voltage);
}
int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char *dacname,
int *dacval) {
LOG(logDEBUG1, ("dacnum:%d, val:%d, ismV:%d\n", dacnum, val, mV));
// validate index
if (dacnum < 0 || dacnum >= LTC2620_D_NumDacs) {
LOG(logERROR, ("Dac index %d is out of bounds (0 to %d)\n", dacnum,
@ -49,53 +68,90 @@ int LTC2620_D_SetDACValue(int dacnum, int val, int mV, char *dacname,
return FAIL;
}
// get
// validate set
if (val < 0 && val != LTC2620_D_PWR_DOWN_VAL)
return FAIL;
// convert to dac or get mV value
*dacval = val;
int dacmV = val;
int ret = OK;
if (mV) {
ret = LTC2620_D_VoltageToDac(val, dacval);
} else if (val >= 0) {
// do not convert power down dac val
ret = LTC2620_D_DacToVoltage(val, &dacmV);
}
// conversion out of bounds
if (ret == FAIL) {
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum,
(mV ? "mV" : "dac units")));
return FAIL;
}
// set
if ((*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) {
LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n", dacnum,
dacname, *dacval, dacmV));
*dacval = val;
#ifndef VIRTUAL
char fname[MAX_STR_LENGTH];
strcpy(fname, LTC2620_D_DriverFileName);
char temp[20];
memset(temp, 0, sizeof(temp));
sprintf(temp, "%d", dacnum);
strcat(fname, temp);
LOG(logDEBUG1, ("fname %s\n", fname));
char fnameFormat[MAX_STR_LENGTH];
memset(fnameFormat, 0, MAX_STR_LENGTH);
strcpy(fnameFormat, LTC2620_D_DriverFileName);
#endif
// open file
FILE *fd = fopen(fname, "w");
if (fd == NULL) {
LOG(logERROR, ("Could not open file %s for writing to set dac %d\n",
fname, dacnum));
return FAIL;
}
// convert to string, add 0 and write to file
fprintf(fd, "%d\n", *dacval);
fclose(fd);
// power down dac (different file name)
if (val == LTC2620_D_PWR_DOWN_VAL) {
#if defined(XILINX_CHIPTESTBOARDD) && !defined(VIRTUAL)
LOG(logINFO, ("Powering down DAC %2d [%-6s] \n", dacnum, dacname));
strcpy(fnameFormat, LTC2620_D_PowerDownDriverFileName);
#endif
}
// proper value to set
else {
// convert to dac or get mV value
int dacmV = val;
if (mV) {
ret = LTC2620_D_VoltageToDac(val, dacval);
} else if (val >= 0) {
// do not convert power down dac val
ret = LTC2620_D_DacToVoltage(val, &dacmV);
}
// conversion out of bounds
if (ret == FAIL) {
LOG(logERROR, ("Setting Dac %d %s is out of bounds\n", dacnum,
(mV ? "mV" : "dac units")));
return FAIL;
}
// print and set
#ifdef XILINX_CHIPTESTBOARDD
if (*dacval >= 0) {
LOG(logINFO, ("Setting DAC %2d [%-6s] : %d dac (%d mV)\n", dacnum,
dacname, *dacval, dacmV));
}
#else
if ((*dacval >= 0) || (*dacval == LTC2620_D_PWR_DOWN_VAL)) {
LOG(logINFO, ("Setting DAC %2d [%-12s] : %d dac (%d mV)\n", dacnum,
dacname, *dacval, dacmV));
}
#endif
}
// set in file
#ifndef VIRTUAL
char fname[MAX_STR_LENGTH];
memset(fname, 0, MAX_STR_LENGTH);
#ifdef XILINX_CHIPTESTBOARDD
int idev = LTC2620_D_DacDriverStartingDeviceIndex +
(dacnum / LTC2620_D_NumChannelsPerDevice);
int idac = dacnum % LTC2620_D_NumChannelsPerDevice;
sprintf(fname, fnameFormat, idev, idac);
#else
sprintf(fname, "%s%d", fnameFormat, dacnum);
#endif
LOG(logDEBUG1, ("fname %s\n", fname));
// open file
FILE *fd = fopen(fname, "w");
if (fd == NULL) {
LOG(logERROR, ("Could not open file %s for writing to set dac %d\n",
fname, dacnum));
return FAIL;
}
// convert to string, add 0 and write to file
#ifdef XILINX_CHIPTESTBOARDD
// not changing *dacval from -100 (cant write -100 to file: invalid arg)
int writeValue = *dacval;
if (writeValue == LTC2620_D_PWR_DOWN_VAL)
writeValue = 1;
fprintf(fd, "%d\n", writeValue);
#else
fprintf(fd, "%d\n", *dacval);
#endif
fclose(fd);
#endif
return OK;
}

View File

@ -11,10 +11,13 @@
#include <sys/mman.h> // mmap
/* global variables */
#define CSP0 (0xB0010000)
#define MEM_SIZE 0x100000
#define CSP0 (0xB0080000)
#define CSP1 (0xB0050000) // udp
#define MEM_SIZE (0x10000)
//#define MEM_SIZE_CSP0 (4096)
//#define MEM_SIZE_CSP1 (2 * 4096)
u_int32_t *csp0base = 0;
u_int32_t *csp1base = 0;
void bus_w(u_int32_t offset, u_int32_t data) {
volatile u_int32_t *ptr1;
@ -39,35 +42,53 @@ void setU64BitReg(uint64_t value, int aLSB, int aMSB) {
bus_w(aMSB, (value >> 32) & (0xffffffff));
}
u_int32_t readRegister(u_int32_t offset) { return bus_r(offset); }
u_int32_t writeRegister(u_int32_t offset, u_int32_t data) {
bus_w(offset, data);
return readRegister(offset);
}
int mapCSP0(void) {
// if not mapped
if (csp0base == 0) {
LOG(logINFO, ("Mapping memory\n"));
u_int32_t csps[2] = {CSP0, CSP1};
u_int32_t **cspbases[2] = {&csp0base, &csp1base};
char names[2][10] = {"csp0base", "csp1base"};
for (int i = 0; i < 2; ++i) {
// if not mapped
if (*cspbases[i] == 0) {
LOG(logINFO, ("Mapping memory for %s\n", names[i]));
#ifdef VIRTUAL
csp0base = malloc(MEM_SIZE);
if (csp0base == NULL) {
LOG(logERROR, ("Could not allocate virtual memory.\n"));
return FAIL;
}
LOG(logINFO, ("memory allocated\n"));
*cspbases[i] = malloc(MEM_SIZE);
if (*cspbases[i] == NULL) {
LOG(logERROR,
("Could not allocate virtual memory for %s.\n", names[i]));
return FAIL;
}
LOG(logINFO, ("memory allocated for %s\n", names[i]));
#else
int fd;
fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) {
LOG(logERROR, ("Can't find /dev/mem\n"));
return FAIL;
}
LOG(logDEBUG1, ("/dev/mem opened\n"));
csp0base = (u_int32_t *)mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, fd, CSP0);
if (csp0base == MAP_FAILED) {
LOG(logERROR, ("Can't map memmory area\n"));
return FAIL;
}
int fd = open("/dev/mem", O_RDWR | O_SYNC, 0);
if (fd == -1) {
LOG(logERROR, ("Can't find /dev/mem for %s\n", names[i]));
return FAIL;
}
LOG(logDEBUG1,
("/dev/mem opened for %s, (CSP:0x%x)\n", names[i], csps[i]));
*cspbases[i] =
(u_int32_t *)mmap(0, MEM_SIZE, PROT_READ | PROT_WRITE,
MAP_FILE | MAP_SHARED, fd, csps[i]);
if (*cspbases[i] == MAP_FAILED) {
LOG(logERROR, ("Can't map memmory area for %s\n", names[i]));
return FAIL;
}
#endif
LOG(logINFO, ("csp0base mapped from %p to %p\n", csp0base,
(csp0base + MEM_SIZE)));
} else
LOG(logINFO, ("Memory already mapped before\n"));
LOG(logINFO, ("%s mapped from %p to %p,(CSP:0x%x) \n", names[i],
*cspbases[i], *cspbases[i] + MEM_SIZE, csps[i]));
// LOG(logINFO, ("Status Register: %08x\n", bus_r(STATUS_REG)));
} else
LOG(logINFO, ("Memory %s already mapped before\n", names[i]));
}
return OK;
}
u_int32_t *Arm_getUDPBaseAddress() { return csp1base; }

View File

@ -752,13 +752,17 @@ int readADCFromFile(char *fname, int *value) {
*value = -1;
if (sscanf(line, "%d", value) != 1) {
#ifdef XILINX_CHIPTESTBOARDD
LOG(logERROR, ("Could not scan adc from %s\n", line));
#else
LOG(logERROR, ("Could not scan temperature from %s\n", line));
#endif
return FAIL;
}
#ifdef EIGERD
*value /= 10;
#else
#elif !defined(XILINX_CHIPTESTBOARDD)
LOG(logINFO, ("Temperature: %.2f °C\n", (double)(*value) / 1000.00));
#endif

View File

@ -52,12 +52,26 @@ void initializePatternWord() {
#endif
#endif
#if defined(CHIPTESTBOARDD) // TODO || defined(XILINX_CHIPTESTBOARDD)
#if defined(CHIPTESTBOARDD) || defined(XILINX_CHIPTESTBOARDD)
uint64_t validate_readPatternIOControl() {
#if defined(CHIPTESTBOARDD)
return getU64BitReg(PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG);
#elif defined(XILINX_CHIPTESTBOARDD)
return (uint64_t)(bus_r(PINIOCTRLREG));
#endif
}
int validate_writePatternIOControl(char *message, uint64_t arg) {
// validate input
#ifdef XILINX_CHIPTESTBOARDD
if (arg > BIT32_MSK) {
strcpy(message, "Could not set pattern IO Control. Must be 32 bit for "
"this detector\n");
LOG(logERROR, (message));
return FAIL;
}
#endif
writePatternIOControl(arg);
// validate result
@ -77,9 +91,15 @@ int validate_writePatternIOControl(char *message, uint64_t arg) {
}
void writePatternIOControl(uint64_t word) {
#ifdef CHIPTESTBOARDD
LOG(logINFO,
("Setting Pattern I/O Control: 0x%llx\n", (long long int)word));
setU64BitReg(word, PATTERN_IO_CNTRL_LSB_REG, PATTERN_IO_CNTRL_MSB_REG);
#elif defined(XILINX_CHIPTESTBOARDD)
uint32_t val = (uint32_t)word;
LOG(logINFO, ("Setting Pattern I/O Control: 0x%x\n", val));
bus_w(PINIOCTRLREG, val);
#endif
}
#endif

View File

@ -0,0 +1,196 @@
// SPDX-License-Identifier: LGPL-3.0-or-other
// Copyright (C) 2021 Contributors to the SLS Detector Package
#include "programViaArm.h"
#include "clogger.h"
#include "sls/sls_detector_defs.h"
#include <string.h> //memset
#include <unistd.h> // access
#define CMD_ARM_LOAD_BIT_FILE \
"~/fpgautil/fpgautil -b /root/apps/xilinx-ctb/XilinxCTB.bit -f Full"
#define CMD_ARM_DEVICE_TREE_API_FOLDER \
"/sys/kernel/config/device-tree/overlays/spidr"
#define CMD_ARM_DEVICE_TREE_OVERLAY_FILE "/root/apps/xilinx-ctb/pl.dtbo"
#define CMD_ARM_LOAD_DEVICE_TREE_FORMAT "cat %s > %s/dtbo"
#define CMD_ARM_DEVICE_TREE_DST "/sys/bus/iio/devices/iio:device"
#define CMD_ARM_DEVICE_NAME "xilinx-ams", "ad7689", "dac@0", "dac@1", "dac@2"
#define TIME_LOAD_DEVICE_TREE_MS (500)
extern int executeCommand(char *command, char *result, enum TLogLevel level);
int resetFPGA(char *mess) {
LOG(logINFOBLUE, ("Reseting FPGA...\n"));
#ifndef VIRTUAL
char retvals[MAX_STR_LENGTH] = {0};
if (executeCommand(CMD_ARM_LOAD_BIT_FILE, retvals, logDEBUG1) == FAIL) {
snprintf(mess, MAX_STR_LENGTH,
"Could not reset fpga. Command to load bit file failed (%s)\n",
retvals);
LOG(logERROR, (mess));
return FAIL;
}
#endif
LOG(logINFOBLUE, ("FPGA reset successfully\n"))
return OK;
}
int loadDeviceTree(char *mess, int *adcDeviceIndex, int *dacDeviceIndex) {
if (verifyDeviceTree(mess, adcDeviceIndex, dacDeviceIndex) == OK)
return OK;
if (checksBeforeCreatingDeviceTree(mess) == FAIL)
return FAIL;
if (createDeviceTree(mess) == FAIL)
return FAIL;
if (verifyDeviceTree(mess, adcDeviceIndex, dacDeviceIndex) == FAIL) {
LOG(logERROR, ("Device tree loading failed at verification\n"));
return FAIL;
}
LOG(logINFOBLUE, ("Device tree loaded successfully\n"))
return OK;
}
int checksBeforeCreatingDeviceTree(char *mess) {
// check if device tree overlay file exists
if (access(CMD_ARM_DEVICE_TREE_OVERLAY_FILE, F_OK) != 0) {
snprintf(mess, MAX_STR_LENGTH,
"Device tree overlay file (%s) does not exist\n",
CMD_ARM_DEVICE_TREE_OVERLAY_FILE);
LOG(logERROR, (mess));
return FAIL;
}
LOG(logINFO, ("\tDevice tree overlay file exists (%s)\n",
CMD_ARM_DEVICE_TREE_OVERLAY_FILE));
// check if device tree folder exists. If it does, remove it
if (access(CMD_ARM_DEVICE_TREE_API_FOLDER, F_OK) == 0) {
// remove it
char cmd[MAX_STR_LENGTH] = {0};
memset(cmd, 0, MAX_STR_LENGTH);
sprintf(cmd, "rmdir %s", CMD_ARM_DEVICE_TREE_API_FOLDER);
char retvals[MAX_STR_LENGTH] = {0};
memset(retvals, 0, MAX_STR_LENGTH);
if (executeCommand(cmd, retvals, logDEBUG1) == FAIL) {
snprintf(mess, MAX_STR_LENGTH,
"Could not unload device tree overlay api with %s (%s)\n",
cmd, retvals);
LOG(logWARNING, (mess));
return FAIL;
}
LOG(logINFO, ("\tUnloaded existing device tree overlay api (%s)\n",
CMD_ARM_DEVICE_TREE_API_FOLDER));
} else {
LOG(logINFO, ("\tNo existing device tree overlay api found(%s)\n",
CMD_ARM_DEVICE_TREE_API_FOLDER));
}
// create device tree overlay folder
{
char cmd[MAX_STR_LENGTH] = {0};
memset(cmd, 0, MAX_STR_LENGTH);
sprintf(cmd, "mkdir %s", CMD_ARM_DEVICE_TREE_API_FOLDER);
char retvals[MAX_STR_LENGTH] = {0};
memset(retvals, 0, MAX_STR_LENGTH);
if (executeCommand(cmd, retvals, logDEBUG1) == FAIL) {
snprintf(mess, MAX_STR_LENGTH,
"Could not create device tree overlay api with %s (%s)\n",
cmd, retvals);
LOG(logWARNING, (mess));
return FAIL;
}
LOG(logINFO, ("\tDevice tree overlay api created (%s)\n",
CMD_ARM_DEVICE_TREE_API_FOLDER));
}
return OK;
}
int createDeviceTree(char *mess) {
char cmd[MAX_STR_LENGTH] = {0};
memset(cmd, 0, MAX_STR_LENGTH);
sprintf(cmd, CMD_ARM_LOAD_DEVICE_TREE_FORMAT,
CMD_ARM_DEVICE_TREE_OVERLAY_FILE, CMD_ARM_DEVICE_TREE_API_FOLDER);
char retvals[MAX_STR_LENGTH] = {0};
memset(retvals, 0, MAX_STR_LENGTH);
if (executeCommand(cmd, retvals, logDEBUG1) == FAIL) {
snprintf(mess, MAX_STR_LENGTH,
"Could not load device tree overlay with %s (%s)\n", cmd,
retvals);
LOG(logWARNING, (mess));
return FAIL;
}
LOG(logINFO, ("\tDevice tree overlay created (cmd: %s)\n", cmd));
usleep(TIME_LOAD_DEVICE_TREE_MS * 1000);
return OK;
}
int verifyDeviceTree(char *mess, int *adcDeviceIndex, int *dacDeviceIndex) {
LOG(logINFOBLUE, ("Verifying Device Tree...\n"));
*adcDeviceIndex = 1;
*dacDeviceIndex = 2;
#ifndef VIRTUAL
// check if iio:device0-4 exists in device tree destination
int hardcodedDeviceIndex = 0;
for (int i = 0; i != 5; ++i) {
char deviceName[MAX_STR_LENGTH] = {0};
memset(deviceName, 0, MAX_STR_LENGTH);
sprintf(deviceName, "%s%d/name", CMD_ARM_DEVICE_TREE_DST, i);
// check if device exist
if (access(deviceName, F_OK) != 0) {
snprintf(mess, MAX_STR_LENGTH,
"Could not verify device tree. Device %s does not exist\n",
deviceName);
LOG(logWARNING, (mess));
return FAIL;
}
// find name
char cmd[MAX_STR_LENGTH] = {0};
memset(cmd, 0, MAX_STR_LENGTH);
sprintf(cmd, "cat %s", deviceName);
char retvals[MAX_STR_LENGTH] = {0};
memset(retvals, 0, MAX_STR_LENGTH);
if (executeCommand(cmd, retvals, logDEBUG1) == FAIL) {
snprintf(mess, MAX_STR_LENGTH,
"Could not retrieve device name from device %s (%s)\n",
deviceName, retvals);
LOG(logWARNING, (mess));
return FAIL;
}
// verify name
char *deviceNames[] = {CMD_ARM_DEVICE_NAME};
if (strstr(retvals, deviceNames[hardcodedDeviceIndex]) == NULL) {
// dacs got loaded first
if (i == 1 &&
strstr(retvals, deviceNames[hardcodedDeviceIndex + 1]) !=
NULL) {
++hardcodedDeviceIndex;
*adcDeviceIndex = 4;
*dacDeviceIndex = 1;
} else {
snprintf(
mess, MAX_STR_LENGTH,
"Could not verify device tree. Device %s expected %s but "
"got %s\n",
deviceName, deviceNames[i], retvals);
LOG(logWARNING, (mess));
return FAIL;
}
}
++hardcodedDeviceIndex;
// in case dacs were loaded first
if (hardcodedDeviceIndex == 5)
hardcodedDeviceIndex = 1;
}
#endif
LOG(logINFOBLUE, ("Device tree verified successfully [temp: 0, adc:%d, "
"dac:%d, %d, %d]\n",
*adcDeviceIndex, *dacDeviceIndex, *dacDeviceIndex + 1,
*dacDeviceIndex + 2));
return OK;
}

View File

@ -79,7 +79,7 @@ int main(int argc, char *argv[]) {
"\t-v, --version : Software version\n"
"\t-p, --port <port> : TCP communication port with client. "
"\n"
"\t-g, --nomodule : [Mythen3][Gotthard2] \n"
"\t-g, --nomodule : [Mythen3][Gotthard2][Xilinx Ctb] \n"
"\t Generic or No Module mode. Skips "
"detector type checks. \n"
"\t-f, --phaseshift <value> : [Gotthard] only. Sets phase shift. \n"

View File

@ -9,7 +9,10 @@ add_executable(xilinx_ctbDetectorServer_virtual
../slsDetectorServer/src/common.c
../slsDetectorServer/src/sharedMemory.c
../slsDetectorServer/src/loadPattern.c
../slsDetectorServer/src/programViaArm.c
../slsDetectorServer/src/communication_funcs_UDP.c
../../slsSupportLib/src/md5.c
../slsDetectorServer/src/LTC2620_Driver.c
)
include_directories(
@ -23,11 +26,11 @@ target_include_directories(xilinx_ctbDetectorServer_virtual
)
target_compile_definitions(xilinx_ctbDetectorServer_virtual
PUBLIC XILINX_CHIPTESTBOARDD ARMPROCESSOR VIRTUAL STOP_SERVER
PUBLIC XILINX_CHIPTESTBOARDD ARMPROCESSOR VIRTUAL STOP_SERVER
)
target_link_libraries(xilinx_ctbDetectorServer_virtual
PUBLIC pthread rt slsProjectCSettings
PUBLIC pthread rt m slsProjectCSettings
)
set_target_properties(xilinx_ctbDetectorServer_virtual PROPERTIES

View File

@ -18,7 +18,7 @@ DESTDIR ?= bin
INSTMODE = 0777
SRCS = slsDetectorFunctionList.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)arm64.c $(main_src)common.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c
SRCS += $(main_src)slsDetectorServer.c $(main_src)slsDetectorServer_funcs.c $(main_src)communication_funcs.c $(main_src)arm64.c $(main_src)common.c $(main_src)/sharedMemory.c $(main_src)/loadPattern.c $(md5_dir)md5.c $(main_src)programViaArm.c $(main_src)LTC2620_Driver.c
OBJS = $(SRCS:.c=.o)

View File

@ -2,28 +2,48 @@
// Copyright (C) 2021 Contributors to the SLS Detector Package
#pragma once
#define CTRLREG1 (0x0)
#define CTRL_REG (0x0)
#define CTRLREG2 (0x4)
#define POWER_VIO_OFST (0)
#define POWER_VIO_MSK (0x00000001 << POWER_VIO_OFST)
#define POWER_VCC_A_OFST (1)
#define POWER_VCC_A_MSK (0x00000001 << POWER_VCC_A_OFST)
#define POWER_VCC_B_OFST (2)
#define POWER_VCC_B_MSK (0x00000001 << POWER_VCC_B_OFST)
#define POWER_VCC_C_OFST (3)
#define POWER_VCC_C_MSK (0x00000001 << POWER_VCC_C_OFST)
#define POWER_VCC_D_OFST (4)
#define POWER_VCC_D_MSK (0x00000001 << POWER_VCC_D_OFST)
#define EMPTY4REG (0x4)
#define STATUSREG1 (0x8)
#define TRANSMISSIONBUSY_OFST (0)
#define TRANSMISSIONBUSY_MSK (0x00000001 << TRANSMISSIONBUSY_OFST)
#define STATUSREG2 (0xC)
#define FPGAVERSIONREG (0x10)
#define COMPDATE_OFST (0)
#define COMPDATE_MSK (0x00ffffff << COMPDATE_OFST)
#define DETTYPE_OFST (24)
#define DETTYPE_MSK (0x000000ff << DETTYPE_OFST)
#define FPGACOMPDATE_OFST (0)
#define FPGACOMPDATE_MSK (0x00ffffff << FPGACOMPDATE_OFST)
#define FPGADETTYPE_OFST (24)
#define FPGADETTYPE_MSK (0x000000ff << FPGADETTYPE_OFST)
#define EMPTY14REG (0x14)
#define EMPTY18REG (0x18)
#define FIXEDPATTERNREG (0x18)
#define FIXEDPATTERNVAL (0xACDC2016)
#define EMPTY1CREG (0x1C)
#define EMPTY20REG (0x20)
#define APIVERSIONREG (0x20)
#define APICOMPDATE_OFST (0)
#define APICOMPDATE_MSK (0x00ffffff << APICOMPDATE_OFST)
#define APIDETTYPE_OFST (24)
#define APIDETTYPE_MSK (0x000000ff << APIDETTYPE_OFST)
#define EMPTY24REG (0x24)
@ -112,75 +132,75 @@
#define EMPTY9CREG (0x9C)
#define FLOWSTATUSREG (0x100)
#define FLOW_STATUS_REG (0x100)
#define RSMBUSY_OFST (0)
#define RSMBUSY_MSK (0x00000001 << RSMBUSY_OFST)
#define RSMTRGWAIT_OFST (3)
#define RSMTRGWAIT_MSK (0x00000001 << RSMTRGWAIT_OFST)
#define CSMBUSY_OFST (17)
#define CSMBUSY_MSK (0x00000001 << CSMBUSY_OFST)
#define RSM_BUSY_OFST (0)
#define RSM_BUSY_MSK (0x00000001 << RSM_BUSY_OFST)
#define RSM_TRG_WAIT_OFST (3)
#define RSM_TRG_WAIT_MSK (0x00000001 << RSM_TRG_WAIT_OFST)
#define CSM_BUSY_OFST (17)
#define CSM_BUSY_MSK (0x00000001 << CSM_BUSY_OFST)
#define EMPTY104REG (0x104)
#define FLOWCONTROLREG (0x108)
#define FLOW_CONTROL_REG (0x108)
#define STARTF_OFST (0)
#define STARTF_MSK (0x00000001 << STARTF_OFST)
#define STOPF_OFST (1)
#define STOPF_MSK (0x00000001 << STOPF_OFST)
#define RSTF_OFST (2)
#define RSTF_MSK (0x00000001 << RSTF_OFST)
#define SWTRIGGERF_OFST (3)
#define SWTRIGGERF_MSK (0x00000001 << SWTRIGGERF_OFST)
#define TRIGGERENABLE_OFST (4)
#define TRIGGERENABLE_MSK (0x00000001 << TRIGGERENABLE_OFST)
#define START_F_OFST (0)
#define START_F_MSK (0x00000001 << START_F_OFST)
#define STOP_F_OFST (1)
#define STOP_F_MSK (0x00000001 << STOP_F_OFST)
#define RST_F_OFST (2)
#define RST_F_MSK (0x00000001 << RST_F_OFST)
#define SW_TRIGGER_F_OFST (3)
#define SW_TRIGGER_F_MSK (0x00000001 << SW_TRIGGER_F_OFST)
#define TRIGGER_ENABLE_OFST (4)
#define TRIGGER_ENABLE_MSK (0x00000001 << TRIGGER_ENABLE_OFST)
#define EMPTY10CREG (0x10C)
#define TIMEFROMSTARTOUTREG1 (0x110)
#define TIME_FROM_START_OUT_REG_1 (0x110)
#define TIMEFROMSTARTOUTREG2 (0x114)
#define TIME_FROM_START_OUT_REG_2 (0x114)
#define FRAMESFROMSTARTOUTREG1 (0x118)
#define FRAMES_FROM_START_OUT_REG_1 (0x118)
#define FRAMESFROMSTARTOUTREG2 (0x11C)
#define FRAMES_FROM_START_OUT_REG_2 (0x11C)
#define FRAMETIMEOUTREG1 (0x120)
#define FRAME_TIME_OUT_REG_1 (0x120)
#define FRAMETIMEOUTREG2 (0x124)
#define FRAME_TIME_OUT_REG_2 (0x124)
#define DELAYOUTREG1 (0x128)
#define DELAY_OUT_REG_1 (0x128)
#define DELAYOUTREG2 (0x12C)
#define DELAY_OUT_REG_2 (0x12C)
#define CYCLESOUTREG1 (0x130)
#define CYCLES_OUT_REG_1 (0x130)
#define CYCLESOUTREG2 (0x134)
#define CYCLES_OUT_REG_2 (0x134)
#define FRAMESOUTREG1 (0x138)
#define FRAMES_OUT_REG_1 (0x138)
#define FRAMESOUTREG2 (0x13C)
#define FRAMES_OUT_REG_2 (0x13C)
#define PERIODOUTREG1 (0x140)
#define PERIOD_OUT_REG_1 (0x140)
#define PERIODOUTREG2 (0x144)
#define PERIOD_OUT_REG_2 (0x144)
#define DELAYINREG1 (0x148)
#define DELAY_IN_REG_1 (0x148)
#define DELAYINREG2 (0x14C)
#define DELAY_IN_REG_2 (0x14C)
#define CYCLESINREG1 (0x150)
#define CYCLES_IN_REG_1 (0x150)
#define CYCLESINREG2 (0x154)
#define CYCLES_IN_REG_2 (0x154)
#define FRAMESINREG1 (0x158)
#define FRAMES_IN_REG_1 (0x158)
#define FRAMESINREG2 (0x15C)
#define FRAMES_IN_REG_2 (0x15C)
#define PERIODINREG1 (0x160)
#define PERIOD_IN_REG_1 (0x160)
#define PERIODINREG2 (0x164)
#define PERIOD_IN_REG_2 (0x164)
#define EMPTY168REG (0x168)
@ -484,18 +504,15 @@
#define EMPTY3FCREG (0x3FC)
#define EXPCTRLREG (0x400)
#define STARTP_OFST (0)
#define STARTP_MSK (0x00000001 << STARTP_OFST)
#define EMPTY400REG (0x400)
#define EMPTY404REG (0x404)
#define EXPFRAMESREG (0x408)
#define EMPTY408REG (0x408)
#define EMPTY40CREG (0x40C)
#define EXPTIMEREG (0x410)
#define EMPTY410REG (0x410)
#define EMPTY414REG (0x414)
@ -615,47 +632,56 @@
#define EMPTY4FCREG (0x4FC)
#define FIFOTOGBCONTROLREG (0x500)
#define FIFO_TO_GB_CONTROL_REG (0x500)
#define ENABLEDCHANNELS_OFST (0)
#define ENABLEDCHANNELS_MSK (0x00001fff << ENABLEDCHANNELS_OFST)
#define ROMODE_OFST (13)
#define ROMODE_MSK (0x00000007 << ROMODE_OFST)
#define COUNTFRAMESFROMUPDATE_OFST (16)
#define COUNTFRAMESFROMUPDATE_MSK (0x00000001 << COUNTFRAMESFROMUPDATE_OFST)
#define STARTSTREAMING_P_OFST (17)
#define STARTSTREAMING_P_MSK (0x00000001 << STARTSTREAMING_P_OFST)
#define ENABLED_CHANNELS_ADC_OFST (0)
#define ENABLED_CHANNELS_ADC_MSK (0x000000ff << ENABLED_CHANNELS_ADC_OFST)
#define ENABLED_CHANNELS_D_OFST (8)
#define ENABLED_CHANNELS_D_MSK (0x00000001 << ENABLED_CHANNELS_D_OFST)
#define ENABLED_CHANNELS_X_OFST (9)
#define ENABLED_CHANNELS_X_MSK (0x0000000f << ENABLED_CHANNELS_X_OFST)
#define RO_MODE_ADC_OFST (13)
#define RO_MODE_ADC_MSK (0x00000001 << RO_MODE_ADC_OFST)
#define RO_MODE_D_OFST (14)
#define RO_MODE_D_MSK (0x00000001 << RO_MODE_D_OFST)
#define RO_MODE_X_OFST (15)
#define RO_MODE_X_MSK (0x00000001 << RO_MODE_X_OFST)
#define COUNT_FRAMES_FROM_UPDATE_OFST (16)
#define COUNT_FRAMES_FROM_UPDATE_MSK \
(0x00000001 << COUNT_FRAMES_FROM_UPDATE_OFST)
#define START_STREAMING_P_OFST (17)
#define START_STREAMING_P_MSK (0x00000001 << START_STREAMING_P_OFST)
#define EMPTY504REG (0x504)
#define NOSAMPLESDREG (0x508)
#define NO_SAMPLES_D_REG (0x508)
#define NOSAMPLESD_OFST (0)
#define NOSAMPLESD_MSK (0x00003fff << NOSAMPLESD_OFST)
#define NO_SAMPLES_D_OFST (0)
#define NO_SAMPLES_D_MSK (0x00003fff << NO_SAMPLES_D_OFST)
#define EMPTY50CREG (0x50C)
#define NOSAMPLESAREG (0x510)
#define NO_SAMPLES_A_REG (0x510)
#define NOSAMPLESA_OFST (0)
#define NOSAMPLESA_MSK (0x00003fff << NOSAMPLESA_OFST)
#define NO_SAMPLES_A_OFST (0)
#define NO_SAMPLES_A_MSK (0x00003fff << NO_SAMPLES_A_OFST)
#define EMPTY514REG (0x514)
#define NOSAMPLESXREG (0x518)
#define NO_SAMPLES_X_REG (0x518)
#define NOSAMPLESX_OFST (0)
#define NOSAMPLESX_MSK (0x00001fff << NOSAMPLESX_OFST)
#define NO_SAMPLES_X_OFST (0)
#define NO_SAMPLES_X_MSK (0x00001fff << NO_SAMPLES_X_OFST)
#define EMPTY51CREG (0x51C)
#define COUNTFRAMESFROMREG1 (0x520)
#define COUNT_FRAMES_FROM_REG_1 (0x520)
#define COUNTFRAMESFROMREG2 (0x524)
#define COUNT_FRAMES_FROM_REG_2 (0x524)
#define LOCALFRAMENUMBERREG1 (0x528)
#define LOCAL_FRAME_NUMBER_REG_1 (0x528)
#define LOCALFRAMENUMBERREG2 (0x52C)
#define LOCAL_FRAME_NUMBER_REG_2 (0x52C)
#define EMPTY530REG (0x530)
@ -697,51 +723,75 @@
#define EMPTY57CREG (0x57C)
#define EMPTY580REG (0x580)
#define A_FIFO_OVERFLOW_STATUS_REG (0x580)
#define EMPTY584REG (0x584)
#define EMPTY588REG (0x588)
#define A_FIFO_EMPTY_STATUS_REG (0x588)
#define EMPTY58CREG (0x58C)
#define EMPTY590REG (0x590)
#define A_FIFO_FULL_STATUS_REG (0x590)
#define EMPTY594REG (0x594)
#define EMPTY598REG (0x598)
#define D_FIFO_OVERFLOW_STATUS_REG (0x598)
#define D_FIFO_OVERFLOW_STATUS_OFST (0)
#define D_FIFO_OVERFLOW_STATUS_MSK (0x00000001 << D_FIFO_OVERFLOW_STATUS_OFST)
#define EMPTY59CREG (0x59C)
#define EMPTY5A0REG (0x5A0)
#define D_FIFO_EMPTY_STATUS_REG (0x5A0)
#define D_FIFO_EMPTY_STATUS_OFST (0)
#define D_FIFO_EMPTY_STATUS_MSK (0x00000001 << D_FIFO_EMPTY_STATUS_OFST)
#define EMPTY5A4REG (0x5A4)
#define EMPTY5A8REG (0x5A8)
#define D_FIFO_FULL_STATUS_REG (0x5A8)
#define D_FIFO_FULL_STATUS_OFST (0)
#define D_FIFO_FULL_STATUS_MSK (0x00000001 << D_FIFO_FULL_STATUS_OFST)
#define EMPTY5ACREG (0x5AC)
#define EMPTY5B0REG (0x5B0)
#define X_FIFO_OVERFLOW_STATUS_REG (0x5B0)
#define X_FIFO_OVERFLOW_STATUS_OFST (0)
#define X_FIFO_OVERFLOW_STATUS_MSK (0x0000000f << X_FIFO_OVERFLOW_STATUS_OFST)
#define EMPTY5B4REG (0x5B4)
#define EMPTY5B8REG (0x5B8)
#define X_FIFO_EMPTY_STATUS_REG (0x5B8)
#define X_FIFO_EMPTY_STATUS_OFST (0)
#define X_FIFO_EMPTY_STATUS_MSK (0x0000000f << X_FIFO_EMPTY_STATUS_OFST)
#define EMPTY5BCREG (0x5BC)
#define EMPTY5C0REG (0x5C0)
#define X_FIFO_FULL_STATUS_REG (0x5C0)
#define X_FIFO_FULL_STATUS_OFST (0)
#define X_FIFO_FULL_STATUS_MSK (0x0000000f << X_FIFO_FULL_STATUS_OFST)
#define EMPTY5C4REG (0x5C4)
#define EMPTY5C8REG (0x5C8)
#define A_FIFO_CLEAN_REG (0x5C8)
#define EMPTY5CCREG (0x5CC)
#define EMPTY5D0REG (0x5D0)
#define D_FIFO_CLEAN_REG (0x5D0)
#define D_FIFO_CLEAN_OFST (0)
#define D_FIFO_CLEAN_MSK (0x00000001 << D_FIFO_CLEAN_OFST)
#define EMPTY5D4REG (0x5D4)
#define EMPTY5D8REG (0x5D8)
#define X_FIFO_CLEAN_REG (0x5D8)
#define X_FIFO_CLEAN_OFST (0)
#define X_FIFO_CLEAN_MSK (0x0000000f << X_FIFO_CLEAN_OFST)
#define EMPTY5DCREG (0x5DC)
@ -777,6 +827,8 @@
#define STARTREAD_P_MSK (0x00000001 << STARTREAD_P_OFST)
#define BUSY_OFST (4)
#define BUSY_MSK (0x00000001 << BUSY_OFST)
#define READOUTFROMASIC_OFST (5)
#define READOUTFROMASIC_MSK (0x00000001 << READOUTFROMASIC_OFST)
#define EMPTY60CREG (0x60C)

View File

@ -4,7 +4,7 @@
#include "RegisterDefs.h"
#include "sls/sls_detector_defs.h"
#define REQRD_FRMWRE_VRSN (0x230000)
#define REQRD_FRMWRE_VRSN (0x230710)
#define KERNEL_DATE_VRSN "Wed Nov 29 17:32:14 CET 2023"
#define LINKED_SERVER_NAME "xilinx_ctbDetectorServer"
@ -12,16 +12,134 @@
#define CTRL_SRVR_INIT_TIME_US (2 * 1000 * 1000)
/* Hardware Definitions */
#define NCHAN (1)
#define NCHAN (40)
#define NCHAN_ANALOG (32)
#define NCHAN_DIGITAL (64)
#define NCHAN_TRANSCEIVER (4)
#define NBITS_PER_TRANSCEIVER (64)
#define NCHIP (1)
#define NDAC (24)
#define NPWR (6)
#define NDAC_ONLY (NDAC - NPWR)
enum ADCINDEX { V_PWR_IO };
enum DACINDEX { D0 };
#define DYNAMIC_RANGE (16)
#define NUM_BYTES_PER_PIXEL (DYNAMIC_RANGE / 8)
#define DAC_DRIVER_NUM_DEVICES (3)
#define DAC_DRIVER_FILE_NAME \
("/sys/bus/iio/devices/iio:device%d/out_voltage%d_raw")
#define DAC_POWERDOWN_DRIVER_FILE_NAME \
("/sys/bus/iio/devices/iio:device%d/out_voltage%d_powerdown")
#define SLOWADC_DRIVER_FILE_NAME \
("/sys/bus/iio/devices/iio:device%d/in_voltage%d_raw")
//#define SLOWDAC_CONVERTION_FACTOR_TO_UV (62.500953)
#define TEMP_DRIVER_FILE_NAME \
("/sys/bus/iio/devices/iio:device0/in_temp7_input")
/** Default Parameters */
#define DEFAULT_NUM_FRAMES (1)
#define DEFAULT_NUM_CYCLES (1)
#define DYNAMIC_RANGE (16)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_NUM_FRAMES (1)
#define DEFAULT_NUM_CYCLES (1)
#define DEFAULT_TIMING_MODE (AUTO_TIMING)
#define DEFAULT_EXPTIME (0)
#define DEFAULT_PERIOD (300 * 1000) // 300us
#define DEFAULT_READOUT_MODE (TRANSCEIVER_ONLY)
#define DEFAULT_READOUT_MODE_STR "transceiver_only"
#define DEFAULT_TRANSCEIVER_MASK (0x3) // TODO: check
#define DEFAULT_NUM_ASAMPLES (1)
#define DEFAULT_NUM_DSAMPLES (1)
#define DEFAULT_NUM_TSAMPLES (200)
#define DEFAULT_STARTING_FRAME_NUMBER (1)
#define DEFAULT_VLIMIT (-100)
#define DEFAULT_DELAY (0)
#define MAX_TRANSCEIVER_MASK (0xF)
#define MAX_TRANSCEIVER_SAMPLES (0x1FFF)
#define MAX_ANALOG_SAMPLES (0x3FFF)
#define MAX_DIGITAL_SAMPLES (0x3FFF)
#define DAC_MIN_MV (0)
#define DAC_MAX_MV (2500)
#define TICK_CLK (20) // MHz (trig_timeFromStart, frametime, timeFromStart)
#define RUN_CLK \
(100) // MHz (framesFromStart, c_swTrigger, run, waitForTrigger, starting,
// acquiring, waitForPeriod, internalStop, c_framesFromSTart_reset,
// s_start, c_stop, triggerEnable, period, frames, cycles, delay)
/* Defines in the Firmware */
#define WAIT_TIME_PATTERN_READ (10)
#define WAIT_TIME_PATTERN_READ (10)
#define WAIT_TIME_OUT_0US_TIMES (35000) // 2s
#define BIT32_MSK (0xFFFFFFFF)
#define BIT16_MASK (0xFFFF)
#define MAX_DATA_SIZE_IN_PACKET (8144)
/* Enum Definitions */
enum ADCINDEX {
S_ADC0,
S_ADC1,
S_ADC2,
S_ADC3,
S_ADC4,
S_ADC5,
S_ADC6,
S_ADC7,
TEMP_FPGA
};
enum DACINDEX {
D0,
D1,
D2,
D3,
D4,
D5,
D6,
D7,
D8,
D9,
D10,
D11,
D12,
D13,
D14,
D15,
D16,
D17,
D_PWR_D,
D_PWR_EMPTY,
D_PWR_IO,
D_PWR_A,
D_PWR_B,
D_PWR_C
};
/* Struct Definitions */
typedef struct udp_header_struct {
uint32_t udp_destmac_msb;
uint16_t udp_srcmac_msb;
uint16_t udp_destmac_lsb;
uint32_t udp_srcmac_lsb;
uint8_t ip_tos;
uint8_t ip_ihl : 4, ip_ver : 4;
uint16_t udp_ethertype;
uint16_t ip_identification;
uint16_t ip_totallength;
uint8_t ip_protocol;
uint8_t ip_ttl;
uint16_t ip_fragmentoffset : 13, ip_flags : 3;
uint16_t ip_srcip_msb;
uint16_t ip_checksum;
uint16_t ip_destip_msb;
uint16_t ip_srcip_lsb;
uint16_t udp_srcport;
uint16_t ip_destip_lsb;
uint16_t udp_checksum;
uint16_t udp_destport;
} udp_header;
#define IP_HEADER_SIZE (20)
#define UDP_IP_HEADER_LENGTH_BYTES (28)

View File

@ -80,7 +80,7 @@ _sd() {
local IS_PATH=0
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clearroi clientversion clkdiv clkfreq clkphase column compdisabletime confadc config counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 exptimel extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit patternX patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga roi romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clearroi clientversion clkdiv clkfreq clkphase column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 exptimel extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit patternX patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga roi romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
__acquire() {
FCN_RETURN=""
return 0
@ -477,6 +477,16 @@ fi
fi
return 0
}
__configtransceiver() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 1 ]]; then
if [[ "${cword}" == "2" ]]; then
FCN_RETURN=""
IS_PATH=1
fi
fi
return 0
}
__counters() {
FCN_RETURN=""
return 0

View File

@ -4,7 +4,7 @@
_sd() {
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clearroi clientversion clkdiv clkfreq clkphase column compdisabletime confadc config counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 exptimel extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit patternX patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga roi romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
local SLS_COMMANDS=" acquire activate adcclk adcenable adcenable10g adcindex adcinvert adclist adcname adcphase adcpipeline adcreg adcvpp apulse asamples autocompdisable badchannels blockingtrigger burstmode burstperiod bursts burstsl bustest cdsgain chipversion clearbit clearbusy clearroi clientversion clkdiv clkfreq clkphase column compdisabletime confadc config configtransceiver counters currentsource dac dacindex daclist dacname dacvalues datastream dbitclk dbitphase dbitpipeline defaultdac defaultpattern delay delayl detectorserverversion detsize diodelay dpulse dr drlist dsamples execcommand exptime exptime1 exptime2 exptime3 exptimel extrastoragecells extsampling extsamplingsrc extsig fformat filtercells filterresistor findex firmwaretest firmwareversion fliprows flowcontrol10g fmaster fname foverwrite fpath framecounter frames framesl frametime free fwrite gaincaps gainmode gappixels gatedelay gatedelay1 gatedelay2 gatedelay3 gates getbit hardwareversion highvoltage hostname im_a im_b im_c im_d im_io imagetest initialchecks inj_ch interpolation interruptsubframe kernelversion lastclient led lock master maxadcphaseshift maxclkphaseshift maxdbitphaseshift measuredperiod measuredsubperiod moduleid nextframenumber nmod numinterfaces overflow packageversion parallel parameters partialreset patfname patioctrl patlimits patloop patloop0 patloop1 patloop2 patmask patnloop patnloop0 patnloop1 patnloop2 patsetbit patternX patternstart patwait patwait0 patwait1 patwait2 patwaittime patwaittime0 patwaittime1 patwaittime2 patword pedestalmode period periodl polarity port powerchip powerindex powerlist powername powervalues programfpga pulse pulsechip pulsenmove pumpprobe quad ratecorr readnrows readout readoutspeed readoutspeedlist rebootcontroller reg resetdacs resetfpga roi romode row runclk runtime rx_arping rx_clearroi rx_dbitlist rx_dbitoffset rx_discardpolicy rx_fifodepth rx_frameindex rx_framescaught rx_framesperfile rx_hostname rx_jsonaddheader rx_jsonpara rx_lastclient rx_lock rx_missingpackets rx_padding rx_printconfig rx_realudpsocksize rx_roi rx_silent rx_start rx_status rx_stop rx_tcpport rx_threads rx_udpsocksize rx_version rx_zmqfreq rx_zmqhwm rx_zmqip rx_zmqport rx_zmqstartfnum rx_zmqstream samples savepattern scan scanerrmsg selinterface serialnumber setbit settings settingslist settingspath signalindex signallist signalname slowadc slowadcindex slowadclist slowadcname slowadcvalues start status stop stopport storagecell_delay storagecell_start subdeadtime subexptime sync syncclk temp_10ge temp_adc temp_control temp_dcdc temp_event temp_fpga temp_fpgaext temp_fpgafl temp_fpgafr temp_slowadc temp_sodl temp_sodr temp_threshold templist tempvalues tengiga threshold thresholdnotb timing timinglist timingsource top transceiverenable trigger triggers triggersl trimbits trimen trimval tsamples txdelay txdelay_frame txdelay_left txdelay_right type udp_cleardst udp_dstip udp_dstip2 udp_dstlist udp_dstmac udp_dstmac2 udp_dstport udp_dstport2 udp_firstdst udp_numdst udp_reconfigure udp_srcip udp_srcip2 udp_srcmac udp_srcmac2 udp_validate update updatedetectorserver updatekernel updatemode user v_a v_b v_c v_chip v_d v_io v_limit vchip_comp_adc vchip_comp_fe vchip_cs vchip_opa_1st vchip_opa_fd vchip_ref_comp_fe versions veto vetoalg vetofile vetophoton vetoref vetostream virtual vm_a vm_b vm_c vm_d vm_io zmqhwm zmqip zmqport "
__acquire() {
FCN_RETURN=""
return 0
@ -401,6 +401,16 @@ fi
fi
return 0
}
__configtransceiver() {
FCN_RETURN=""
if [[ ${IS_GET} -eq 1 ]]; then
if [[ "${cword}" == "2" ]]; then
FCN_RETURN=""
IS_PATH=1
fi
fi
return 0
}
__counters() {
FCN_RETURN=""
return 0

View File

@ -441,7 +441,7 @@ period:
function: setPeriod
delay:
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Moench] Delay after trigger"
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Moench][Xilinx Ctb] Delay after trigger"
inherit_actions: TIME_COMMAND
actions:
GET:
@ -496,14 +496,14 @@ burstperiod:
################# TIME_GET_COMMAND #############
delayl:
help: "\n\t[Gotthard][Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Delay Left in Acquisition. \n\t[Gotthard2] only in continuous mode."
help: "\n\t[Gotthard][Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Delay Left in Acquisition. \n\t[Gotthard2] only in continuous mode."
inherit_actions: TIME_GET_COMMAND
actions:
GET:
function: getDelayAfterTriggerLeft
periodl:
help: "\n\t[Gotthard][Jungfrau][Moench][Ctb][Mythen3][Gotthard2] Period left for current frame. \n\t[Gotthard2] only in continuous mode."
help: "\n\t[Gotthard][Jungfrau][Moench][Ctb][Mythen3][Gotthard2][Xilinx Ctb] Period left for current frame. \n\t[Gotthard2] only in continuous mode."
inherit_actions: TIME_GET_COMMAND
actions:
GET:
@ -531,14 +531,14 @@ exptimel:
function: getExptimeLeft
runtime:
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Time from detector start up.\n\t[Gotthard2] not in burst and auto mode."
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Time from detector start up.\n\t[Gotthard2] not in burst and auto mode."
inherit_actions: TIME_GET_COMMAND
actions:
GET:
function: getActualTime
frametime:
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Timestamp at a frame start.\n\t[Gotthard2] not in burst and auto mode."
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Timestamp at a frame start.\n\t[Gotthard2] not in burst and auto mode."
inherit_actions: TIME_GET_COMMAND
actions:
GET:
@ -622,7 +622,7 @@ adcenable10g:
function: setTenGigaADCEnableMask
transceiverenable:
help: "[bitmask]\n\t[Ctb] Transceiver Enable Mask. Enable for each 4 Transceiver channel."
help: "[bitmask]\n\t[Ctb][Xilinx Ctb] Transceiver Enable Mask. Enable for each 4 Transceiver channel."
inherit_actions: INTEGER_COMMAND_HEX
actions:
GET:
@ -707,7 +707,7 @@ highvoltage:
function: setHighVoltage
powerchip:
help: "[0, 1]\n\t[Jungfrau][Moench][Mythen3][Gotthard2] Power the chip. \n\t[Jungfrau][Moench] Default is 0. Get will return power status. Can be off if temperature event occured (temperature over temp_threshold with temp_control enabled. Will configure chip (only chip v1.1)\n\t[Mythen3][Gotthard2] Default is 1. If module not connected or wrong module, powerchip will fail."
help: "[0, 1]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] Power the chip. \n\t[Jungfrau][Moench] Default is 0. Get will return power status. Can be off if temperature event occured (temperature over temp_threshold with temp_control enabled. Will configure chip (only chip v1.1)\n\t[Mythen3][Gotthard2] Default is 1. If module not connected or wrong module, powerchip will fail.\n\t[Xilinx Ctb] Default is 0. Also configures the chip if powered on."
inherit_actions: INTEGER_COMMAND_VEC_ID
actions:
GET:
@ -764,7 +764,7 @@ readnrows:
function: setReadNRows
nextframenumber:
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Ctb] Next frame number. Stopping acquisition might result in different frame numbers for different modules."
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Ctb][Xilinx Ctb] Next frame number. Stopping acquisition might result in different frame numbers for different modules."
inherit_actions: INTEGER_COMMAND_VEC_ID
actions:
GET:
@ -1298,7 +1298,7 @@ dsamples:
function: setNumberOfDigitalSamples
tsamples:
help: "[n_value]\n\t[Ctb] Number of transceiver samples expected."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Number of transceiver samples expected."
inherit_actions: INTEGER_COMMAND_VEC_ID
actions:
GET:
@ -1307,7 +1307,7 @@ tsamples:
function: setNumberOfTransceiverSamples
romode:
help: "[analog|digital|analog_digital|transceiver|digital_transceiver]\n\t[Ctb] Readout mode. Default is analog."
help: "[analog|digital|analog_digital|transceiver|digital_transceiver]\n\t[Ctb][xilinx Ctb] Readout mode. [Ctb] Default is analog. [Xilinx Ctb] Default is Transceiver (only one implemented so far)"
inherit_actions: INTEGER_COMMAND_VEC_ID
actions:
GET:
@ -1555,7 +1555,7 @@ fmaster:
################# INTEGER_IND_COMMAND #######################
v_limit:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb] Soft limit for power supplies (ctb only) and DACS in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and DACS in mV."
actions:
GET:
function: getPower
@ -1566,7 +1566,7 @@ v_limit:
v_a:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb] Power supply a in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply a in mV."
actions:
GET:
function: getPower
@ -1577,7 +1577,7 @@ v_a:
v_b:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb] Power supply b in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply b in mV."
actions:
GET:
function: getPower
@ -1588,7 +1588,7 @@ v_b:
v_c:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb] Power supply c in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply c in mV."
actions:
GET:
function: getPower
@ -1599,7 +1599,7 @@ v_c:
v_d:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb] Power supply d in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply d in mV."
actions:
GET:
function: getPower
@ -1610,7 +1610,7 @@ v_d:
v_io:
inherit_actions: INTEGER_IND_COMMAND
help: "[n_value]\n\t[Ctb] Power supply io in mV. Minimum 1200 mV. Must be the first power regulator to be set after fpga reset (on-board detector server start up)."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply io in mV. Minimum 1200 mV. Must be the first power regulator to be set after fpga reset (on-board detector server start up)."
actions:
GET:
function: getPower
@ -1792,21 +1792,21 @@ patternstart:
resetfpga:
inherit_actions: EXECUTE_SET_COMMAND
help: "\n\t[Jungfrau][Moench][Ctb] Reset FPGA."
help: "\n\t[Jungfrau][Moench][Ctb][Xilinx Ctb] Reset FPGA."
actions:
PUT:
function: resetFPGA
rebootcontroller:
inherit_actions: EXECUTE_SET_COMMAND
help: "\n\t[Jungfrau][Moench][Ctb][Gotthard][Mythen3][Gotthard2] Reboot controller of detector."
help: "\n\t[Jungfrau][Moench][Ctb][Gotthard][Mythen3][Gotthard2][Xilinx Ctb] Reboot controller of detector."
actions:
PUT:
function: rebootController
firmwaretest:
inherit_actions: EXECUTE_SET_COMMAND
help: "\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb] Firmware test, ie. reads a read fixed pattern from a register."
help: "\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Firmware test, ie. reads a read fixed pattern from a register."
actions:
PUT:
function: executeFirmwareTest
@ -1818,6 +1818,13 @@ bustest:
PUT:
function: executeBusTest
configtransceiver:
inherit_actions: EXECUTE_SET_COMMAND
help: "\n\t[Xilinx Ctb] Waits for transceiver to be aligned. Chip had to be configured (powered on) before this."
actions:
PUT:
function: configureTransceiver
################# EXECUTE_SET_COMMAND_NOID_1ARG ##############
config:
inherit_actions: EXECUTE_SET_COMMAND_NOID_1ARG
@ -2011,7 +2018,7 @@ lastclient:
framecounter:
inherit_actions: GET_COMMAND
help: "\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Number of frames from start run control.\n\t[Gotthard2] only in continuous mode."
help: "\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Number of frames from start run control.\n\t[Gotthard2] only in continuous mode."
actions:
GET:
function: getNumberOfFramesFromStart
@ -2080,7 +2087,7 @@ temp_adc:
temp_fpga:
inherit_actions: GET_IND_COMMAND
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Gotthard][Mythen3][Gotthard2] FPGA Temperature"
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Xilinx CTB] FPGA Temperature"
actions:
GET:
function: getTemperature
@ -2307,7 +2314,7 @@ slowadcvalues:
GETFCNLIST: getSlowADCList
GETFCNNAME: getSlowADCNames
GETFCN: getSlowADC
suffix: "mV"
suffix: "uV"
printable_name: "*name_it++"
tempvalues:
@ -2818,7 +2825,7 @@ Exptime:
exptime:
inherit_actions: Exptime
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Eiger][Jungfrau][Moench][Gotthard][Gotthard2][Ctb] Exposure time\n\t[Mythen3] Exposure time of all gate signals in auto and trigger mode (internal gating). To specify gate index, use exptime1, exptime2, exptime3."
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Eiger][Jungfrau][Moench][Gotthard][Gotthard2][Ctb][Xilinx Ctb] Exposure time\n\t[Mythen3] Exposure time of all gate signals in auto and trigger mode (internal gating). To specify gate index, use exptime1, exptime2, exptime3."
actions:
GET:
function: getExptime

View File

@ -1615,6 +1615,28 @@ config:
help: "\n\tFrees shared memory before loading configuration file. Set up once."
infer_action: true
template: true
configtransceiver:
actions:
PUT:
args:
- arg_types: []
argc: 0
cast_input: []
check_det_id: false
convert_det_id: true
function: configureTransceiver
input: []
input_types: []
output:
- '"successful"'
require_det_id: true
store_result_in_t: false
command_name: configtransceiver
function_alias: configtransceiver
help: "\n\t[Xilinx Ctb] Waits for transceiver to be aligned. Chip had to be configured\
\ (powered on) before this."
infer_action: true
template: true
counters:
actions:
GET:
@ -2495,8 +2517,8 @@ delay:
store_result_in_t: false
command_name: delay
function_alias: delay
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Moench]\
\ Delay after trigger"
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Moench][Xilinx\
\ Ctb] Delay after trigger"
infer_action: true
template: true
delayl:
@ -2530,8 +2552,8 @@ delayl:
store_result_in_t: true
command_name: delayl
function_alias: delayl
help: "\n\t[Gotthard][Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Delay Left in Acquisition.\
\ \n\t[Gotthard2] only in continuous mode."
help: "\n\t[Gotthard][Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Delay\
\ Left in Acquisition. \n\t[Gotthard2] only in continuous mode."
infer_action: true
template: true
detectorserverversion:
@ -2891,9 +2913,10 @@ exptime:
store_result_in_t: false
command_name: exptime
function_alias: exptime
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Eiger][Jungfrau][Moench][Gotthard][Gotthard2][Ctb]\
\ Exposure time\n\t[Mythen3] Exposure time of all gate signals in auto and trigger\
\ mode (internal gating). To specify gate index, use exptime1, exptime2, exptime3."
help: "[duration] [(optional unit) ns|us|ms|s]\n\t[Eiger][Jungfrau][Moench][Gotthard][Gotthard2][Ctb][Xilinx\
\ Ctb] Exposure time\n\t[Mythen3] Exposure time of all gate signals in auto and\
\ trigger mode (internal gating). To specify gate index, use exptime1, exptime2,\
\ exptime3."
infer_action: true
template: true
exptime1:
@ -3610,8 +3633,8 @@ firmwaretest:
store_result_in_t: false
command_name: firmwaretest
function_alias: firmwaretest
help: "\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb] Firmware test,\
\ ie. reads a read fixed pattern from a register."
help: "\n\t[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Firmware\
\ test, ie. reads a read fixed pattern from a register."
infer_action: true
template: true
firmwareversion:
@ -3906,8 +3929,8 @@ framecounter:
store_result_in_t: true
command_name: framecounter
function_alias: framecounter
help: "\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Number of frames from start\
\ run control.\n\t[Gotthard2] only in continuous mode."
help: "\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Number of frames\
\ from start run control.\n\t[Gotthard2] only in continuous mode."
infer_action: true
template: true
frames:
@ -4005,8 +4028,8 @@ frametime:
store_result_in_t: true
command_name: frametime
function_alias: frametime
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb]\
\ Timestamp at a frame start.\n\t[Gotthard2] not in burst and auto mode."
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx\
\ Ctb] Timestamp at a frame start.\n\t[Gotthard2] not in burst and auto mode."
infer_action: true
template: true
free:
@ -5474,8 +5497,8 @@ nextframenumber:
store_result_in_t: false
command_name: nextframenumber
function_alias: nextframenumber
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Ctb] Next frame number. Stopping acquisition\
\ might result in different frame numbers for different modules."
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Ctb][Xilinx Ctb] Next frame number.\
\ Stopping acquisition might result in different frame numbers for different modules."
infer_action: true
template: true
nmod:
@ -7179,8 +7202,8 @@ periodl:
store_result_in_t: true
command_name: periodl
function_alias: periodl
help: "\n\t[Gotthard][Jungfrau][Moench][Ctb][Mythen3][Gotthard2] Period left for\
\ current frame. \n\t[Gotthard2] only in continuous mode."
help: "\n\t[Gotthard][Jungfrau][Moench][Ctb][Mythen3][Gotthard2][Xilinx Ctb] Period\
\ left for current frame. \n\t[Gotthard2] only in continuous mode."
infer_action: true
template: true
polarity:
@ -7299,11 +7322,12 @@ powerchip:
store_result_in_t: false
command_name: powerchip
function_alias: powerchip
help: "[0, 1]\n\t[Jungfrau][Moench][Mythen3][Gotthard2] Power the chip. \n\t[Jungfrau][Moench]\
\ Default is 0. Get will return power status. Can be off if temperature event\
\ occured (temperature over temp_threshold with temp_control enabled. Will configure\
\ chip (only chip v1.1)\n\t[Mythen3][Gotthard2] Default is 1. If module not connected\
\ or wrong module, powerchip will fail."
help: "[0, 1]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] Power the chip.\
\ \n\t[Jungfrau][Moench] Default is 0. Get will return power status. Can be off\
\ if temperature event occured (temperature over temp_threshold with temp_control\
\ enabled. Will configure chip (only chip v1.1)\n\t[Mythen3][Gotthard2] Default\
\ is 1. If module not connected or wrong module, powerchip will fail.\n\t[Xilinx\
\ Ctb] Default is 0. Also configures the chip if powered on."
infer_action: true
template: true
powerindex:
@ -7915,8 +7939,8 @@ rebootcontroller:
store_result_in_t: false
command_name: rebootcontroller
function_alias: rebootcontroller
help: "\n\t[Jungfrau][Moench][Ctb][Gotthard][Mythen3][Gotthard2] Reboot controller\
\ of detector."
help: "\n\t[Jungfrau][Moench][Ctb][Gotthard][Mythen3][Gotthard2][Xilinx Ctb] Reboot\
\ controller of detector."
infer_action: true
template: true
reg:
@ -8030,7 +8054,7 @@ resetfpga:
store_result_in_t: false
command_name: resetfpga
function_alias: resetfpga
help: "\n\t[Jungfrau][Moench][Ctb] Reset FPGA."
help: "\n\t[Jungfrau][Moench][Ctb][Xilinx Ctb] Reset FPGA."
infer_action: true
template: true
roi:
@ -8117,8 +8141,9 @@ romode:
store_result_in_t: false
command_name: romode
function_alias: romode
help: "[analog|digital|analog_digital|transceiver|digital_transceiver]\n\t[Ctb]\
\ Readout mode. Default is analog."
help: "[analog|digital|analog_digital|transceiver|digital_transceiver]\n\t[Ctb][xilinx\
\ Ctb] Readout mode. [Ctb] Default is analog. [Xilinx Ctb] Default is Transceiver\
\ (only one implemented so far)"
infer_action: true
template: true
row:
@ -8231,8 +8256,8 @@ runtime:
store_result_in_t: true
command_name: runtime
function_alias: runtime
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb]\
\ Time from detector start up.\n\t[Gotthard2] not in burst and auto mode."
help: "[(optional unit) ns|us|ms|s]\n\t[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx\
\ Ctb] Time from detector start up.\n\t[Gotthard2] not in burst and auto mode."
infer_action: true
template: true
rx_arping:
@ -10096,7 +10121,7 @@ slowadcvalues:
GETFCNLIST: getSlowADCList
GETFCNNAME: getSlowADCNames
printable_name: '*name_it++'
suffix: mV
suffix: uV
function: ''
input: []
input_types: []
@ -10759,8 +10784,8 @@ temp_fpga:
store_result_in_t: true
command_name: temp_fpga
function_alias: temp_fpga
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Gotthard][Mythen3][Gotthard2] FPGA\
\ Temperature"
help: "[n_value]\n\t[Eiger][Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Xilinx\
\ CTB] FPGA Temperature"
infer_action: true
template: true
temp_fpgaext:
@ -11371,8 +11396,8 @@ transceiverenable:
store_result_in_t: false
command_name: transceiverenable
function_alias: transceiverenable
help: "[bitmask]\n\t[Ctb] Transceiver Enable Mask. Enable for each 4 Transceiver\
\ channel."
help: "[bitmask]\n\t[Ctb][Xilinx Ctb] Transceiver Enable Mask. Enable for each 4\
\ Transceiver channel."
infer_action: true
template: true
trigger:
@ -11617,7 +11642,7 @@ tsamples:
store_result_in_t: false
command_name: tsamples
function_alias: tsamples
help: "[n_value]\n\t[Ctb] Number of transceiver samples expected."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Number of transceiver samples expected."
infer_action: true
template: true
txdelay:
@ -12578,7 +12603,7 @@ v_a:
store_result_in_t: false
command_name: v_a
function_alias: v_a
help: "[n_value]\n\t[Ctb] Power supply a in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply a in mV."
infer_action: true
template: true
v_b:
@ -12624,7 +12649,7 @@ v_b:
store_result_in_t: false
command_name: v_b
function_alias: v_b
help: "[n_value]\n\t[Ctb] Power supply b in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply b in mV."
infer_action: true
template: true
v_c:
@ -12670,7 +12695,7 @@ v_c:
store_result_in_t: false
command_name: v_c
function_alias: v_c
help: "[n_value]\n\t[Ctb] Power supply c in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply c in mV."
infer_action: true
template: true
v_chip:
@ -12763,7 +12788,7 @@ v_d:
store_result_in_t: false
command_name: v_d
function_alias: v_d
help: "[n_value]\n\t[Ctb] Power supply d in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply d in mV."
infer_action: true
template: true
v_io:
@ -12809,8 +12834,9 @@ v_io:
store_result_in_t: false
command_name: v_io
function_alias: v_io
help: "[n_value]\n\t[Ctb] Power supply io in mV. Minimum 1200 mV. Must be the first\
\ power regulator to be set after fpga reset (on-board detector server start up)."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Power supply io in mV. Minimum 1200 mV. Must\
\ be the first power regulator to be set after fpga reset (on-board detector server\
\ start up)."
infer_action: true
template: true
v_limit:
@ -12856,7 +12882,8 @@ v_limit:
store_result_in_t: false
command_name: v_limit
function_alias: v_limit
help: "[n_value]\n\t[Ctb] Soft limit for power supplies (ctb only) and DACS in mV."
help: "[n_value]\n\t[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and\
\ DACS in mV."
infer_action: true
template: true
vchip_comp_adc:

View File

@ -303,11 +303,11 @@ class Detector {
void setNumberOfTriggers(int64_t value);
/** [Gotthard][Jungfrau][Moench][Eiger][CTB][Gotthard2] \n
/** [Gotthard][Jungfrau][Moench][Eiger][CTB][Xilinx CTB][Gotthard2] \n
* [Mythen3] use function with gate index **/
Result<ns> getExptime(Positions pos = {}) const;
/** [Gotthard][Jungfrau][Moench][Eiger][CTB][Gotthard2] \n
/** [Gotthard][Jungfrau][Moench][Eiger][CTB][Xilinx CTB][Gotthard2] \n
* [Mythen3] sets exptime for all gate signals. To specify gate index, use
* function with gate index **/
void setExptime(ns t, Positions pos = {});
@ -316,10 +316,10 @@ class Detector {
void setPeriod(ns t, Positions pos = {});
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2] */
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2][Xilinx CTB] */
Result<ns> getDelayAfterTrigger(Positions pos = {}) const;
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2] */
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2][Xilinx CTB] */
void setDelayAfterTrigger(ns value, Positions pos = {});
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Xilinx CTB]
@ -330,11 +330,11 @@ class Detector {
* Only when external trigger used */
Result<int64_t> getNumberOfTriggersLeft(Positions pos = {}) const;
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2]
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Gotthard2][Xilinx CTB]
* [Gotthard2] only in continuous mode */
Result<ns> getPeriodLeft(Positions pos = {}) const;
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3]
/** [Gotthard][Jungfrau][Moench][CTB][Mythen3][Xilinx CTB]
* [Gotthard2] only in continuous mode */
Result<ns> getDelayAfterTriggerLeft(Positions pos = {}) const;
@ -456,16 +456,17 @@ class Detector {
*/
void setHighVoltage(int value, Positions pos = {});
/** [Jungfrau][Moench][Mythen3][Gotthard2] */
/** [Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] */
Result<bool> getPowerChip(Positions pos = {}) const;
/** [Jungfrau][Moench][Mythen3][Gotthard2] Power the chip. \n
/** [Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] Power the chip. \n
* Default is disabled. \n
* [Jungfrau][Moench] Default is disabled. Get will return power status. Can
* be off if temperature event occured (temperature over temp_threshold with
* temp_control enabled. Will configure chip (only chip v1.1)\n
* [Mythen3][Gotthard2] Default is 1. If module not connected or wrong
* module, powerchip will fail.
* module, powerchip will fail.\n
* [Xilinx CTB] Default is 0. Also configures chip if powered on.
*/
void setPowerChip(bool on, Positions pos = {});
@ -483,7 +484,7 @@ class Detector {
/**
* (Degrees)
* [Mythen3][Gotthard2] Options: TEMPERATURE_FPGA
* [Mythen3][Gotthard2][Xilinx Ctb] Options: TEMPERATURE_FPGA
* [Gotthard] Options: TEMPERATURE_ADC, TEMPERATURE_FPGA \n
* [Jungfrau][Moench] Options: TEMPERATURE_ADC, TEMPERATURE_FPGA \n
* [Eiger] Options: TEMPERATURE_FPGA, TEMPERATURE_FPGAEXT, TEMPERATURE_10GE,
@ -657,11 +658,11 @@ class Detector {
Result<std::vector<int64_t>>
getRxCurrentFrameIndex(Positions pos = {}) const;
/** [Eiger][Jungfrau][Moench][CTB] */
/** [Eiger][Jungfrau][Moench][CTB][Xilinx CTB] */
Result<uint64_t> getNextFrameNumber(Positions pos = {}) const;
/** [Eiger][Jungfrau][Moench][CTB] Stopping acquisition might result in
* different frame numbers for different modules.*/
/** [Eiger][Jungfrau][Moench][CTB][Xilinx CTB] Stopping acquisition might
* result in different frame numbers for different modules.*/
void setNextFrameNumber(uint64_t value, Positions pos = {});
/** [Eiger][Mythen3][Jungfrau][Moench] Sends an internal software trigger to
@ -1607,7 +1608,7 @@ class Detector {
///@{
/**************************************************
* *
* CTB Specific *
* CTB / Xilinx CTB Specific *
* *
* ************************************************/
/** [CTB] */
@ -1637,12 +1638,12 @@ class Detector {
/** gets list of slow adc enums */
std::vector<defs::dacIndex> getSlowADCList() const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
Result<int> getPower(defs::dacIndex index, Positions pos = {}) const;
/**
* [CTB] mV
* [Ctb] Options: V_LIMIT, V_POWER_A, V_POWER_B, V_POWER_C,
* [CTB][Xilinx CTB] mV
* [Ctb][Xilinx CTB] Options: V_LIMIT, V_POWER_A, V_POWER_B, V_POWER_C,
* V_POWER_D, V_POWER_IO, V_POWER_CHIP
*/
void setPower(defs::dacIndex index, int value, Positions pos = {});
@ -1668,39 +1669,30 @@ class Detector {
"complete 4 bits are enabled */
void setTenGigaADCEnableMask(uint32_t mask, Positions pos = {});
/** [CTB] */
/** [CTB][Xilinx CTB] */
Result<uint32_t> getTransceiverEnableMask(Positions pos = {}) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setTransceiverEnableMask(uint32_t mask, Positions pos = {});
///@}
/** @name CTB Specific */
///@{
/**************************************************
* *
* CTB Specific *
* *
* ************************************************/
/** [CTB] */
Result<int> getNumberOfDigitalSamples(Positions pos = {}) const;
/** [CTB] */
void setNumberOfDigitalSamples(int value, Positions pos = {});
/** [CTB] */
/** [CTB][Xilinx CTB] */
Result<int> getNumberOfTransceiverSamples(Positions pos = {}) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setNumberOfTransceiverSamples(int value, Positions pos = {});
/** [CTB] */
/** [CTB][Xilinx CTB] */
Result<defs::readoutMode> getReadoutMode(Positions pos = {}) const;
/** [CTB] Options: ANALOG_ONLY (default), DIGITAL_ONLY, ANALOG_AND_DIGITAL,
* TRANSCEIVER_ONLY, DIGITAL_AND_TRANSCEIVER
* [Xilinx CTB] Options: TRANSCEIVER_ONLY (default)
*/
void setReadoutMode(defs::readoutMode value, Positions pos = {});
@ -1722,7 +1714,7 @@ class Detector {
Result<int> getMeasuredCurrent(defs::dacIndex index,
Positions pos = {}) const;
/** [CTB] Options: SLOW_ADC0 - SLOW_ADC7 in uV */
/** [CTB][Xilinx CTB] Options: SLOW_ADC0 - SLOW_ADC7 in uV */
Result<int> getSlowADC(defs::dacIndex index, Positions pos = {}) const;
/** [CTB] */
@ -1764,81 +1756,95 @@ class Detector {
/** [CTB] Default is enabled. */
void setLEDEnable(bool enable, Positions pos = {});
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setDacNames(const std::vector<std::string> names);
/** [CTB][Xilinx CTB] */
std::vector<std::string> getDacNames() const;
/** [CTB][Xilinx CTB] */
defs::dacIndex getDacIndex(const std::string &name) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setDacName(const defs::dacIndex i, const std::string &name);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::string getDacName(const defs::dacIndex i) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setAdcNames(const std::vector<std::string> names);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::vector<std::string> getAdcNames() const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
int getAdcIndex(const std::string &name) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setAdcName(const int i, const std::string &name);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::string getAdcName(const int i) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setSignalNames(const std::vector<std::string> names);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::vector<std::string> getSignalNames() const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
int getSignalIndex(const std::string &name) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setSignalName(const int i, const std::string &name);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::string getSignalName(const int i) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setPowerNames(const std::vector<std::string> names);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::vector<std::string> getPowerNames() const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
defs::dacIndex getPowerIndex(const std::string &name) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setPowerName(const defs::dacIndex i, const std::string &name);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::string getPowerName(const defs::dacIndex i) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setSlowADCNames(const std::vector<std::string> names);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::vector<std::string> getSlowADCNames() const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
defs::dacIndex getSlowADCIndex(const std::string &name) const;
/** [CTB] */
/** [CTB][Xilinx CTB] */
void setSlowADCName(const defs::dacIndex i, const std::string &name);
/** [CTB] */
/** [CTB][Xilinx CTB] */
std::string getSlowADCName(const defs::dacIndex i) const;
///@}
/** @name Xilinx CTB Specific */
///@{
/**************************************************
* *
* Xilinx CTB Specific *
* *
* ************************************************/
///@}
/** [Xilinx Ctb] */
void configureTransceiver(Positions pos = {});
/** @name Pattern */
///@{
/**************************************************
@ -1986,7 +1992,7 @@ class Detector {
void programFPGA(const std::string &fname, const bool forceDeleteNormalFile,
Positions pos = {});
/** [Jungfrau][Moench][CTB] Advanced user Function! */
/** [Jungfrau][Moench][CTB][Xilinx CTB] Advanced user Function! */
void resetFPGA(Positions pos = {});
/** [Jungfrau][Moench][Eiger][Ctb][Mythen3][Gotthard2] Copies detector
@ -2004,8 +2010,8 @@ class Detector {
*/
void updateKernel(const std::string &fname, Positions pos = {});
/** [Jungfrau][Moench][Gotthard][CTB][Mythen3][Gotthard2] Advanced user
* Function! */
/** [Jungfrau][Moench][Gotthard][CTB][Mythen3][Gotthard2][Xilinx CTB]
* Advanced user Function! */
void rebootController(Positions pos = {});
/**
@ -2109,16 +2115,16 @@ class Detector {
Result<std::string> executeCommand(const std::string &value,
Positions pos = {});
/** [Jungfrau][Moench][Mythen3][CTB]
/** [Jungfrau][Moench][Mythen3][CTB][Xilinx CTB]
* [Gotthard2] only in continuous mode */
Result<int64_t> getNumberOfFramesFromStart(Positions pos = {}) const;
/** [Jungfrau][Moench][Mythen3][CTB] Get time from detector start
* [Gotthard2] not in burst and auto mode */
/** [Jungfrau][Moench][Mythen3][CTB][Xilinx CTB] Get time from detector
* start [Gotthard2] not in burst and auto mode */
Result<ns> getActualTime(Positions pos = {}) const;
/** [Jungfrau][Moench][Mythen3][CTB] Get timestamp at a frame start
* [Gotthard2] not in burst and auto mode */
/** [Jungfrau][Moench][Mythen3][CTB][Xilinx CTB] Get timestamp at a frame
* start [Gotthard2] not in burst and auto mode */
Result<ns> getMeasurementTime(Positions pos = {}) const;
/** get user details from shared memory (hostname, type, PID, User, Date)

View File

@ -2247,6 +2247,46 @@ std::string Caller::config(int action) {
return os.str();
}
std::string Caller::configtransceiver(int action) {
std::ostringstream os;
// print help
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: configtransceiver" << std::endl;
os << R"V0G0N(
[Xilinx Ctb] Waits for transceiver to be aligned. Chip had to be configured (powered on) before this. )V0G0N"
<< std::endl;
return os.str();
}
// check if action and arguments are valid
if (action == slsDetectorDefs::PUT_ACTION) {
if (1 && args.size() != 0) {
throw RuntimeError("Wrong number of arguments for action PUT");
}
if (args.size() == 0) {
}
}
else {
throw RuntimeError(
"INTERNAL ERROR: Invalid action: supported actions are ['PUT']");
}
// generate code for each action
if (action == slsDetectorDefs::PUT_ACTION) {
if (args.size() == 0) {
det->configureTransceiver(std::vector<int>{det_id});
os << "successful" << '\n';
}
}
return os.str();
}
std::string Caller::dac(int action) {
std::ostringstream os;
@ -3161,7 +3201,7 @@ std::string Caller::delay(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: delay" << std::endl;
os << R"V0G0N([duration] [(optional unit) ns|us|ms|s]
[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Moench] Delay after trigger )V0G0N"
[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Moench][Xilinx Ctb] Delay after trigger )V0G0N"
<< std::endl;
return os.str();
}
@ -3250,7 +3290,7 @@ std::string Caller::delayl(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: delayl" << std::endl;
os << R"V0G0N(
[Gotthard][Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Delay Left in Acquisition.
[Gotthard][Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Delay Left in Acquisition.
[Gotthard2] only in continuous mode. )V0G0N"
<< std::endl;
return os.str();
@ -3685,7 +3725,7 @@ std::string Caller::exptime(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: exptime" << std::endl;
os << R"V0G0N([duration] [(optional unit) ns|us|ms|s]
[Eiger][Jungfrau][Moench][Gotthard][Gotthard2][Ctb] Exposure time
[Eiger][Jungfrau][Moench][Gotthard][Gotthard2][Ctb][Xilinx Ctb] Exposure time
[Mythen3] Exposure time of all gate signals in auto and trigger mode (internal gating). To specify gate index, use exptime1, exptime2, exptime3. )V0G0N"
<< std::endl;
return os.str();
@ -4666,7 +4706,7 @@ std::string Caller::firmwaretest(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: firmwaretest" << std::endl;
os << R"V0G0N(
[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb] Firmware test, ie. reads a read fixed pattern from a register. )V0G0N"
[Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Firmware test, ie. reads a read fixed pattern from a register. )V0G0N"
<< std::endl;
return os.str();
}
@ -5132,7 +5172,7 @@ std::string Caller::framecounter(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: framecounter" << std::endl;
os << R"V0G0N(
[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Number of frames from start run control.
[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Number of frames from start run control.
[Gotthard2] only in continuous mode. )V0G0N"
<< std::endl;
return os.str();
@ -5283,7 +5323,7 @@ std::string Caller::frametime(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: frametime" << std::endl;
os << R"V0G0N([(optional unit) ns|us|ms|s]
[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Timestamp at a frame start.
[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Timestamp at a frame start.
[Gotthard2] not in burst and auto mode. )V0G0N"
<< std::endl;
return os.str();
@ -7224,7 +7264,7 @@ std::string Caller::nextframenumber(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: nextframenumber" << std::endl;
os << R"V0G0N([n_value]
[Eiger][Jungfrau][Moench][Ctb] Next frame number. Stopping acquisition might result in different frame numbers for different modules. )V0G0N"
[Eiger][Jungfrau][Moench][Ctb][Xilinx Ctb] Next frame number. Stopping acquisition might result in different frame numbers for different modules. )V0G0N"
<< std::endl;
return os.str();
}
@ -9141,7 +9181,7 @@ std::string Caller::periodl(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: periodl" << std::endl;
os << R"V0G0N(
[Gotthard][Jungfrau][Moench][Ctb][Mythen3][Gotthard2] Period left for current frame.
[Gotthard][Jungfrau][Moench][Ctb][Mythen3][Gotthard2][Xilinx Ctb] Period left for current frame.
[Gotthard2] only in continuous mode. )V0G0N"
<< std::endl;
return os.str();
@ -9317,9 +9357,10 @@ std::string Caller::powerchip(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: powerchip" << std::endl;
os << R"V0G0N([0, 1]
[Jungfrau][Moench][Mythen3][Gotthard2] Power the chip.
[Jungfrau][Moench][Mythen3][Gotthard2][Xilinx Ctb] Power the chip.
[Jungfrau][Moench] Default is 0. Get will return power status. Can be off if temperature event occured (temperature over temp_threshold with temp_control enabled. Will configure chip (only chip v1.1)
[Mythen3][Gotthard2] Default is 1. If module not connected or wrong module, powerchip will fail. )V0G0N"
[Mythen3][Gotthard2] Default is 1. If module not connected or wrong module, powerchip will fail.
[Xilinx Ctb] Default is 0. Also configures the chip if powered on. )V0G0N"
<< std::endl;
return os.str();
}
@ -10230,7 +10271,7 @@ std::string Caller::rebootcontroller(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: rebootcontroller" << std::endl;
os << R"V0G0N(
[Jungfrau][Moench][Ctb][Gotthard][Mythen3][Gotthard2] Reboot controller of detector. )V0G0N"
[Jungfrau][Moench][Ctb][Gotthard][Mythen3][Gotthard2][Xilinx Ctb] Reboot controller of detector. )V0G0N"
<< std::endl;
return os.str();
}
@ -10399,7 +10440,7 @@ std::string Caller::resetfpga(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: resetfpga" << std::endl;
os << R"V0G0N(
[Jungfrau][Moench][Ctb] Reset FPGA. )V0G0N"
[Jungfrau][Moench][Ctb][Xilinx Ctb] Reset FPGA. )V0G0N"
<< std::endl;
return os.str();
}
@ -10505,7 +10546,7 @@ std::string Caller::romode(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: romode" << std::endl;
os << R"V0G0N([analog|digital|analog_digital|transceiver|digital_transceiver]
[Ctb] Readout mode. Default is analog. )V0G0N"
[Ctb][xilinx Ctb] Readout mode. [Ctb] Default is analog. [Xilinx Ctb] Default is Transceiver (only one implemented so far) )V0G0N"
<< std::endl;
return os.str();
}
@ -10696,7 +10737,7 @@ std::string Caller::runtime(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: runtime" << std::endl;
os << R"V0G0N([(optional unit) ns|us|ms|s]
[Jungfrau][Moench][Mythen3][Gotthard2][Ctb] Time from detector start up.
[Jungfrau][Moench][Mythen3][Gotthard2][Ctb][Xilinx Ctb] Time from detector start up.
[Gotthard2] not in burst and auto mode. )V0G0N"
<< std::endl;
return os.str();
@ -13298,7 +13339,7 @@ std::string Caller::slowadcvalues(int action) {
if (action == slsDetectorDefs::GET_ACTION) {
if (args.size() == 0) {
std::string suffix = " mV";
std::string suffix = " uV";
auto t = det->getSlowADCList();
auto names = det->getSlowADCNames();
@ -14215,7 +14256,7 @@ std::string Caller::temp_fpga(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: temp_fpga" << std::endl;
os << R"V0G0N([n_value]
[Eiger][Jungfrau][Moench][Gotthard][Mythen3][Gotthard2] FPGA Temperature )V0G0N"
[Eiger][Jungfrau][Moench][Gotthard][Mythen3][Gotthard2][Xilinx CTB] FPGA Temperature )V0G0N"
<< std::endl;
return os.str();
}
@ -14960,7 +15001,7 @@ std::string Caller::transceiverenable(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: transceiverenable" << std::endl;
os << R"V0G0N([bitmask]
[Ctb] Transceiver Enable Mask. Enable for each 4 Transceiver channel. )V0G0N"
[Ctb][Xilinx Ctb] Transceiver Enable Mask. Enable for each 4 Transceiver channel. )V0G0N"
<< std::endl;
return os.str();
}
@ -15294,7 +15335,7 @@ std::string Caller::tsamples(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: tsamples" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Number of transceiver samples expected. )V0G0N"
[Ctb][Xilinx Ctb] Number of transceiver samples expected. )V0G0N"
<< std::endl;
return os.str();
}
@ -16568,7 +16609,7 @@ std::string Caller::v_a(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: v_a" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Power supply a in mV. )V0G0N"
[Ctb][Xilinx Ctb] Power supply a in mV. )V0G0N"
<< std::endl;
return os.str();
}
@ -16631,7 +16672,7 @@ std::string Caller::v_b(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: v_b" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Power supply b in mV. )V0G0N"
[Ctb][Xilinx Ctb] Power supply b in mV. )V0G0N"
<< std::endl;
return os.str();
}
@ -16694,7 +16735,7 @@ std::string Caller::v_c(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: v_c" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Power supply c in mV. )V0G0N"
[Ctb][Xilinx Ctb] Power supply c in mV. )V0G0N"
<< std::endl;
return os.str();
}
@ -16821,7 +16862,7 @@ std::string Caller::v_d(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: v_d" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Power supply d in mV. )V0G0N"
[Ctb][Xilinx Ctb] Power supply d in mV. )V0G0N"
<< std::endl;
return os.str();
}
@ -16884,7 +16925,7 @@ std::string Caller::v_io(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: v_io" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Power supply io in mV. Minimum 1200 mV. Must be the first power regulator to be set after fpga reset (on-board detector server start up). )V0G0N"
[Ctb][Xilinx Ctb] Power supply io in mV. Minimum 1200 mV. Must be the first power regulator to be set after fpga reset (on-board detector server start up). )V0G0N"
<< std::endl;
return os.str();
}
@ -16947,7 +16988,7 @@ std::string Caller::v_limit(int action) {
if (action == slsDetectorDefs::HELP_ACTION) {
os << "Command: v_limit" << std::endl;
os << R"V0G0N([n_value]
[Ctb] Soft limit for power supplies (ctb only) and DACS in mV. )V0G0N"
[Ctb][Xilinx Ctb] Soft limit for power supplies (ctb only) and DACS in mV. )V0G0N"
<< std::endl;
return os.str();
}

View File

@ -93,6 +93,7 @@ class Caller {
std::string compdisabletime(int action);
std::string confadc(int action);
std::string config(int action);
std::string configtransceiver(int action);
std::string counters(int action);
std::string currentsource(int action);
std::string dac(int action);
@ -435,6 +436,7 @@ class Caller {
{"compdisabletime", &Caller::compdisabletime},
{"confadc", &Caller::confadc},
{"config", &Caller::config},
{"configtransceiver", &Caller::configtransceiver},
{"counters", &Caller::counters},
{"currentsource", &Caller::currentsource},
{"dac", &Caller::dac},

View File

@ -232,7 +232,6 @@ std::string Caller::acquire(int action) {
if (det_id >= 0) {
throw RuntimeError("Individual detectors not allowed for readout.");
}
det->acquire();
if (det->getUseReceiverFlag().squash(false)) {

View File

@ -667,6 +667,7 @@ std::vector<defs::dacIndex> Detector::getTemperatureList() const {
defs::TEMPERATURE_FPGA2, defs::TEMPERATURE_FPGA3};
case defs::MYTHEN3:
case defs::GOTTHARD2:
case defs::XILINX_CHIPTESTBOARD:
return std::vector<defs::dacIndex>{defs::TEMPERATURE_FPGA};
default:
return std::vector<defs::dacIndex>{};
@ -697,6 +698,7 @@ Result<int> Detector::getTemperature(defs::dacIndex index,
case defs::MOENCH:
case defs::MYTHEN3:
case defs::GOTTHARD2:
case defs::XILINX_CHIPTESTBOARD:
for (auto &it : res) {
it /= 1000;
}
@ -2486,6 +2488,12 @@ std::string Detector::getSlowADCName(const defs::dacIndex i) const {
return pimpl->getCtbSlowADCName(i);
}
// Xilinx Ctb Specific
void Detector::configureTransceiver(Positions pos) {
pimpl->Parallel(&Module::configureTransceiver, pos);
}
// Pattern
Result<std::string> Detector::getPatterFileName(Positions pos) const {

View File

@ -1375,7 +1375,7 @@ void DetectorImpl::stopDetector(Positions pos) {
void DetectorImpl::printProgress(double progress) {
// spaces for python printout
std::cout << " " << std::fixed << std::setprecision(2) << std::setw(6)
std::cout << " " << std::fixed << std::setprecision(2) << std::setw(10)
<< progress << " \%";
std::cout << '\r' << std::flush;
}

View File

@ -2383,6 +2383,7 @@ void Module::setNumberOfAnalogSamples(int value) {
// update #nchan, as it depends on #samples, adcmask
updateNumberOfChannels();
if (shm()->useReceiverFlag) {
LOG(logINFORED) << "receiver up!";
sendToReceiver(F_RECEIVER_SET_NUM_ANALOG_SAMPLES, value, nullptr);
}
}
@ -2531,6 +2532,13 @@ void Module::setLEDEnable(bool enable) {
sendToDetector<int>(F_LED, static_cast<int>(enable));
}
// Xilinx Ctb Specific
void Module::configureTransceiver() {
sendToDetector(F_CONFIG_TRANSCEIVER);
LOG(logINFO) << "Module " << moduleIndex << " (" << shm()->hostname
<< "): Transceiver configured successfully!";
}
// Pattern
std::string Module::getPatterFileName() const {
char retval[MAX_STR_LENGTH]{};
@ -3334,7 +3342,13 @@ void Module::initializeModuleStructure(detectorType type) {
shm()->numberOfModule.y = 0;
shm()->controlPort = DEFAULT_TCP_CNTRL_PORTNO;
shm()->stopPort = DEFAULT_TCP_STOP_PORTNO;
strcpy_safe(shm()->settingsDir, getenv("HOME"));
char *home_directory = getenv("HOME");
if (home_directory != nullptr)
strcpy_safe(shm()->settingsDir, home_directory);
else {
strcpy_safe(shm()->settingsDir, "");
LOG(logWARNING) << "HOME directory not set";
}
strcpy_safe(shm()->rxHostname, "none");
shm()->rxTCPPort = DEFAULT_TCP_RX_PORTNO + moduleIndex;
shm()->useReceiverFlag = false;

View File

@ -528,6 +528,13 @@ class Module : public virtual slsDetectorDefs {
bool getLEDEnable() const;
void setLEDEnable(bool enable);
/**************************************************
* *
* Xilinx Ctb Specific *
* *
* ************************************************/
void configureTransceiver();
/**************************************************
* *
* Pattern *

View File

@ -562,6 +562,18 @@ int InferAction::config() {
}
}
int InferAction::configtransceiver() {
if (args.size() == 0) {
return slsDetectorDefs::PUT_ACTION;
}
else {
throw RuntimeError("Could not infer action: Wrong number of arguments");
}
}
int InferAction::counters() {
throw RuntimeError("sls_detector is disabled for command: counters. Use "

View File

@ -48,6 +48,7 @@ class InferAction {
int compdisabletime();
int confadc();
int config();
int configtransceiver();
int counters();
int currentsource();
int dac();
@ -381,6 +382,7 @@ class InferAction {
{"compdisabletime", &InferAction::compdisabletime},
{"confadc", &InferAction::confadc},
{"config", &InferAction::config},
{"configtransceiver", &InferAction::configtransceiver},
{"counters", &InferAction::counters},
{"currentsource", &InferAction::currentsource},
{"dac", &InferAction::dac},

View File

@ -15,6 +15,7 @@ target_sources(tests PRIVATE
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-gotthard2.cpp
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-gotthard.cpp
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-chiptestboard.cpp
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-xilinx-chiptestboard.cpp
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-moench.cpp
${CMAKE_CURRENT_SOURCE_DIR}/Caller/test-Caller-global.cpp

View File

@ -368,7 +368,8 @@ TEST_CASE("CALLER::powervalues", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
REQUIRE_NOTHROW(caller.call("powervalues", {}, -1, GET));
REQUIRE_THROWS(caller.call("powervalues", {}, -1, PUT));
} else {
@ -380,7 +381,8 @@ TEST_CASE("CALLER::slowadcvalues", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
REQUIRE_NOTHROW(caller.call("slowadcvalues", {}, -1, GET));
REQUIRE_THROWS(caller.call("slowadcvalues", {}, -1, PUT));
} else {
@ -496,12 +498,7 @@ TEST_CASE("CALLER::dac", "[.cmdcall][.dacs]") {
det_type == defs::XILINX_CHIPTESTBOARD) {
for (int i = 0; i < 18; ++i) {
SECTION("dac " + std::to_string(i)) {
if (det_type == defs::CHIPTESTBOARD) {
test_dac_caller(static_cast<defs::dacIndex>(i), "dac", 0);
} else {
REQUIRE_THROWS(
caller.call("dac", {std::to_string(i)}, -1, GET));
}
test_dac_caller(static_cast<defs::dacIndex>(i), "dac", 0);
}
}
@ -613,12 +610,10 @@ TEST_CASE("CALLER::samples", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_asamples = det.getNumberOfAnalogSamples();
Result<int> prev_dsamples = 0;
if (det_type == defs::CHIPTESTBOARD) {
prev_dsamples = det.getNumberOfDigitalSamples();
}
auto prev_dsamples = det.getNumberOfDigitalSamples();
{
std::ostringstream oss;
caller.call("samples", {"25"}, -1, PUT, oss);
@ -639,16 +634,15 @@ TEST_CASE("CALLER::samples", "[.cmdcall]") {
caller.call("asamples", {}, -1, GET, oss);
REQUIRE(oss.str() == "asamples 450\n");
}
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
std::ostringstream oss;
caller.call("dsamples", {}, -1, GET, oss);
REQUIRE(oss.str() == "dsamples 450\n");
}
for (int i = 0; i != det.size(); ++i) {
det.setNumberOfAnalogSamples(prev_asamples[i], {i});
if (det_type == defs::CHIPTESTBOARD) {
det.setNumberOfDigitalSamples(prev_dsamples[i], {i});
}
det.setNumberOfDigitalSamples(prev_dsamples[i], {i});
}
} else {
REQUIRE_THROWS(caller.call("samples", {}, -1, GET));
@ -660,7 +654,8 @@ TEST_CASE("CALLER::asamples", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getNumberOfAnalogSamples();
{
std::ostringstream oss;
@ -764,7 +759,8 @@ TEST_CASE("CALLER::v_limit", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getPower(defs::V_LIMIT);
{
std::ostringstream oss;
@ -832,7 +828,8 @@ TEST_CASE("CALLER::adcenable10g", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getTenGigaADCEnableMask();
{
std::ostringstream oss;
@ -862,7 +859,8 @@ TEST_CASE("CALLER::transceiverenable", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getTransceiverEnableMask();
{
std::ostringstream oss;
@ -894,7 +892,8 @@ TEST_CASE("CALLER::dsamples", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getNumberOfDigitalSamples();
{
std::ostringstream oss;
@ -924,7 +923,8 @@ TEST_CASE("CALLER::tsamples", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getNumberOfTransceiverSamples();
{
std::ostringstream oss;
@ -953,7 +953,8 @@ TEST_CASE("CALLER::romode", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_romode = det.getReadoutMode();
auto prev_asamples = det.getNumberOfAnalogSamples();
auto prev_dsamples = det.getNumberOfDigitalSamples();
@ -1037,7 +1038,8 @@ TEST_CASE("CALLER::v_a", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getPower(defs::V_POWER_A);
{
std::ostringstream oss1, oss2;
@ -1058,7 +1060,8 @@ TEST_CASE("CALLER::v_b", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getPower(defs::V_POWER_B);
{
std::ostringstream oss1, oss2;
@ -1079,7 +1082,8 @@ TEST_CASE("CALLER::v_c", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getPower(defs::V_POWER_C);
{
std::ostringstream oss1, oss2;
@ -1100,7 +1104,8 @@ TEST_CASE("CALLER::v_d", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getPower(defs::V_POWER_D);
{
std::ostringstream oss1, oss2;
@ -1121,7 +1126,8 @@ TEST_CASE("CALLER::v_io", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
// better not to play with setting it
REQUIRE_NOTHROW(caller.call("v_io", {}, -1, GET));
} else {
@ -1251,11 +1257,12 @@ TEST_CASE("CALLER::im_io", "[.cmdcall]") {
}
}
TEST_CASE("CALLER::adc", "[.cmdcall]") {
TEST_CASE("CALLER::slowadc", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
for (int i = 0; i <= 7; ++i) {
REQUIRE_NOTHROW(
caller.call("slowadc", {std::to_string(i)}, -1, GET));

View File

@ -81,9 +81,10 @@ TEST_CASE("Caller::patioctrl", "[.cmdcall]") {
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::CHIPTESTBOARD) {
if (det_type == defs::CHIPTESTBOARD ||
det_type == defs::XILINX_CHIPTESTBOARD) {
auto prev_val = det.getPatternIOControl();
{
if (det_type == defs::CHIPTESTBOARD) {
std::ostringstream oss;
caller.call("patioctrl", {"0xc15004808d0a21a4"}, -1, PUT, oss);
REQUIRE(oss.str() == "patioctrl 0xc15004808d0a21a4\n");

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,35 @@
// SPDX-License-Identifier: LGPL-3.0-or-other
// Copyright (C) 2021 Contributors to the SLS Detector Package
#include "Caller.h"
#include "catch.hpp"
#include "sls/Detector.h"
#include "sls/sls_detector_defs.h"
#include <sstream>
#include "sls/Result.h"
#include "sls/ToString.h"
#include "sls/versionAPI.h"
#include "test-Caller-global.h"
#include "tests/globals.h"
namespace sls {
using test::GET;
using test::PUT;
/* dacs */
TEST_CASE("CALLER::configtransceiver", "[.cmdcall]") {
Detector det;
Caller caller(&det);
auto det_type = det.getDetectorType().squash();
if (det_type == defs::XILINX_CHIPTESTBOARD) {
REQUIRE_THROWS(caller.call("configtransceiver", {}, -1, GET));
REQUIRE_NOTHROW(caller.call("configtransceiver", {}, -1, PUT));
} else {
REQUIRE_THROWS(caller.call("configtransceiver", {}, -1, PUT));
REQUIRE_THROWS(caller.call("configtransceiver", {}, -1, GET));
}
}
} // namespace sls

File diff suppressed because it is too large Load Diff

View File

@ -372,7 +372,7 @@ int ClientInterface::setup_receiver(Interface &socket) {
arg.additionalStorageCells);
}
if (detType == CHIPTESTBOARD) {
if (detType == CHIPTESTBOARD || detType == XILINX_CHIPTESTBOARD) {
impl()->setNumberofAnalogSamples(arg.analogSamples);
impl()->setNumberofDigitalSamples(arg.digitalSamples);
impl()->setNumberofTransceiverSamples(arg.transceiverSamples);
@ -409,12 +409,14 @@ int ClientInterface::setup_receiver(Interface &socket) {
detType == MYTHEN3) {
impl()->setTenGigaEnable(arg.tenGiga);
}
if (detType == CHIPTESTBOARD) {
if (detType == CHIPTESTBOARD || detType == XILINX_CHIPTESTBOARD) {
impl()->setReadoutMode(arg.roMode);
impl()->setADCEnableMask(arg.adcMask);
impl()->setTenGigaADCEnableMask(arg.adc10gMask);
impl()->setTransceiverEnableMask(arg.transceiverMask);
}
if (detType == CHIPTESTBOARD) {
impl()->setADCEnableMask(arg.adcMask);
}
if (detType == GOTTHARD) {
impl()->setDetectorROI(arg.roi);
}
@ -448,6 +450,7 @@ void ClientInterface::setDetectorType(detectorType arg) {
case GOTTHARD:
case EIGER:
case CHIPTESTBOARD:
case XILINX_CHIPTESTBOARD:
case JUNGFRAU:
case MOENCH:
case MYTHEN3:
@ -568,7 +571,7 @@ int ClientInterface::set_burst_mode(Interface &socket) {
int ClientInterface::set_num_analog_samples(Interface &socket) {
auto value = socket.Receive<int>();
LOG(logDEBUG1) << "Setting num analog samples to " << value;
if (detType != CHIPTESTBOARD) {
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD) {
functionNotImplemented();
}
try {
@ -584,7 +587,7 @@ int ClientInterface::set_num_analog_samples(Interface &socket) {
int ClientInterface::set_num_digital_samples(Interface &socket) {
auto value = socket.Receive<int>();
LOG(logDEBUG1) << "Setting num digital samples to " << value;
if (detType != CHIPTESTBOARD) {
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD) {
functionNotImplemented();
}
try {
@ -1249,7 +1252,7 @@ int ClientInterface::get_padding_enable(Interface &socket) {
int ClientInterface::set_readout_mode(Interface &socket) {
auto arg = socket.Receive<readoutMode>();
if (detType != CHIPTESTBOARD)
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD)
functionNotImplemented();
if (arg >= 0) {
@ -1294,7 +1297,7 @@ int ClientInterface::set_adc_mask(Interface &socket) {
int ClientInterface::set_dbit_list(Interface &socket) {
StaticVector<int, MAX_RX_DBIT> args;
socket.Receive(args);
if (detType != CHIPTESTBOARD)
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD)
functionNotImplemented();
LOG(logDEBUG1) << "Setting DBIT list";
for (auto &it : args) {
@ -1307,7 +1310,7 @@ int ClientInterface::set_dbit_list(Interface &socket) {
}
int ClientInterface::get_dbit_list(Interface &socket) {
if (detType != CHIPTESTBOARD)
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD)
functionNotImplemented();
StaticVector<int, MAX_RX_DBIT> retval;
retval = impl()->getDbitList();
@ -1317,7 +1320,7 @@ int ClientInterface::get_dbit_list(Interface &socket) {
int ClientInterface::set_dbit_offset(Interface &socket) {
auto arg = socket.Receive<int>();
if (detType != CHIPTESTBOARD)
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD)
functionNotImplemented();
if (arg < 0) {
throw RuntimeError("Invalid dbit offset: " + std::to_string(arg));
@ -1329,7 +1332,7 @@ int ClientInterface::set_dbit_offset(Interface &socket) {
}
int ClientInterface::get_dbit_offset(Interface &socket) {
if (detType != CHIPTESTBOARD)
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD)
functionNotImplemented();
int retval = impl()->getDbitOffset();
LOG(logDEBUG1) << "Dbit offset retval: " << retval;
@ -1735,7 +1738,7 @@ int ClientInterface::get_receiver_roi(Interface &socket) {
int ClientInterface::set_receiver_roi(Interface &socket) {
auto arg = socket.Receive<ROI>();
if (detType == CHIPTESTBOARD)
if (detType == CHIPTESTBOARD || detType == XILINX_CHIPTESTBOARD)
functionNotImplemented();
LOG(logDEBUG1) << "Set Receiver ROI: " << ToString(arg);
verifyIdle(socket);
@ -1751,7 +1754,7 @@ int ClientInterface::set_receiver_roi(Interface &socket) {
int ClientInterface::set_receiver_roi_metadata(Interface &socket) {
auto arg = socket.Receive<ROI>();
if (detType == CHIPTESTBOARD)
if (detType == CHIPTESTBOARD || detType == XILINX_CHIPTESTBOARD)
functionNotImplemented();
LOG(logDEBUG1) << "Set Receiver ROI Metadata: " << ToString(arg);
verifyIdle(socket);
@ -1768,7 +1771,7 @@ int ClientInterface::set_receiver_roi_metadata(Interface &socket) {
int ClientInterface::set_num_transceiver_samples(Interface &socket) {
auto value = socket.Receive<int>();
LOG(logDEBUG1) << "Setting num transceiver samples to " << value;
if (detType != CHIPTESTBOARD) {
if (detType != CHIPTESTBOARD && detType != XILINX_CHIPTESTBOARD) {
functionNotImplemented();
}
try {

View File

@ -480,6 +480,7 @@ void DataProcessor::PadMissingPackets(sls_receiver_header header, char *data) {
memset(data + (pnum * dsize), 0xFF, dsize + 2);
break;
case CHIPTESTBOARD:
case XILINX_CHIPTESTBOARD:
if (pnum == (pperFrame - 1))
memset(data + (pnum * dsize), 0xFF, corrected_dsize);
else

View File

@ -648,4 +648,122 @@ class ChipTestBoardData : public GeneralData {
};
};
class XilinxChipTestBoardData : public GeneralData {
private:
const int NCHAN_DIGITAL = 64;
const int NUM_BYTES_PER_ANALOG_CHANNEL = 2;
const int NUM_BYTES_PER_TRANSCEIVER_CHANNEL = 8;
int nAnalogBytes = 0;
int nDigitalBytes = 0;
int nTransceiverBytes = 0;
public:
/** Constructor */
XilinxChipTestBoardData() {
detType = slsDetectorDefs::XILINX_CHIPTESTBOARD;
nPixelsY = 1; // number of samples
headerSizeinPacket = sizeof(slsDetectorDefs::sls_detector_header);
frameIndexMask = 0xFFFFFF; // 10g
frameIndexOffset = 8; // 10g
packetIndexMask = 0xFF; // 10g
framesPerFile = XILINX_CTB_MAX_FRAMES_PER_FILE;
fifoDepth = 2500;
standardheader = true;
dataSize = 8144;
packetSize = headerSizeinPacket + dataSize;
tengigaEnable = true;
UpdateImageSize();
};
public:
int GetNumberOfAnalogDatabytes() { return nAnalogBytes; };
int GetNumberOfDigitalDatabytes() { return nDigitalBytes; };
int GetNumberOfTransceiverDatabytes() { return nTransceiverBytes; };
void SetNumberOfAnalogSamples(int n) {
nAnalogSamples = n;
UpdateImageSize();
};
void SetNumberOfDigitalSamples(int n) {
nDigitalSamples = n;
UpdateImageSize();
};
void SetNumberOfTransceiverSamples(int n) {
nTransceiverSamples = n;
UpdateImageSize();
};
void SetOneGigaAdcEnableMask(int n) {
adcEnableMaskOneGiga = n;
UpdateImageSize();
};
void SetTenGigaAdcEnableMask(int n) {
adcEnableMaskTenGiga = n;
UpdateImageSize();
};
void SetTransceiverEnableMask(int n) {
transceiverMask = n;
UpdateImageSize();
};
void SetReadoutMode(slsDetectorDefs::readoutMode r) {
readoutType = r;
UpdateImageSize();
};
private:
void UpdateImageSize() {
nAnalogBytes = 0;
nDigitalBytes = 0;
nTransceiverBytes = 0;
int nAnalogChans = 0, nDigitalChans = 0, nTransceiverChans = 0;
// analog channels (normal, analog/digital readout)
if (readoutType == slsDetectorDefs::ANALOG_ONLY ||
readoutType == slsDetectorDefs::ANALOG_AND_DIGITAL) {
uint32_t adcEnableMask = adcEnableMaskTenGiga;
nAnalogChans = __builtin_popcount(adcEnableMask);
nAnalogBytes =
nAnalogChans * NUM_BYTES_PER_ANALOG_CHANNEL * nAnalogSamples;
LOG(logDEBUG1) << " Number of Analog Channels:" << nAnalogChans
<< " Databytes: " << nAnalogBytes;
}
// digital channels
if (readoutType == slsDetectorDefs::DIGITAL_ONLY ||
readoutType == slsDetectorDefs::ANALOG_AND_DIGITAL ||
readoutType == slsDetectorDefs::DIGITAL_AND_TRANSCEIVER) {
nDigitalChans = NCHAN_DIGITAL;
nDigitalBytes = (sizeof(uint64_t) * nDigitalSamples);
LOG(logDEBUG1) << "Number of Digital Channels:" << nDigitalChans
<< " Databytes: " << nDigitalBytes;
}
// transceiver channels
if (readoutType == slsDetectorDefs::TRANSCEIVER_ONLY ||
readoutType == slsDetectorDefs::DIGITAL_AND_TRANSCEIVER) {
nTransceiverChans = __builtin_popcount(transceiverMask);
;
nTransceiverBytes = nTransceiverChans *
NUM_BYTES_PER_TRANSCEIVER_CHANNEL *
nTransceiverSamples;
LOG(logDEBUG1) << "Number of Transceiver Channels:"
<< nTransceiverChans
<< " Databytes: " << nTransceiverBytes;
}
nPixelsX = nAnalogChans + nDigitalChans + nTransceiverChans;
imageSize = nAnalogBytes + nDigitalBytes + nTransceiverBytes;
packetsPerFrame = ceil((double)imageSize / (double)dataSize);
LOG(logDEBUG1) << "Total Number of Channels:" << nPixelsX
<< " Databytes: " << imageSize;
};
};
} // namespace sls

View File

@ -116,6 +116,7 @@ void Implementation::setDetectorType(const detectorType d) {
case JUNGFRAU:
case MOENCH:
case CHIPTESTBOARD:
case XILINX_CHIPTESTBOARD:
case MYTHEN3:
case GOTTHARD2:
LOG(logINFO) << " ***** " << ToString(d) << " Receiver *****";
@ -145,6 +146,9 @@ void Implementation::setDetectorType(const detectorType d) {
case CHIPTESTBOARD:
generalData = new ChipTestBoardData();
break;
case XILINX_CHIPTESTBOARD:
generalData = new XilinxChipTestBoardData();
break;
case MYTHEN3:
generalData = new Mythen3Data();
break;

View File

@ -471,6 +471,7 @@ void Listener::CopyPacket(char *dst, char *src, uint32_t dataSize,
memcpy(dst + dataSize - 2, &src[detHeaderSize], dataSize + 2);
break;
case CHIPTESTBOARD:
case XILINX_CHIPTESTBOARD:
if (pnum == (generalData->packetsPerFrame - 1))
memcpy(dst + (pnum * dataSize), &src[detHeaderSize],
correctedDataSize);

View File

@ -31,6 +31,9 @@ void MasterAttributes::GetBinaryAttributes(
case slsDetectorDefs::CHIPTESTBOARD:
GetCtbBinaryAttributes(w);
break;
case slsDetectorDefs::XILINX_CHIPTESTBOARD:
GetXilinxCtbBinaryAttributes(w);
break;
default:
throw RuntimeError("Unknown Detector type to get master attributes");
}
@ -63,6 +66,9 @@ void MasterAttributes::WriteHDF5Attributes(H5::H5File *fd, H5::Group *group) {
case slsDetectorDefs::CHIPTESTBOARD:
WriteCtbHDF5Attributes(fd, group);
break;
case slsDetectorDefs::XILINX_CHIPTESTBOARD:
WriteXilinxCtbHDF5Attributes(fd, group);
break;
default:
throw RuntimeError("Unknown Detector type to get master attributes");
}
@ -814,4 +820,49 @@ void MasterAttributes::WriteCtbHDF5Attributes(H5::H5File *fd,
}
#endif
void MasterAttributes::GetXilinxCtbBinaryAttributes(
rapidjson::PrettyWriter<rapidjson::StringBuffer> *w) {
w->Key("Exptime");
w->String(ToString(exptime).c_str());
w->Key("Period");
w->String(ToString(period).c_str());
w->Key("ADC Mask");
w->String(ToStringHex(adcmask).c_str());
w->Key("Analog Flag");
w->Uint(analog);
w->Key("Analog Samples");
w->Uint(analogSamples);
w->Key("Digital Flag");
w->Uint(digital);
w->Key("Digital Samples");
w->Uint(digitalSamples);
w->Key("Dbit Offset");
w->Uint(dbitoffset);
w->Key("Dbit Bitset");
w->Uint64(dbitlist);
w->Key("Transceiver Mask");
w->String(ToStringHex(transceiverMask).c_str());
w->Key("Transceiver Flag");
w->Uint(transceiver);
w->Key("Transceiver Samples");
w->Uint(transceiverSamples);
}
#ifdef HDF5C
void MasterAttributes::WriteXilinxCtbHDF5Attributes(H5::H5File *fd,
H5::Group *group) {
MasterAttributes::WriteHDF5Exptime(fd, group);
MasterAttributes::WriteHDF5Period(fd, group);
MasterAttributes::WriteHDF5AdcMask(fd, group);
MasterAttributes::WriteHDF5AnalogFlag(fd, group);
MasterAttributes::WriteHDF5AnalogSamples(fd, group);
MasterAttributes::WriteHDF5DigitalFlag(fd, group);
MasterAttributes::WriteHDF5DigitalSamples(fd, group);
MasterAttributes::WriteHDF5DbitOffset(fd, group);
MasterAttributes::WriteHDF5DbitList(fd, group);
MasterAttributes::WriteHDF5TransceiverMask(fd, group);
MasterAttributes::WriteHDF5TransceiverFlag(fd, group);
MasterAttributes::WriteHDF5TransceiverSamples(fd, group);
}
#endif
} // namespace sls

View File

@ -152,6 +152,12 @@ class MasterAttributes {
#ifdef HDF5C
void WriteCtbHDF5Attributes(H5::H5File *fd, H5::Group *group);
#endif
void GetXilinxCtbBinaryAttributes(
rapidjson::PrettyWriter<rapidjson::StringBuffer> *w);
#ifdef HDF5C
void WriteXilinxCtbHDF5Attributes(H5::H5File *fd, H5::Group *group);
#endif
};
} // namespace sls

View File

@ -22,14 +22,15 @@ namespace sls {
#define HDF5_WRITER_VERSION (6.6) // 1 decimal places
#define BINARY_WRITER_VERSION (7.2) // 1 decimal places
#define MAX_FRAMES_PER_FILE 20000
#define SHORT_MAX_FRAMES_PER_FILE 100000
#define EIGER_MAX_FRAMES_PER_FILE 10000
#define JFRAU_MAX_FRAMES_PER_FILE 10000
#define MOENCH_MAX_FRAMES_PER_FILE 100000
#define CTB_MAX_FRAMES_PER_FILE 20000
#define MYTHEN3_MAX_FRAMES_PER_FILE 10000
#define GOTTHARD2_MAX_FRAMES_PER_FILE 20000
#define MAX_FRAMES_PER_FILE 20000
#define SHORT_MAX_FRAMES_PER_FILE 100000
#define EIGER_MAX_FRAMES_PER_FILE 10000
#define JFRAU_MAX_FRAMES_PER_FILE 10000
#define MOENCH_MAX_FRAMES_PER_FILE 100000
#define CTB_MAX_FRAMES_PER_FILE 20000
#define XILINX_CTB_MAX_FRAMES_PER_FILE 20000
#define MYTHEN3_MAX_FRAMES_PER_FILE 10000
#define GOTTHARD2_MAX_FRAMES_PER_FILE 20000
#define STATISTIC_FRAMENUMBER_INFINITE (20000)

View File

@ -292,6 +292,7 @@ enum detFuncs {
F_SET_COLUMN,
F_GET_PEDESTAL_MODE,
F_SET_PEDESTAL_MODE,
F_CONFIG_TRANSCEIVER,
NUM_DET_FUNCTIONS,
RECEIVER_ENUM_START = 512, /**< detector function should not exceed this
@ -691,6 +692,7 @@ const char* getFunctionNameFromEnum(enum detFuncs func) {
case F_SET_COLUMN: return "F_SET_COLUMN";
case F_GET_PEDESTAL_MODE: return "F_GET_PEDESTAL_MODE";
case F_SET_PEDESTAL_MODE: return "F_SET_PEDESTAL_MODE";
case F_CONFIG_TRANSCEIVER: return "F_CONFIG_TRANSCEIVER";
case NUM_DET_FUNCTIONS: return "NUM_DET_FUNCTIONS";
case RECEIVER_ENUM_START: return "RECEIVER_ENUM_START";

View File

@ -20,6 +20,7 @@ Still this is better than strcpy and a buffer overflow...
*/
template <size_t array_size>
void strcpy_safe(char (&destination)[array_size], const char *source) {
assert(source != nullptr);
assert(array_size > strlen(source));
strncpy(destination, source, array_size - 1);
destination[array_size - 1] = '\0';

View File

@ -4,11 +4,11 @@
#define RELEASE "developer"
#define APILIB "developer 0x230224"
#define APIRECEIVER "developer 0x230224"
#define APICTB "developer 0x240110"
#define APIGOTTHARD "developer 0x240110"
#define APIGOTTHARD2 "developer 0x240110"
#define APIJUNGFRAU "developer 0x240110"
#define APIMYTHEN3 "developer 0x240110"
#define APIMOENCH "developer 0x240110"
#define APIEIGER "developer 0x240110"
#define APIXILINXCTB "developer 0x240111"
#define APICTB "developer 0x240207"
#define APIGOTTHARD "developer 0x240207"
#define APIGOTTHARD2 "developer 0x240207"
#define APIJUNGFRAU "developer 0x240207"
#define APIMYTHEN3 "developer 0x240207"
#define APIMOENCH "developer 0x240207"
#define APIXILINXCTB "developer 0x240207"
#define APIEIGER "developer 0x240207"

View File

@ -99,9 +99,7 @@ def loadConfig(name, rx_hostname, settingsdir):
Log(Fore.GREEN, 'Loading config')
try:
d = Detector()
if name == 'xilinx_ctb':
d.hostname = 'localhost'
elif name == 'eiger':
if name == 'eiger':
d.hostname = 'localhost:' + str(DEFAULT_TCP_CNTRL_PORTNO) + '+localhost:' + str(HALFMOD2_TCP_CNTRL_PORTNO)
#d.udp_dstport = {2: 50003}
# will set up for every module
@ -120,8 +118,10 @@ def loadConfig(name, rx_hostname, settingsdir):
d.udp_srcip = d.udp_dstip
else:
d.udp_srcip = 'auto'
if d.type == detectorType.JUNGFRAU or d.type == detectorType.MOENCH:
if d.type == detectorType.JUNGFRAU or d.type == detectorType.MOENCH or d.type == detectorType.XILINX_CHIPTESTBOARD:
d.powerchip = 1
if d.type == detectorType.XILINX_CHIPTESTBOARD:
d.configureTransceiver()
except:
Log(Fore.RED, 'Could not load config for ' + name)
raise
@ -221,7 +221,7 @@ with open(fname, 'w') as fp:
startCmdTests(server, fp, file_results)
cleanup(server)
except:
Log(log.RED, 'Exception caught. Cleaning up.')
Log(Fore.RED, 'Exception caught. Cleaning up.')
cleanup(server)
sys.stdout = original_stdout
sys.stderr = original_stderr