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https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-25 15:50:03 +02:00
included the ival for digital_test_bit and set adc_write_reg to all FFFFFFFF by default in DAQ reg initialization
git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@103 951219d9-93cf-4727-9268-0efd64621fa3
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@ -303,31 +303,49 @@ int setDAQRegister()
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#ifdef VERBOSE
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#ifdef VERBOSE
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printf("DAQ reg:20916770:%d",reg);
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printf("DAQ reg:20916770:%d",reg);
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#endif
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#endif
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return result;
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addr=ADC_SYNC_REG;
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}
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val=12;
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float setADCWriteRegister(float val){
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u_int32_t addr, reg;
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printf("\n\n\nChecking a few stuff\n");
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printf("\nval received is %f,%d,%x",val,val,val);
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printf("\nval converted to int and hex is %d,%x\n",(int)val,(float)val);
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//setting ADC reg temporary
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addr=ADC_WRITE_REG;
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val=0xFFFFFFFF;
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bus_w(addr,val);
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bus_w(addr,val);
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reg=bus_r(addr);
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reg=bus_r(addr);
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#ifdef VERBOSE
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#ifdef VERBOSE
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printf("\n\nADC write reg:%X",reg);
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printf("\nADC SYNC reg:%d",reg);
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#endif
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#endif
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return result;
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return val;
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}
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}
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u_int32_t bus_write(int addr, u_int32_t data) {
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u_int32_t *ptr1,offset;
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switch(addr){
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case ADC_WRITE:
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offset=ADC_WRITE_REG;
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break;
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default:
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return FAIL;
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}
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ptr1=(u_int32_t*)(CSP0BASE+offset*2);
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*ptr1=data;
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return OK;
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}
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u_int32_t bus_read(int addr) {
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u_int32_t *ptr1,offset;
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switch(addr){
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case ADC_WRITE:
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offset=ADC_WRITE_REG;
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break;
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default:
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offset=ADC_WRITE_REG;
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}
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ptr1=(u_int32_t*)(CSP0BASE+offset*2);
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return *ptr1;
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}
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// direct pattern output
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// direct pattern output
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u_int32_t putout(char *s, int modnum) {
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u_int32_t putout(char *s, int modnum) {
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int i;
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int i;
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@ -27,7 +27,8 @@ u_int32_t bus_r(u_int32_t offset);
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int setDummyRegister();
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int setDummyRegister();
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int setPhaseShiftOnce();
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int setPhaseShiftOnce();
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int setDAQRegister();
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int setDAQRegister();
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float setADCWriteRegister(float val);
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u_int32_t bus_write(int addr, u_int32_t data);
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u_int32_t bus_read(int addr);
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u_int32_t putout(char *s, int modnum);
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u_int32_t putout(char *s, int modnum);
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u_int32_t readin(int modnum);
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u_int32_t readin(int modnum);
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@ -27,7 +27,7 @@
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// DAC definitions
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// DAC definitions
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enum {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC,ADC_WRITE};
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enum {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC};
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/* DAC adresses */
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/* DAC adresses */
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#define DACCS {0,0,1,1,2,2,3,3,4,4,5,5,6,6}
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#define DACCS {0,0,1,1,2,2,3,3,4,4,5,5,6,6}
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@ -745,7 +745,7 @@ int write_register(int file_des) {
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int arg[2];
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int arg[2];
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int addr, val;
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int addr, val;
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int n;
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int n;
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u_int32_t address;
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sprintf(mess,"Can't write to register\n");
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sprintf(mess,"Can't write to register\n");
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@ -764,10 +764,15 @@ int write_register(int file_des) {
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if (differentClients==1 && lockStatus==1) {
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if (differentClients==1 && lockStatus==1) {
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ret=FAIL;
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ret=FAIL;
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sprintf(mess,"Detector locked by %s\n",lastClientIP);
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sprintf(mess,"Detector locked by %s\n",lastClientIP);
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} else
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}
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retval=bus_w(addr,val);
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if(ret!=FAIL){
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ret=bus_write(addr,val);
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if(ret==OK)
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retval=bus_read(addr);
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}
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#ifdef VERBOSE
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#ifdef VERBOSE
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printf("Data set to 0x%x\n", retval);
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printf("Data set to 0x%x\n", retval);
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@ -803,7 +808,7 @@ int read_register(int file_des) {
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int arg;
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int arg;
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int addr;
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int addr;
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int n;
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int n;
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u_int32_t address;
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sprintf(mess,"Can't read register\n");
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sprintf(mess,"Can't read register\n");
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@ -820,7 +825,9 @@ int read_register(int file_des) {
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printf("reading register 0x%x\n", addr);
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printf("reading register 0x%x\n", addr);
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#endif
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#endif
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retval=bus_r(addr);
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if(ret!=FAIL)
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retval=bus_read(address);
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#ifdef VERBOSE
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#ifdef VERBOSE
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@ -920,13 +927,10 @@ int set_dac(int file_des) {
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case HV_POT:
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case HV_POT:
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ireg=HIGH_VOLTAGE;
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ireg=HIGH_VOLTAGE;
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break;
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break;
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case G_ADC_WRITE:
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ireg=ADC_WRITE;
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break;
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default:
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default:
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printf("Unknown DAC/TEMP/HV/ADC_write index %d\n",ind);
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printf("Unknown DAC/TEMP/HV index %d\n",ind);
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sprintf(mess,"Unknown DAC/TEMP/HV/ADC_write index %d\n",ind);
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sprintf(mess,"Unknown DAC/TEMP/HV index %d\n",ind);
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ret=FAIL;
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ret=FAIL;
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}
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}
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@ -939,11 +943,8 @@ int set_dac(int file_des) {
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if(ireg==-1)
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if(ireg==-1)
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retval=initDACbyIndexDACU(idac,val,imod);
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retval=initDACbyIndexDACU(idac,val,imod);
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else
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else
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{ //ADC_write
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{ //HV
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if(ireg==ADC_WRITE)
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if(ireg==HIGH_VOLTAGE)
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retval=setADCWriteRegister(val);
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//HV
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else if(ireg==HIGH_VOLTAGE)
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retval=initHighVoltageByModule(val,imod);
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retval=initHighVoltageByModule(val,imod);
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//Temp
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//Temp
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else
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else
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@ -968,7 +969,7 @@ int set_dac(int file_des) {
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else if (retval==val || val==-1)
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else if (retval==val || val==-1)
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ret=OK;
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ret=OK;
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if(ret==FAIL)
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if(ret==FAIL)
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printf("Setting dac/hv/adc_write %d of module %d: wrote %f but read %f\n", ind, imod, val, retval);
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printf("Setting dac/hv %d of module %d: wrote %f but read %f\n", ind, imod, val, retval);
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else{
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else{
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if (differentClients)
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if (differentClients)
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ret=FORCE_UPDATE;
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ret=FORCE_UPDATE;
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