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included the ival for digital_test_bit and set adc_write_reg to all FFFFFFFF by default in DAQ reg initialization

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git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@103 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d 2012-01-13 13:40:58 +00:00
parent bbedcbc329
commit 429bedecca
4 changed files with 57 additions and 37 deletions
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54
slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.c
View File

@ -303,31 +303,49 @@ int setDAQRegister()
#ifdef VERBOSE
printf("DAQ reg:20916770:%d",reg);
#endif
return result;
}
float setADCWriteRegister(float val){
u_int32_t addr, reg;
printf("\n\n\nChecking a few stuff\n");
printf("\nval received is %f,%d,%x",val,val,val);
printf("\nval converted to int and hex is %d,%x\n",(int)val,(float)val);
//setting ADC reg temporary
addr=ADC_WRITE_REG;
val=0xFFFFFFFF;
addr=ADC_SYNC_REG;
val=12;
bus_w(addr,val);
reg=bus_r(addr);
#ifdef VERBOSE
printf("\n\nADC write reg:%X",reg);
printf("\nADC SYNC reg:%d",reg);
#endif
return val;
return result;
}
u_int32_t bus_write(int addr, u_int32_t data) {
u_int32_t *ptr1,offset;
switch(addr){
case ADC_WRITE:
offset=ADC_WRITE_REG;
break;
default:
return FAIL;
}
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
return OK;
}
u_int32_t bus_read(int addr) {
u_int32_t *ptr1,offset;
switch(addr){
case ADC_WRITE:
offset=ADC_WRITE_REG;
break;
default:
offset=ADC_WRITE_REG;
}
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
}
// direct pattern output
u_int32_t putout(char *s, int modnum) {
int i;

3
slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.h
View File

@ -27,7 +27,8 @@ u_int32_t bus_r(u_int32_t offset);
int setDummyRegister();
int setPhaseShiftOnce();
int setDAQRegister();
float setADCWriteRegister(float val);
u_int32_t bus_write(int addr, u_int32_t data);
u_int32_t bus_read(int addr);
u_int32_t putout(char *s, int modnum);
u_int32_t readin(int modnum);

2
slsDetectorSoftware/gotthardDetectorServer/mcb_funcs.h
View File

@ -27,7 +27,7 @@
// DAC definitions
enum {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC,ADC_WRITE};
enum {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC};
/* DAC adresses */
#define DACCS {0,0,1,1,2,2,3,3,4,4,5,5,6,6}

35
slsDetectorSoftware/gotthardDetectorServer/server_funcs.c
View File

@ -745,7 +745,7 @@ int write_register(int file_des) {
int arg[2];
int addr, val;
int n;
u_int32_t address;
sprintf(mess,"Can't write to register\n");
@ -764,10 +764,15 @@ int write_register(int file_des) {
if (differentClients==1 && lockStatus==1) {
ret=FAIL;
sprintf(mess,"Detector locked by %s\n",lastClientIP);
} else
retval=bus_w(addr,val);
}
if(ret!=FAIL){
ret=bus_write(addr,val);
if(ret==OK)
retval=bus_read(addr);
}
#ifdef VERBOSE
printf("Data set to 0x%x\n", retval);
@ -803,7 +808,7 @@ int read_register(int file_des) {
int arg;
int addr;
int n;
u_int32_t address;
sprintf(mess,"Can't read register\n");
@ -820,7 +825,9 @@ int read_register(int file_des) {
printf("reading register 0x%x\n", addr);
#endif
retval=bus_r(addr);
if(ret!=FAIL)
retval=bus_read(address);
#ifdef VERBOSE
@ -920,13 +927,10 @@ int set_dac(int file_des) {
case HV_POT:
ireg=HIGH_VOLTAGE;
break;
case G_ADC_WRITE:
ireg=ADC_WRITE;
break;
default:
printf("Unknown DAC/TEMP/HV/ADC_write index %d\n",ind);
sprintf(mess,"Unknown DAC/TEMP/HV/ADC_write index %d\n",ind);
printf("Unknown DAC/TEMP/HV index %d\n",ind);
sprintf(mess,"Unknown DAC/TEMP/HV index %d\n",ind);
ret=FAIL;
}
@ -939,11 +943,8 @@ int set_dac(int file_des) {
if(ireg==-1)
retval=initDACbyIndexDACU(idac,val,imod);
else
{ //ADC_write
if(ireg==ADC_WRITE)
retval=setADCWriteRegister(val);
//HV
else if(ireg==HIGH_VOLTAGE)
{ //HV
if(ireg==HIGH_VOLTAGE)
retval=initHighVoltageByModule(val,imod);
//Temp
else
@ -968,7 +969,7 @@ int set_dac(int file_des) {
else if (retval==val || val==-1)
ret=OK;
if(ret==FAIL)
printf("Setting dac/hv/adc_write %d of module %d: wrote %f but read %f\n", ind, imod, val, retval);
printf("Setting dac/hv %d of module %d: wrote %f but read %f\n", ind, imod, val, retval);
else{
if (differentClients)
ret=FORCE_UPDATE;