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included serverMAC function for gotthard

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git-svn-id: file:///afs/psi.ch/project/sls_det_software/svn/slsDetectorSoftware@102 951219d9-93cf-4727-9268-0efd64621fa3
This commit is contained in:
l_maliakal_d 2012-01-13 12:13:07 +00:00
parent 8424decb72
commit bbedcbc329
6 changed files with 94 additions and 69 deletions
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3
slsDetectorSoftware/commonFiles/sls_detector_defs.h
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@ -262,7 +262,8 @@ enum dacIndex {
G_VCASC_OUT, /**< gotthard */
G_VIN_CM, /**< gotthard */
G_VREF_COMP, /**< gotthard */
G_IB_TESTC /**< gotthard */
G_IB_TESTC, /**< gotthard */
G_ADC_WRITE /**< gotthard: ADC WRITE REG*/
};
/**

119
slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.c
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@ -181,6 +181,35 @@ int mapCSP0(void) {
}
//aldos function volatile (not needed)
u_int16_t bus_w16(u_int32_t offset, u_int16_t data) {
u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
// printf("writing at 0x%x data 0x%x %d%d%d\n",CSP0BASE+offset*2,data, (data>>2)&0x1,(data>>1)&0x1 ,(data>>0)&0x1);
*ptr1=data;
return OK;
}
u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
return OK;
}
u_int32_t bus_r(u_int32_t offset) {
u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
}
int setDummyRegister() {
int result = OK;
volatile u_int32_t val,addr;
@ -224,39 +253,6 @@ int setDummyRegister() {
}
int setDAQRegister()
{
u_int32_t addr, reg, val;
int result=OK;
addr=DAQ_REG;
val=34+(42<<8)+(319<<16);
reg=bus_r(addr);
//write to daqreg if not valid
if(reg!=val){
bus_w(addr,val);
reg=bus_r(addr);
if(reg!=val)
result=FAIL;
}
#ifdef VERBOSE
printf("DAQ reg:20916770:%d",reg);
#endif
//setting ADC reg temporary
addr=ADC_WRITE_REG;
val=0xFFFFFFFF;
bus_w(addr,val);
reg=bus_r(addr);
#ifdef VERBOSE
printf("\n\nADC write reg:%X",reg);
#endif
return result;
}
int setPhaseShiftOnce(){
u_int32_t addr, reg;
@ -290,35 +286,48 @@ int setPhaseShiftOnce(){
}
//aldos function volatile (not needed)
u_int16_t bus_w16(u_int32_t offset, u_int16_t data) {
u_int16_t *ptr1;
ptr1=(u_int16_t*)(CSP0BASE+offset*2);
// printf("writing at 0x%x data 0x%x %d%d%d\n",CSP0BASE+offset*2,data, (data>>2)&0x1,(data>>1)&0x1 ,(data>>0)&0x1);
*ptr1=data;
return OK;
int setDAQRegister()
{
u_int32_t addr, reg, val;
int result=OK;
addr=DAQ_REG;
val=34+(42<<8)+(319<<16);
reg=bus_r(addr);
//write to daqreg if not valid
if(reg!=val){
bus_w(addr,val);
reg=bus_r(addr);
if(reg!=val)
result=FAIL;
}
#ifdef VERBOSE
printf("DAQ reg:20916770:%d",reg);
#endif
return result;
}
float setADCWriteRegister(float val){
u_int32_t addr, reg;
u_int32_t bus_w(u_int32_t offset, u_int32_t data) {
u_int32_t *ptr1;
printf("\n\n\nChecking a few stuff\n");
printf("\nval received is %f,%d,%x",val,val,val);
printf("\nval converted to int and hex is %d,%x\n",(int)val,(float)val);
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
*ptr1=data;
return OK;
}
u_int32_t bus_r(u_int32_t offset) {
u_int32_t *ptr1;
ptr1=(u_int32_t*)(CSP0BASE+offset*2);
return *ptr1;
//setting ADC reg temporary
addr=ADC_WRITE_REG;
val=0xFFFFFFFF;
bus_w(addr,val);
reg=bus_r(addr);
#ifdef VERBOSE
printf("\n\nADC write reg:%X",reg);
#endif
return val;
}
// direct pattern output
u_int32_t putout(char *s, int modnum) {
int i;

7
slsDetectorSoftware/gotthardDetectorServer/firmware_funcs.h
View File

@ -19,14 +19,15 @@
int mapCSP0(void);
int setDummyRegister();
int setDAQRegister();
int setPhaseShiftOnce();
u_int16_t bus_w16(u_int32_t offset, u_int16_t data);//aldos function
u_int32_t bus_w(u_int32_t offset, u_int32_t data);
u_int32_t bus_r(u_int32_t offset);
int setDummyRegister();
int setPhaseShiftOnce();
int setDAQRegister();
float setADCWriteRegister(float val);
u_int32_t putout(char *s, int modnum);
u_int32_t readin(int modnum);

2
slsDetectorSoftware/gotthardDetectorServer/mcb_funcs.h
View File

@ -27,7 +27,7 @@
// DAC definitions
enum {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC, };
enum {VREF_DS, VCASCN_PB, VCASCP_PB, VOUT_CM, VCASC_OUT, VIN_CM, VREF_COMP, IB_TESTC,ADC_WRITE};
/* DAC adresses */
#define DACCS {0,0,1,1,2,2,3,3,4,4,5,5,6,6}

17
slsDetectorSoftware/gotthardDetectorServer/server_funcs.c
View File

@ -920,11 +920,13 @@ int set_dac(int file_des) {
case HV_POT:
ireg=HIGH_VOLTAGE;
break;
case G_ADC_WRITE:
ireg=ADC_WRITE;
break;
default:
printf("Unknown DAC/TEMP/HV index %d\n",ind);
sprintf(mess,"Unknown DAC/TEMP/HV index %d\n",ind);
printf("Unknown DAC/TEMP/HV/ADC_write index %d\n",ind);
sprintf(mess,"Unknown DAC/TEMP/HV/ADC_write index %d\n",ind);
ret=FAIL;
}
@ -937,8 +939,11 @@ int set_dac(int file_des) {
if(ireg==-1)
retval=initDACbyIndexDACU(idac,val,imod);
else
{ //HV or conf gain
if(ireg==HIGH_VOLTAGE)
{ //ADC_write
if(ireg==ADC_WRITE)
retval=setADCWriteRegister(val);
//HV
else if(ireg==HIGH_VOLTAGE)
retval=initHighVoltageByModule(val,imod);
//Temp
else
@ -963,7 +968,7 @@ int set_dac(int file_des) {
else if (retval==val || val==-1)
ret=OK;
if(ret==FAIL)
printf("Setting dac/hv %d of module %d: wrote %f but read %f\n", ind, imod, val, retval);
printf("Setting dac/hv/adc_write %d of module %d: wrote %f but read %f\n", ind, imod, val, retval);
else{
if (differentClients)
ret=FORCE_UPDATE;

15
slsDetectorSoftware/slsDetector/slsDetector.cpp
View File

@ -2011,7 +2011,7 @@ float slsDetector::setDAC(float val, dacIndex index, int imod){
#ifdef VERBOSE
std::cout<< std::endl;
std::cout<< "Setting DAC/POT/TEMP "<< index << "of module " << imod << " to " << val << std::endl;
std::cout<< "Setting DAC/POT/TEMP/HV/ADC_WRITE "<< index << "of module " << imod << " to " << val << std::endl;
#endif
if (thisDetector->onlineFlag==ONLINE_FLAG) {
if (controlSocket) {
@ -2046,10 +2046,10 @@ float slsDetector::setDAC(float val, dacIndex index, int imod){
}
}
#ifdef VERBOSE
std::cout<< "Dac/Pot/Temp set to "<< retval << std::endl;
std::cout<< "Dac/Pot/Temp/HV/ADC_write set to "<< retval << std::endl;
#endif
if (ret==FAIL) {
std::cout<< "Set dac/pot/temp failed " << std::endl;
std::cout<< "Set dac/pot/temp/HV/ADC_write failed " << std::endl;
}
return retval;
};
@ -6189,6 +6189,15 @@ string slsDetector::executeLine(int narg, char *args[], int action) {
sprintf(answer,"%f",setDAC(-1,TEMPERATURE_FPGA));
return string(answer);
}
/* GOTTHARD ADC_WRITE_REG */
else if (var=="adc_write") {
if (action==PUT_ACTION) {
sscanf(args[1],"%f",&fval);
setDAC(fval,G_ADC_WRITE);
}
sprintf(answer,"%f",setDAC(-1,G_ADC_WRITE));
return string(answer);
}
//timers