refactor(ddg1): Use mcs acquiring status to resolve trigger of DDG1
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@@ -135,6 +135,7 @@ class DDG1(PSIDeviceBase, DelayGeneratorCSAXS):
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USER_ACCESS = ["keep_shutter_open_during_scan", "set_trigger"]
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# TODO Consider using the 'fsh' device instead.
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fast_shutter_readback = Cpt(
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EpicsSignalRO,
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read_pv="X12SA-ES1-TTL:INP_01",
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@@ -513,14 +514,14 @@ class DDG1(PSIDeviceBase, DelayGeneratorCSAXS):
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"""
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self._stop_polling()
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self._poll_thread_poll_loop_done.wait(timeout=1)
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time.sleep(0.02)
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# TODO This may move to scan modifiers
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# NOTE If the trigger source is not SINGLE_SHOT, the DDG is triggered by an external source
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# thus we can not expect that trigger signals are meant to be awaited for. In this case,
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# we can directly return.
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if self.trigger_source.get() != TRIGGERSOURCE.SINGLE_SHOT.value:
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status = StatusBase(obj=self)
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status.set_finished()
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return status
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# NOTE: This sleep is important to ensure that the HW is ready to process new commands.
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# It has been empirically determined after long testing that this improves stability.
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# NOTE If the MCS card is present in the current session of BEC,
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# we prepare the card for the next trigger. The procedure is implemented
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@@ -536,11 +537,12 @@ class DDG1(PSIDeviceBase, DelayGeneratorCSAXS):
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# be investigated why the EPICS interface is slow to respond.
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status_mcs.wait(timeout=3)
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if self.fast_shutter_control.get() == 0:
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# Shutter is not kept open, we can rely on the shutter readback signal
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status = TransitionStatus(
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self.fast_shutter_readback, [1, 0]
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) # Wait for shutter to transition from open (1) to close (0)
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# NOTE If the MCS card is present, we may also use its signal wait for the burst cycle to finish.
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# This is True for any non-fly scans, as for fly scans the MCS card will not receive the additional
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# trigger pulse from the ef delay pair, check on_stage.
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if mcs is not None and mcs.enabled and self.scan_info.msg.scan_type != "fly":
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# We can use the acquiring signal of the MCS card to check if the burst cycle is finished.
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status = TransitionStatus(mcs.acquiring, [ACQUIRING.ACQUIRING, ACQUIRING.DONE])
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else:
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# NOTE This sleep is needed for 20ms to make sure that the HW of the DDG is
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# again ready to process new commands. It was transferred from just after the
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