 ritt
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ed441935a7
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Optimized chip tests for good new chips with lower leakage current
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2017-10-10 17:36:34 +02:00 |
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ritt
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9df66d5c96
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Implemented “-l” option to check USB
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2017-04-12 10:26:50 +02:00 |
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ritt
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9e6aa0e059
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Recompiled under Windows
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2017-01-09 17:06:59 +01:00 |
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ritt
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8461281a67
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Optimized chip test for new test board, implemented leakage current limit of 100 pA
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2017-01-09 16:54:01 +01:00 |
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ritt
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118ded9ac0
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Added optional histogram output in chip test
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2016-12-05 14:03:06 +01:00 |
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ritt
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bcc7e30369
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Implemented measurement of leakage currents
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2016-12-01 16:16:37 +01:00 |
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ritt
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dfe33dc32d
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Made chip test work with normal V5 board
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2016-12-01 12:25:02 +01:00 |
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ritt
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51134fb2db
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Re-arranged trigger source configuration
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2016-11-30 17:14:46 +01:00 |
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ritt
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403dc702fb
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Implemented readout delay
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2016-11-24 17:19:27 +01:00 |
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ritt
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bdd6b7fcad
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Align cell #0 of each channel instead of 700. Same result, but less confusing.
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2016-11-24 14:40:27 +01:00 |
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ritt
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7bca3829fa
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Copied files over from SVN repositories
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2016-11-14 15:38:40 +01:00 |
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