5 Commits

Author	SHA1	Message	Date
ritt	118ded9ac0	Added optional histogram output in chip test	2016-12-05 14:03:06 +01:00
ritt	bcc7e30369	Implemented measurement of leakage currents	2016-12-01 16:16:37 +01:00
ritt	51134fb2db	Re-arranged trigger source configuration	2016-11-30 17:14:46 +01:00
ritt	403dc702fb	Implemented readout delay	2016-11-24 17:19:27 +01:00
ritt	7bca3829fa	Copied files over from SVN repositories	2016-11-14 15:38:40 +01:00