4 Commits

Author	SHA1	Message	Date
ritt	118ded9ac0	Added optional histogram output in chip test	2016-12-05 14:03:06 +01:00
ritt	dfe33dc32d	Made chip test work with normal V5 board	2016-12-01 12:25:02 +01:00
ritt	50964d81ca	Updated examples to new project structure	2016-12-01 09:31:25 +01:00
ritt	7bca3829fa	Copied files over from SVN repositories	2016-11-14 15:38:40 +01:00