AEK_8220_Libraries/firmware_vhdl_psi_multi_stream_daq
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DEVEL: Check if stram 1 tests really complete

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This commit is contained in:
Oliver Bruendler
2018-09-04 09:19:26 +02:00
parent 8c925be1f8
commit b9f343ad13
2 changed files with 4 additions and 5 deletions
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3
tb/psi_ms_daq/psi_ms_daq_tb.vhd
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@ -200,7 +200,7 @@ begin
-- Version register!
-- RINGBUF (OK), LINEAR (TODO)
-- OVERWRITE (TODO), STOP (OK)
-- Mode: CONTINUOUS (OK), SINGLE(TODO), MASK(TODO), MANUAL (TODO)
-- Mode: CONTINUOUS (OK), SINGLE(TODO), MASK(TODO), MANUAL (OK)
------------------------------------------------------------
-- TMEM Process
@ -255,6 +255,7 @@ begin
-- *** Check end state ***
assert Str0WinCheck >= 4 report "###ERROR###: Stream 0 checks not completed" severity error;
assert Str1WinCheck = 1 report "###ERROR###: Stream 1 checks not completed" severity error;
wait;
end process;

6
tb/psi_ms_daq/psi_ms_daq_tb_str1_pkg.vhd
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@ -32,10 +32,7 @@ package psi_ms_daq_tb_str1_pkg is
--------------------------------------------------------
-- Persistent State
--------------------------------------------------------
shared variable Str1NextWin : integer := 0;
shared variable Str1WinCheck : integer := 0;
shared variable Str1LastTs : integer;
shared variable Str1IrqOn : boolean := false;
--------------------------------------------------------
-- Data Generation
@ -119,7 +116,8 @@ package body psi_ms_daq_tb_str1_pkg is
-- first 100 samples are before arming
StdlvCompareInt (spl+100, std_logic_vector(valRead), "Wrong value", false);
end loop;
print("");
print("");
Str1WinCheck := Str1WinCheck + 1;
end procedure;