47 lines
1.4 KiB
Markdown
47 lines
1.4 KiB
Markdown
# General Information
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The EVR320 Embedded Event Receiver (EEVR) is able to connect with a MRF Timing System.
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Mainly the EEVR is used to decode configurable events and use them in firmware as triggers.
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## Maintainer
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Patric Bucher [patric.bucher@psi.ch]
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Jonas Purtschert [jonas.purtschert@psi.ch]
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## Authors
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Waldemar Koprek [waldemar.koprek@psi.ch]
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Goran Marinkovic [goran.marinkovic@psi.ch]
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Patric Bucher [patric.bucher@psi.ch]
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Jonas Purtschert [jonas.purtschert@psi.ch]
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## Documentation
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See [EVR320 Documentation](doc/evr320.pdf "doc/evr320.pdf")
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## Changelog
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See [Changelog](Changelog.md)
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## What belongs into this Library
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All components and wrappers to connect various buses (AXI4, TOSCA-II, ..) and to use on different Xilinx FPGA's.
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Examples for things that belong into this library:
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- Event Decoder / Core Functionality
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- Different MGT types
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Examples for things that do not belong into this library:
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- Vivado IP Packager related files -> belong to separate git repo
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## Dependencies
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### Synthesis
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- Libraries/Firmware/VHDL/psi\_common (https://github.com/paulscherrerinstitute/psi_common)
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### Simulation
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- Libraries/Firmware/TCL/PsiSim
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- Libraries/Firmware/VHDL/psi\_common (https://github.com/paulscherrerinstitute/psi_common)
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- Libraries/Firmware/VHDL/UVVM (https://github.com/UVVM/UVVM)
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### with IFC1210 Bindings
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- Libraries/BoardSupport/IFC1210/tosca2
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