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Code Issues Pull Requests Actions Packages Projects Releases 42 Wiki Activity
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cf69aef4726b1889db9576fe835a46645fa6e0e6
Jungfraujoch/fpga/scripts
History
Filip Leonarski cf69aef472 FPGA: Add extra register slices for upside_down
2023-10-26 22:36:08 +02:00
..
bd_pcie.tcl
FPGA: Add option to invert modules upside down
2023-10-25 22:20:45 +02:00
build_pcie_design.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
check_hls.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
hbm_u55c.tcl
FPGA: Integration on FPGA allows for per pixel weights (in range 1.99 - 3e-5)
2023-10-21 15:37:46 +02:00
jfjoch.tcl
FPGA: Add extra register slices for upside_down
2023-10-26 22:36:08 +02:00
mac_100g_pcie.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
network_stack.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
pcie_dma.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
setup_action.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
synth_and_impl.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
synth_hls_function.tcl
HLS: Improve make scripts, so HLS test bench can be defined
2023-10-18 16:32:31 +02:00
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