leonarski_fandClaude Opus 5
6f7b136ec2
Nothing kept a neighbour's flux out of a reflection's own signal disk. The union mask keeps neighbour cores out of the BACKGROUND ring, but the r1 disk was read whole, so on a dense pattern a crowded reflection measures part of its neighbour as its own. Ownership is decided once per image into a per-pixel (quantised distance, reflection) key written with an atomic minimum, so the nearest predicted centre wins whatever order the writes arrive in and the lowest index breaks a tie. `--overlap exclude`, now the default, drops the pixels a nearer neighbour owns from the profile fit. A profile fit is the amplitude of a normalised profile, so leaving pixels out renormalises the estimator by construction and the reflection stays unbiased rather than being discarded; the summation-fallback guard is scaled back to the disk the box-sum seed actually read, so it still compares like with like. `--overlap reject` is the XDS MINPK alternative - drop the reflection when less than `--overlap-minpk` of its expected profile is cleanly its own. A box sum has no profile to renormalise with, so `exclude` is a no-op there and only `reject` acts on it. Widening the split - keeping a pixel only where no other centre is within its distance PLUS a margin - was built and measured, and it is worse monotonically: the residual bias of the pixels that were kept grows from +0.072 to +0.209 in ln intensity at 0 to 3 px of margin. What the margin removes is the reflection's own profile, not the neighbour's tail, so the plain nearest-centre split is the rule. Measured on the full 38-crystal rotation battery against the same binary with the treatment off: ISa better 15 / worse 8, summed shortfall against XDS 39.7 -> 28.1. Three of the losses are the two-pass loop taking its other branch - their median mosaicity moves between the two known attractors - rather than the change under test; excluding those it is better 15 / worse 5 and the shortfall goes 31.3 -> 14.4. The two crowded crystals gain 38% and 52% of their ISa, one of them passing XDS. High-shell CC1/2 over the 35 crystals that neither flipped branch nor carry a collapsed error model is better 7 / worse 7. Space groups unchanged at 35/38. The owner map is built only when a treatment is asked for and costs 1.1% of the battery's wall clock - 23% on a genuinely crowded crystal, nothing where no two predictions touch. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
71 lines
3.8 KiB
C++
71 lines
3.8 KiB
C++
// SPDX-FileCopyrightText: 2026 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#pragma once
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#include <cstdint>
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#include <memory>
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#include <vector>
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#include "BraggIntegrationEngine.h"
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#include "../indexing/CUDAMemHelpers.h"
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// CUDA engine: reproduces BraggIntegrationEngineCPU up to floating-point precision. Each stage is a
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// kernel with one CUDA block per reflection cooperating over the small window via shared-memory
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// reductions (the natural mapping for thousands of independent, tiny per-spot integrations).
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//
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// Pipeline (profile modes): reset -> mark_mask -> boxsum -> learn_profile -> build_profiles -> fit
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// (the resolution shell is computed inline, so there is no separate shell pass). BoxSum mode stops
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// after boxsum (that pass is the BraggIntegrate2D box integrator and the seed of the profile fit).
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// The preprocessed image already lives on the device (ImagePreprocessorBufferGPU::getGPUBuffer());
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// only the per-frame predicted centres are uploaded.
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class BraggIntegrationEngineGPU : public BraggIntegrationEngine {
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std::shared_ptr<CudaStream> stream;
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int threads;
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size_t fit_shared_bytes;
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int rad_w = 0; // radial-background window of boxsum, in bins of one pixel
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size_t boxsum_shared_bytes = 0;
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size_t capacity = 0; // per-reflection device/host arrays hold at least this many reflections
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// --- per-reflection device arrays (grown by EnsureCapacity) ---
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CudaDevicePtr<float> d_px_x, d_px_y, d_d;
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CudaDevicePtr<int> d_cx, d_cy;
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CudaDevicePtr<float> d_I, d_sigma, d_bkg, d_bkg_var, d_var_bkg, d_obs_x, d_obs_y;
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CudaDevicePtr<float> d_isum; // box-sum raw sum, for the radial correction
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CudaDevicePtr<int> d_ninner, d_rbin, d_kbin;
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CudaDevicePtr<uint8_t> d_ok, d_strong, d_has_obs;
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// --- radial background curvature correction (see BraggIntegrationEngine) ---
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int n_rad = 0; // radial bins, 0 when the correction is off
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CudaDevicePtr<float> d_rad_sum, d_k_diff;
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CudaDevicePtr<int> d_rad_cnt;
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// --- fixed-size device arrays ---
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// The learning/fit math is single precision: FP64 is heavily throttled on consumer GPUs and the
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// extraction is Poisson-noise limited, so float reproduces the double CPU path to ~1e-4.
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CudaDevicePtr<uint8_t> d_mask; // per-pixel inner-stencil reflection mask
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// Per-pixel (distance, reflection) key naming the nearest predicted centre; allocated only when
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// an overlap treatment is on, so the default path costs no extra device memory.
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CudaDevicePtr<uint32_t> d_owner;
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CudaDevicePtr<float> d_shell_grid, d_global_grid; // learned profile accumulators (N_SHELL*GG, GG)
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CudaDevicePtr<float> d_shell_P, d_global_P; // normalised profiles (empirical mode)
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CudaDevicePtr<float> d_mom; // learned 2nd moments, 3 per shell + global
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CudaDevicePtr<float> d_sigma2_r, d_sigma2_t; // radial/tangential widths, N_SHELL + global
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CudaDevicePtr<int> d_shell_n, d_global_n;
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CudaDevicePtr<unsigned long long> d_invd2; // [min,max] inv-d^2 as monotonic bit patterns
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// --- host staging (copied back once per frame) ---
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std::vector<float> h_px_x, h_px_y, h_d;
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std::vector<float> h_I, h_sigma, h_bkg, h_var_bkg, h_obs_x, h_obs_y;
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std::vector<uint8_t> h_ok, h_has_obs;
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void EnsureCapacity(size_t n);
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public:
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BraggIntegrationEngineGPU(const DiffractionExperiment &experiment, std::shared_ptr<CudaStream> stream);
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std::vector<Reflection> Run(const ImagePreprocessorBuffer &image,
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const std::vector<Reflection> &predicted, size_t npredicted,
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int64_t image_number) override;
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};
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