Filip Leonarski 98ad3a6fdc FPGA: Reduce UltraRAM usage by 4 MiB to improve timing

2023-05-31 21:16:54 +02:00

..

bd_pcie.tcl

FPGA: clean-up unnecessary signals (from OC design)

2023-05-26 19:38:07 +02:00

build_pcie_design.tcl

Initial commit

2023-04-06 11:17:59 +02:00

check_hls.sh

Initial commit

2023-04-06 11:17:59 +02:00

hbm_u55c.tcl

Initial commit

2023-04-06 11:17:59 +02:00

jfjoch.tcl

FPGA: Reduce UltraRAM usage by 4 MiB to improve timing

2023-05-31 21:16:54 +02:00

mac_100g_pcie.tcl

FPGA: Reduce UltraRAM usage by 4 MiB to improve timing

2023-05-31 21:16:54 +02:00

network_stack.tcl

Initial commit

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pcie_dma.tcl

Initial commit

2023-04-06 11:17:59 +02:00

setup_action.sh

FPGA: clean-up unnecessary signals (from OC design)

2023-05-26 19:38:07 +02:00

snap_env.sh

Initial commit

2023-04-06 11:17:59 +02:00

synth_and_impl.tcl

Initial commit

2023-04-06 11:17:59 +02:00

synth_hls_function.tcl

Initial commit

2023-04-06 11:17:59 +02:00