leonarski_fandClaude Fable 5
70c4d871b6
- Capitalize Rugnux as a proper noun throughout the prose; the command stays lowercase `rugnux` in code font. RUGNUX_OVERVIEW.md is retitled "What Rugnux does". - ACKNOWLEDGEMENT.md cites the raw-data repositories only: dataset counts and DOI prefixes moved out (EXTERNAL_TEST_DATA.md owns them), the ESRF data portal gains its citation (Dimper et al. 2019), and MXRDR remains name + link - it has no canonical citation paper. - RUGNUX_FORMATS.md: the CCD formats (marCCD, SMV) are supported as-is with very limited scope, and per-panel XFEL data is not read. - Fix wrong facts a reader would act on: nonexistent `make jfjoch` targets, invalid udev rules, PUSH sockets documented as PULL, swapped writer width/height, underload semantics, the transposed pixel-mask numpy example (the server checks width and height separately), the Durin/Neggia mask-bit table, FPGA threshold register addresses and the mailbox bit field, the I2C core's document number (PG090), an inverted MODEL_FIT_SIGMA formula, a self-inconsistent worked report example, and 11 cross-page anchors whose slugs carry MyST section numbers. - Unify CC1/2 spelling in prose; math notation and report keys unchanged. - Sweep grammar, typos and editing residue across the FPGA, deployment, streaming and analysis pages, including historical CHANGELOG typos. - rugnux_cli.cpp: the -S usage/error examples pair 96 with P43212; 92 names a different group. - Root THIRD_PARTY_NOTICES.md: scope the GPL-compatibility claim (CUDA EULA) and the vendored-table intro (traccc); the docs copy regenerates via update_version.sh. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
72 lines
3.0 KiB
Markdown
72 lines
3.0 KiB
Markdown
# Tools
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Besides the main services ([`jfjoch_broker`](JFJOCH_BROKER.md),
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[`jfjoch_writer`](JFJOCH_WRITER.md), [`jfjoch_viewer`](JFJOCH_VIEWER.md)), the repository ships a
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number of command-line tools. Each prints its own usage when run with `-h` or without arguments.
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## Data analysis
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### Rugnux
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Offline CLI tool that runs the full crystallographic analysis pipeline (spot finding, indexing,
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integration, scaling/merging) on a stored HDF5 dataset, producing a `_process.h5` file and, when
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merging, reflection files. Merging is on by default (`--no-merge` disables it). `--mode` picks what a
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run does: `mx` (the above, the default), `azint` (only azimuthal integration, no spot
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finding/indexing), `scale` (re-scale/merge the already-integrated reflections in a `_process.h5`
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without re-integrating) or `calibration` (detector geometry from a calibrant's powder rings, written
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as `<prefix>.poni` and `<prefix>.json`). See [Rugnux](RUGNUX.md).
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`rugnux` installs on its own, as the `rugnux` package or as a standalone archive — see
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[Installing Rugnux](RUGNUX_INSTALL.md).
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### jfjoch_extract_hkl
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Extracts reflections (HKL list) from a Jungfraujoch master file; can sum the same HKL across
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neighbouring images and compare against an XDS `INTEGRATE.HKL` reference. A developer utility: it is
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built from source but is not installed into any package.
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## FPGA / PCIe card management
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### jfjoch_pcie_status
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Prints detailed status information about the card. Safe to run during data collection:
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```
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./jfjoch_pcie_status /dev/jfjoch0
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```
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### jfjoch_pcie_net_cfg
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Reads and modifies the network configuration of the card's interfaces:
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```
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jfjoch_pcie_net_cfg <device name>
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Read configuration for all network interfaces of a device
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jfjoch_pcie_net_cfg <device name> <if number>|fgen
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Read configuration for a particular network interface / internal frame generator
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jfjoch_pcie_net_cfg <device name> <if number>|fgen ipv4 <IPv4 address>
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Set IPv4 address for a particular network interface / internal frame generator
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jfjoch_pcie_net_cfg <device name> <if number>|fgen direct 0|1
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Set direct mode for a particular network interface / internal frame generator
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jfjoch_pcie_net_cfg <device name> <if number>|fgen clear
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Clear Ethernet counters for a particular network interface / internal frame generator
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```
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### jfjoch_pcie_clear_net_counters
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Resets the card's Ethernet, UDP and ICMP packet counters (which otherwise run from power-on):
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```
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./jfjoch_pcie_clear_net_counters /dev/jfjoch0
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```
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## Testing, benchmarking and simulation
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### jfjoch_udp_simulator
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UDP packet simulator used to test the Jungfraujoch FPGA receiver.
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### jfjoch_fpga_test
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Exercises and benchmarks the FPGA data path and receiver. With `-H` it runs the high-level
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synthesis C model on the CPU, so no FPGA device is required.
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### jfjoch_lite_perf_test
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Performance test of the lite (CPU/GPU) analysis path — indexing, integration and optional file
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writing.
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### jfjoch_hdf5_test
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Tests single-threaded HDF5 writer performance.
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### jfjoch_simplon_test
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Minimal test client for a DECTRIS SIMPLON detector API. |