A saturated pixel in a spot means the brightest part of the reflection was not measured. The integration used to drop the peak frame's partial (its peak pixel is unreadable) and keep the flanks, so the combine extrapolated the event from its tails by the partiality model: on a strongly diffracting small-molecule crystal the strongest low-order reflections read 2-3x low and were the largest SHELXL misfits. XDS drops such a reflection (OVERLOAD); so does rugnux now. - Integration (CPU + GPU engines): a reflection is `overloaded` when a signal-disk pixel is saturated, or unreadable on this frame but not in the run's pixel mask - EIGER/PILATUS write their error value for a pixel they could not count, which the preprocessor turns into a masked pixel like a gap's. The engines now receive the PixelMask to tell the two apart (an earlier attempt that re-classified the marker as saturation in the preprocessor broke a dataset whose gaps are not in the file's mask). An overloaded reflection is kept with its box sum, unfitted, only so its event can be recognised. - Rotation combine (CPU + GPU): an event with any overloaded partial is dropped whole; counted in the log and the report (OBSERVATIONS_REJECTED_OVERLOAD=). The unmerged MTZ export drops it too. - Everything else that reads reflections leaves an overloaded one out: AcceptReflection (stills merge, per-image scaling), the post-refinement gather, the axial-row sums. - Capture uncertainty: the merge rebuilds each full's variance at the reflection's mean (counting_variance / ModelSigma) and dropped the capture term the combine had put into sigma, so a full extrapolated from part of its rocking curve merged at the weight of a whole one. Fulls now carry it (Obs::capture) and the rebuilt variance adds (capture * <I>)^2, host and device. SHELXL R1 on rugnux's own integration (harness), median fix -> this: citric acid .0648 -> .0420 (XDS .051; 221 events dropped, EXTI 1.02 -> 0.29), HEPES .0396 -> .0381 (184), aspirin 20 keV .0387 -> .0385 (6), aspirin 25 keV .0376 -> .0375 (5); metformin/nidppe/dnba/lalanine/cytidine no overloads, unchanged. YAG .116 -> .128 (87 dropped; its scale loop does not settle either way). Proteins and private subset: see the branch report. Tests: BraggIntegrationEngineCPU_SaturatedPeakIsFlaggedNotDropped (new), BraggIntegrationEngineGPU_MatchesCPU (overloaded flag compared), AcceptReflection_ResolutionLimits, [write_reflections], [large]. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01K5K8jvPPbmCrbqnWkddTuB
171 lines
6.3 KiB
C++
171 lines
6.3 KiB
C++
// SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include "MXAnalysisAfterFPGA.h"
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#include <span>
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#include "spot_finding/DetModuleSpotFinder_cpu.h"
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#include "../common/CUDAWrapper.h"
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#include "../common/JFJochException.h"
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#include "spot_finding/SpotUtils.h"
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#include "bragg_prediction/BraggPredictionFactory.h"
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double stddev(const std::vector<float> &v) {
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if (v.size() <= 1)
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return 0.0;
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double mean = 0.0f;
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for (const auto &i: v)
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mean += i;
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mean /= v.size();
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double stddev = 0.0f;
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for (const auto &i: v)
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stddev += (i - mean) * (i - mean);
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return sqrt(stddev / (v.size() - 1));
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}
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MXAnalysisAfterFPGA::MXAnalysisAfterFPGA(const DiffractionExperiment &in_experiment,
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const AzimuthalIntegrationMapping &in_integration,
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IndexAndRefine &indexer)
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: experiment(in_experiment),
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integration(in_integration),
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indexer(indexer),
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prediction(CreateBraggPrediction(experiment.IsRotationIndexing())),
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// No pixel mask reaches this path: the FPGA image marks its own masked pixels, so only a
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// saturated pixel is read as an overload here.
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bragg_engine(std::make_unique<BraggIntegrationEngineCPU>(in_experiment, PixelMask(in_experiment))) {
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if (experiment.IsSpotFindingEnabled())
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find_spots = true;
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if (experiment.GetAzimuthalIntegrationSettings().IsForceCPUinFPGAWorkflow())
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cpu_azint = std::make_unique<AzIntEngineCPU>(integration);
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}
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void MXAnalysisAfterFPGA::RunAzimuthalIntegration(const void *image, AzimuthalIntegrationProfile &profile) {
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if (!cpu_azint)
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return;
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const size_t npixel = experiment.GetPixelsNum();
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auto run = [&](auto tag) {
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using pixel_t = decltype(tag);
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cpu_azint->RunAzint(std::span<const pixel_t>(static_cast<const pixel_t *>(image), npixel), profile);
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};
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switch (experiment.GetByteDepthImage()) {
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case 1:
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experiment.IsPixelSigned() ? run(int8_t{}) : run(uint8_t{});
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break;
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case 2:
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experiment.IsPixelSigned() ? run(int16_t{}) : run(uint16_t{});
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break;
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case 4:
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experiment.IsPixelSigned() ? run(int32_t{}) : run(uint32_t{});
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break;
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default:
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throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Pixel depth unsupported");
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}
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}
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void MXAnalysisAfterFPGA::ReadFromFPGA(const DeviceOutput *output, const SpotFindingSettings &settings, size_t module_number) {
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if (state == State::Disabled || !find_spots || !settings.enable) {
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state = State::Disabled;
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} else {
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const auto t0 = std::chrono::steady_clock::now();
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StrongPixelSet strong_pixel_set;
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strong_pixel_set.ReadFPGAOutput(experiment, *output);
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strong_pixel_set.FindSpots(experiment, settings, spots, module_number);
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const auto t1 = std::chrono::steady_clock::now();
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spot_finding_time_total += (t1 - t0);
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spot_finding_timing_active = true;
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state = State::Enabled;
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}
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}
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void MXAnalysisAfterFPGA::ReadFromCPU(DeviceOutput *output, const SpotFindingSettings &settings, size_t module_number) {
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std::unique_lock ul(read_from_cpu_mutex);
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if (state == State::Disabled || !find_spots || !settings.enable) {
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state = State::Disabled;
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} else {
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const auto t0 = std::chrono::steady_clock::now();
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state = State::Enabled;
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std::vector<float> d_map(RAW_MODULE_SIZE);
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experiment.CalcSpotFinderResolutionMap(d_map.data(), module_number);
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arr_mean.resize(RAW_MODULE_SIZE);
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arr_sttdev.resize(RAW_MODULE_SIZE);
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arr_valid_count.resize(RAW_MODULE_SIZE);
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arr_strong_pixel.resize(RAW_MODULE_SIZE);
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if (experiment.GetByteDepthImage() == 2)
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FindSpots(*output,
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settings,
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d_map.data(),
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arr_mean.data(),
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arr_sttdev.data(),
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arr_valid_count.data(),
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arr_strong_pixel.data());
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else if (experiment.GetByteDepthImage() == 4)
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FindSpots<int32_t>(*output,
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settings,
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d_map.data(),
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arr_mean.data(),
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arr_sttdev.data(),
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arr_valid_count.data(),
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arr_strong_pixel.data());
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else if (experiment.GetByteDepthImage() == 1)
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FindSpots<int8_t>(*output,
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settings,
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d_map.data(),
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arr_mean.data(),
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arr_sttdev.data(),
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arr_valid_count.data(),
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arr_strong_pixel.data());
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StrongPixelSet strong_pixel_set;
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strong_pixel_set.ReadFPGAOutput(experiment, *output);
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strong_pixel_set.FindSpots(experiment, settings, spots, module_number);
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const auto t1 = std::chrono::steady_clock::now();
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spot_finding_time_total += (t1 - t0);
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spot_finding_timing_active = true;
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}
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}
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void MXAnalysisAfterFPGA::Process(DataMessage &message, const SpotFindingSettings& spot_finding_settings) {
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if (find_spots && (state == State::Enabled)) {
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const auto t0 = std::chrono::steady_clock::now();
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SpotAnalyze(experiment, spot_finding_settings, spots, message);
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const auto t1 = std::chrono::steady_clock::now();
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spot_finding_time_total += (t1 - t0);
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if (spot_finding_settings.indexing)
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indexer.ProcessImage(message, spot_finding_settings, *prediction,
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[this, &message](const std::vector<Reflection> &predicted, size_t npredicted, int64_t image_number) {
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return bragg_engine->Run(message.image, predicted, npredicted, image_number);
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});
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}
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if (spot_finding_timing_active) {
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// total spot-finding time for the whole image
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message.spot_finding_time_s = spot_finding_time_total.count() / 1e6;
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// report/store ms here
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spot_finding_time_total = std::chrono::duration<double, std::micro>{0.0};
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spot_finding_timing_active = false;
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}
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spots.clear();
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state = State::Idle;
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}
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