Logo
Explore Help
Sign In
mx/Jungfraujoch
0
0
Fork 0
You've already forked Jungfraujoch
Code Issues Pull Requests Actions 1 Packages Projects Releases 37 Wiki Activity
Files
4e4a232a6d5aebf2de4711d92c06e6b0029febee
Jungfraujoch/fpga/scripts
History
Filip Leonarski f04f7a274b FPGA: Name spot finder signals in consistent manner
2023-10-19 20:52:09 +02:00
..
bd_pcie.tcl
FPGA: integration results are reduced to cover two bins per 512-bit
2023-09-29 22:07:52 +02:00
build_pcie_design.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
check_hls.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
hbm_u55c.tcl
FPGA: frame generator reads from HBM (work in progress)
2023-09-26 13:14:43 +02:00
jfjoch.tcl
FPGA: Name spot finder signals in consistent manner
2023-10-19 20:52:09 +02:00
mac_100g_pcie.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
network_stack.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
pcie_dma.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
setup_action.sh
FPGA: Split receiver and FPGA design directories
2023-06-07 21:21:22 +02:00
synth_and_impl.tcl
Remove open source license (for now)
2023-09-15 10:47:21 +02:00
synth_hls_function.tcl
HLS: Improve make scripts, so HLS test bench can be defined
2023-10-18 16:32:31 +02:00
Powered by Gitea Version: 1.25.4 Page: 35ms Template: 3ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API