Add AzimuthalIntegrationSettings::ForceCPUinFPGAWorkflow so the FPGA data-acquisition path can compute azimuthal integration on the CPU instead of the FPGA. This removes the FPGA bin-count limit (FPGA_INTEGRATION_BIN_COUNT) and adds per-bin standard deviation. - MXAnalysisAfterFPGA runs AzIntEngineCPU on the assembled image; the FPGA integration-map load and per-module read-back are skipped when forced. - JFJochReceiverFPGA rejects bin counts above the FPGA limit at acquisition start (unless CPU is forced) with an actionable error. - Wire force_cpu through the broker (both directions) and the frontend. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
165 lines
5.8 KiB
C++
165 lines
5.8 KiB
C++
// SPDX-FileCopyrightText: 2024 Filip Leonarski, Paul Scherrer Institute <filip.leonarski@psi.ch>
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// SPDX-License-Identifier: GPL-3.0-only
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#include "MXAnalysisAfterFPGA.h"
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#include <span>
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#include "spot_finding/DetModuleSpotFinder_cpu.h"
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#include "../common/CUDAWrapper.h"
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#include "../common/JFJochException.h"
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#include "spot_finding/SpotUtils.h"
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#include "bragg_prediction/BraggPredictionFactory.h"
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double stddev(const std::vector<float> &v) {
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if (v.size() <= 1)
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return 0.0;
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double mean = 0.0f;
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for (const auto &i: v)
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mean += i;
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mean /= v.size();
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double stddev = 0.0f;
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for (const auto &i: v)
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stddev += (i - mean) * (i - mean);
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return sqrt(stddev / (v.size() - 1));
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}
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MXAnalysisAfterFPGA::MXAnalysisAfterFPGA(const DiffractionExperiment &in_experiment,
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const AzimuthalIntegrationMapping &in_integration,
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IndexAndRefine &indexer)
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: experiment(in_experiment),
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integration(in_integration),
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indexer(indexer),
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prediction(CreateBraggPrediction(experiment.IsRotationIndexing())) {
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if (experiment.IsSpotFindingEnabled())
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find_spots = true;
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if (experiment.GetAzimuthalIntegrationSettings().IsForceCPUinFPGAWorkflow())
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cpu_azint = std::make_unique<AzIntEngineCPU>(integration);
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}
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void MXAnalysisAfterFPGA::RunAzimuthalIntegration(const void *image, AzimuthalIntegrationProfile &profile) {
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if (!cpu_azint)
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return;
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const size_t npixel = experiment.GetPixelsNum();
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auto run = [&](auto tag) {
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using pixel_t = decltype(tag);
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cpu_azint->RunAzint(std::span<const pixel_t>(static_cast<const pixel_t *>(image), npixel), profile);
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};
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switch (experiment.GetByteDepthImage()) {
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case 1:
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experiment.IsPixelSigned() ? run(int8_t{}) : run(uint8_t{});
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break;
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case 2:
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experiment.IsPixelSigned() ? run(int16_t{}) : run(uint16_t{});
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break;
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case 4:
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experiment.IsPixelSigned() ? run(int32_t{}) : run(uint32_t{});
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break;
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default:
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throw JFJochException(JFJochExceptionCategory::InputParameterInvalid, "Pixel depth unsupported");
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}
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}
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void MXAnalysisAfterFPGA::ReadFromFPGA(const DeviceOutput *output, const SpotFindingSettings &settings, size_t module_number) {
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if (state == State::Disabled || !find_spots || !settings.enable) {
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state = State::Disabled;
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} else {
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const auto t0 = std::chrono::steady_clock::now();
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StrongPixelSet strong_pixel_set;
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strong_pixel_set.ReadFPGAOutput(experiment, *output);
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strong_pixel_set.FindSpots(experiment, settings, spots, module_number);
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const auto t1 = std::chrono::steady_clock::now();
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spot_finding_time_total += (t1 - t0);
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spot_finding_timing_active = true;
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state = State::Enabled;
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}
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}
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void MXAnalysisAfterFPGA::ReadFromCPU(DeviceOutput *output, const SpotFindingSettings &settings, size_t module_number) {
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std::unique_lock ul(read_from_cpu_mutex);
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if (state == State::Disabled || !find_spots || !settings.enable) {
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state = State::Disabled;
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} else {
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const auto t0 = std::chrono::steady_clock::now();
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state = State::Enabled;
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std::vector<float> d_map(RAW_MODULE_SIZE);
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experiment.CalcSpotFinderResolutionMap(d_map.data(), module_number);
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arr_mean.resize(RAW_MODULE_SIZE);
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arr_sttdev.resize(RAW_MODULE_SIZE);
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arr_valid_count.resize(RAW_MODULE_SIZE);
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arr_strong_pixel.resize(RAW_MODULE_SIZE);
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if (experiment.GetByteDepthImage() == 2)
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FindSpots(*output,
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settings,
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d_map.data(),
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arr_mean.data(),
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arr_sttdev.data(),
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arr_valid_count.data(),
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arr_strong_pixel.data());
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else if (experiment.GetByteDepthImage() == 4)
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FindSpots<int32_t>(*output,
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settings,
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d_map.data(),
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arr_mean.data(),
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arr_sttdev.data(),
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arr_valid_count.data(),
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arr_strong_pixel.data());
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else if (experiment.GetByteDepthImage() == 1)
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FindSpots<int8_t>(*output,
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settings,
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d_map.data(),
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arr_mean.data(),
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arr_sttdev.data(),
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arr_valid_count.data(),
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arr_strong_pixel.data());
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StrongPixelSet strong_pixel_set;
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strong_pixel_set.ReadFPGAOutput(experiment, *output);
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strong_pixel_set.FindSpots(experiment, settings, spots, module_number);
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const auto t1 = std::chrono::steady_clock::now();
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spot_finding_time_total += (t1 - t0);
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spot_finding_timing_active = true;
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}
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}
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void MXAnalysisAfterFPGA::Process(DataMessage &message, const SpotFindingSettings& spot_finding_settings) {
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if (find_spots && (state == State::Enabled)) {
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const auto t0 = std::chrono::steady_clock::now();
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SpotAnalyze(experiment, spot_finding_settings, spots, message);
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const auto t1 = std::chrono::steady_clock::now();
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spot_finding_time_total += (t1 - t0);
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if (spot_finding_settings.indexing)
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indexer.ProcessImage(message, spot_finding_settings, message.image, *prediction);
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}
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if (spot_finding_timing_active) {
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// total spot-finding time for the whole image
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message.spot_finding_time_s = spot_finding_time_total.count() / 1e6;
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// report/store ms here
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spot_finding_time_total = std::chrono::duration<double, std::micro>{0.0};
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spot_finding_timing_active = false;
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}
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spots.clear();
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state = State::Idle;
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}
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