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04c2e41cf52cc96e523b39d0f4812e80c05cdfcb
Jungfraujoch
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receiver
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HLSSimulatedDevice.cpp
Filip Leonarski
41985b6c29
FPGA: Increase data width of conversion to 18-bit. This allows to use full unsigned precision + raw data are handled properly.
2023-11-07 19:11:37 +01:00
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