 leonarski_f
|
f5f86d9ab6
|
Modifications in preparation to MAX IV experiment
|
2024-01-27 21:23:56 +01:00 |
|
|
leonarski_f
|
427f0f7a45
|
Fix tests + re-run FPGA synthesis
|
2023-11-07 21:42:16 +01:00 |
|
|
leonarski_f
|
adc0a1bab6
|
Fix tests + re-run FPGA synthesis
|
2023-11-07 21:36:22 +01:00 |
|
|
leonarski_f
|
41985b6c29
|
FPGA: Increase data width of conversion to 18-bit. This allows to use full unsigned precision + raw data are handled properly.
|
2023-11-07 19:11:37 +01:00 |
|
|
leonarski_f
|
1b2b8f5863
|
FPGA: Fix problems in summation and related cores
|
2023-11-02 20:25:29 +01:00 |
|
|
leonarski_f
|
8cd0d497ad
|
FPGA: Allow saving 32-bit unsigned.
|
2023-11-02 13:32:29 +01:00 |
|
|
leonarski_f
|
961c17c4d0
|
FPGA: data analysis is done based on 24-bit numbers - allowing frame summation
|
2023-10-28 16:35:33 +02:00 |
|