4 Commits

Include renames

Author	SHA1	Message	Date
leonarski_f	001a7d86fc	FPGA: For totally unknown reason making UDP metadata stream narrower results in timing not met	2023-04-17 08:02:24 +02:00
leonarski_f	c792367496	FPGA: Minor clean-up of UDP processing	2023-04-15 19:33:34 +02:00
leonarski_f	653b82d6c3	FPGA + receiver + detector: Use column ID to decode detector half-module number	2023-04-15 11:08:32 +02:00
leonarski_f	1757d42182	Initial commit ... Signed-off-by: Filip Leonarski <filip.leonarski@psi.ch>	2023-04-06 11:17:59 +02:00