2 Commits

Include renames

Author	SHA1	Message	Date
leonarski_fandClaude Opus 4.8	4cda46c6b0	Wire BraggIntegrationEngine into the pipeline; deterministic prediction; integration_model API ... Replace the free functions BraggIntegrate2D/ProfileIntegrate2D with the BraggIntegrationEngine (CPU/GPU) as the live integrator. - IndexAndRefine no longer holds the integrator: ProcessImage takes a per-worker BraggIntegrateFn callback (ProcessImage is called concurrently by the shared IndexAndRefine, so the stateful engine must not be a member). - WithoutFPGA/jfjoch_process: owns a GPU engine when a GPU is present, else CPU, and passes the GPU-resident preprocessed buffer so integration runs on-device. - AfterFPGA: forces CPU and integrates straight off the assembled CompressedImage via a templated per-pixel sampler - only the reflection-disk pixels are read, no whole-image copy (the FPGA host runs up to 36 GB/s). Sampler maps type min/max to INT32_MIN/INT32_MAX on read; special/saturation only, no +/-1 band. - Remove BraggIntegrate2D/ProfileIntegrate2D and their test; keep IntegratorMode. Prediction: buffer up to 20000 candidates but return the 10000 closest to the Ewald sphere (deterministic partial_sort on |dist_ewald|, hkl tiebreak) instead of the GPU atomic-fill order. Serialized output stays <=10000, so the frame transport headroom and its CBOR guard are unchanged. integration_model exposed via OpenAPI (bragg_integration_settings schema, /config/bragg_integration PUT/GET, added to jfjoch_settings and jfjoch_statistics) and the frontend (BraggIntegrationSettings dropdown). Regenerated C++/TS clients and redoc. Validated old-vs-new on all 18 /data/rotation_test crystals: indexing rate and space group bit-identical; ISa/CC identical on 16/18 (one improved, EcwtAL500 ISa 0.0->6.7); new CompressedImage-vs-buffer and GPU-vs-CPU parity tests pass. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>	2026-07-03 14:35:20 +02:00
leonarski_fandClaude Opus 4.8	ddddfb6ffc	bragg_integration: GPU box + profile-fit integrator (standalone engine) ... Reimplement BraggIntegrate2D (box sum) and ProfileIntegrate2D (Kabsch profile fit) under one roof as a base + CPU + GPU engine, mirroring the AzIntEngine / ROIIntegration pattern. Reads the preprocessed int32 ImagePreprocessorBuffer (masked=INT32_MIN, saturated=INT32_MAX), the same buffer AzIntEngineGPU/ROIIntegrationGPU consume. The CUDA engine runs one block per reflection with shared-memory reductions across six kernels (reset, mask, box-sum, profile learning, profile build, Kabsch fit); the resolution shell is computed inline. The learning/fit hot path is single precision (FP64 is throttled on consumer GPUs; reproduces the double CPU path to ~1e-4). Collapsing the per-frame CUDA API calls into one reset kernel keeps launch-latency overhead low. Standalone for now: NOT wired into IndexAndRefine. See BRAGG_INTEGRATION_ENGINE.md for the design and the binding steps. BraggIntegrationEngineGPUTest checks GPU == CPU across all three modes (box/gaussian/empirical) within numeric tolerance, plus a [bragg_bench] perf sweep. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>	2026-07-02 20:59:45 +02:00