FPGA: Added spot_finder_update_sum function, as first step for versatile spot finder

tests/FPGASpotFindingUnitTest.cpp

@@ -59,6 +59,60 @@ TEST_CASE("FPGA_calc_sum","[FPGA][SpotFinder]") {
     }
 }
 
+TEST_CASE("FPGA_calc_valid","[FPGA][SpotFinder]") {
+    ap_uint<32> old_mask = UINT32_MAX;
+    ap_uint<32> new_mask = UINT32_MAX;
+
+    old_mask[15] = 0;
+    new_mask[13] = 0;
+
+    ap_uint<MASK_SUM_BITWIDTH*32> diff_mask;
+    calc_mask_diff(diff_mask, old_mask, new_mask);
+
+    ap_int<MASK_SUM_BITWIDTH> diff_mask_32[32];
+    unpack32(diff_mask, diff_mask_32);
+
+    REQUIRE(diff_mask_32[0] == 0);
+    REQUIRE(diff_mask_32[1] == 0);
+
+    REQUIRE(diff_mask_32[13] == -1);
+    REQUIRE(diff_mask_32[15] == 1);
+}
+
+TEST_CASE("FPGA_calc_mask","[FPGA][SpotFinder]") {
+    ap_int<16> value_in[32], value_out[32];
+
+    for (int i = 0; i < 32; i++)
+        value_in[i] = 154 + i;
+
+    value_in[15] = INT16_MAX;
+    value_in[0] = INT16_MIN;
+    value_in[1] = INT16_MIN + 1;
+    value_in[2] = INT16_MAX - 1;
+
+    ap_uint<512> input = pack32(value_in);
+    ap_uint<512> output = 0;
+    ap_uint<32> mask = 0;
+
+    calc_mask(input, output, mask);
+
+    REQUIRE(mask[0] == 0);
+    REQUIRE(mask[15] == 0);
+    REQUIRE(mask[1] == 1);
+    REQUIRE(mask[2] == 1);
+    REQUIRE(mask[3] == 1);
+    REQUIRE(mask[4] == 1);
+
+    unpack32(output, value_out);
+
+    REQUIRE(value_out[0] == 0);
+    REQUIRE(value_out[15] == 0);
+    REQUIRE(value_out[1] == value_in[1]);
+    REQUIRE(value_out[2] == value_in[2]);
+    REQUIRE(value_out[3] == value_in[3]);
+    REQUIRE(value_out[4] == value_in[4]);
+}
+
 TEST_CASE("FPGA_update_sum" , "[FPGA][SpotFinder]") {
     ap_int<SUM2_BITWIDTH> arr_val1[32], arr_val2[32], arr_out[32];
 
@@ -107,3 +161,86 @@ TEST_CASE("FPGA_spot_check_threshold","[FPGA][SpotFinder]") {
     }
 }
 
+
+TEST_CASE("FPGA_spot_finder_update_sum","[FPGA][SpotFinder]") {
+    STREAM_512 input;
+    STREAM_512 output;
+
+    hls::stream<ap_uint<(SUM_BITWIDTH*32)>> sum_out;
+    hls::stream<ap_uint<SUM2_BITWIDTH*32>> sum2_out;
+    hls::stream<ap_uint<MASK_SUM_BITWIDTH*32>> valid_out;
+
+    std::vector<int16_t> input_frame(RAW_MODULE_SIZE);
+    for (int i = 0; i < RAW_MODULE_SIZE; i++) {
+        if (i % RAW_MODULE_COLS == 1023)
+            input_frame[i] = INT16_MIN;
+        else
+            input_frame[i] = i % RAW_MODULE_COLS;
+    }
+    auto input_frame_512 = (ap_uint<512> *) input_frame.data();
+
+    input << packet_512_t{.user = 0};
+    for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++)
+        input << packet_512_t{.data = input_frame_512[i], .user = 0};
+
+    input << packet_512_t{.user = 1};
+
+    spot_finder_update_sum(input, output, sum_out, sum2_out, valid_out);
+
+    REQUIRE(input.size() == 0);
+
+    REQUIRE(output.size()    == RAW_MODULE_SIZE * sizeof(uint16_t) / 64 + 2);
+    REQUIRE(sum_out.size()   == RAW_MODULE_SIZE * sizeof(uint16_t) / 64);
+    REQUIRE(sum2_out.size()  == RAW_MODULE_SIZE * sizeof(uint16_t) / 64);
+    REQUIRE(valid_out.size() == RAW_MODULE_SIZE * sizeof(uint16_t) / 64);
+
+    std::vector<int64_t> sum(RAW_MODULE_SIZE);
+    std::vector<int64_t> sum2(RAW_MODULE_SIZE);
+    std::vector<int64_t> valid(RAW_MODULE_SIZE);
+
+    for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / 64; i++) {
+        ap_uint<32 * SUM_BITWIDTH> tmp_sum;
+        ap_uint<32 * SUM2_BITWIDTH> tmp_sum2;
+        ap_uint<32 * MASK_SUM_BITWIDTH> tmp_valid;
+        sum_out   >> tmp_sum;
+        sum2_out  >> tmp_sum2;
+        valid_out >> tmp_valid;
+
+        ap_uint<SUM_BITWIDTH> tmp_sum_unpacked[32];
+        ap_uint<SUM2_BITWIDTH> tmp_sum2_unpacked[32];
+        ap_uint<MASK_SUM_BITWIDTH> tmp_valid_unpacked[32];
+        unpack32(tmp_sum, tmp_sum_unpacked);
+        unpack32(tmp_sum2, tmp_sum2_unpacked);
+        unpack32(tmp_valid, tmp_valid_unpacked);
+
+        for (int j = 0; j < 32; j++) {
+            sum[i * 32 + j] = tmp_sum_unpacked[j];
+            sum2[i * 32 + j] = tmp_sum2_unpacked[j];
+            valid[i * 32 + j] = tmp_valid_unpacked[j];
+        }
+    }
+
+    CHECK(sum[1] == (FPGA_NBX+1) * 1);
+    CHECK(sum[3] == (FPGA_NBX+1) * 3);
+    CHECK(sum[1023] == 0);
+    CHECK(sum[1022+200*1024] == (2 * FPGA_NBX+1) * 1022);
+
+    CHECK(sum2[3] == (FPGA_NBX+1) * 3 * 3);
+    CHECK(sum2[1023] == 0);
+    CHECK(sum2[1022+200*1024] == (2 * FPGA_NBX+1) * 1022 * 1022);
+
+    CHECK(valid[1] == FPGA_NBX + 1);
+    CHECK(valid[3] == FPGA_NBX + 1);
+    CHECK(valid[1023] == 0);
+    CHECK(valid[1023 + 323*1024] == 0);
+
+    CHECK(valid[1+1024] == FPGA_NBX + 1 + 1);
+    CHECK(valid[1+1024] == FPGA_NBX + 1 + 1);
+    CHECK(valid[1+3*1024] == FPGA_NBX + 1 + 3);
+    CHECK(valid[1+200*1024] == 2 * FPGA_NBX + 1);
+
+    CHECK(valid[1+509*1024] == FPGA_NBX + 1 + 2);
+    CHECK(valid[1+510*1024] == FPGA_NBX + 1 + 1);
+    CHECK(valid[1+511*1024] == FPGA_NBX + 1);
+}
+