mx/Jungfraujoch
2
1
Fork 0
Code Issues Pull Requests Actions 7 Packages Projects Releases 67 Wiki Activity

ProtoBuf: Don't use maps, as these don't preserve order of elements

Browse Source
This commit is contained in:
leonarski_f
2023-06-26 09:27:47 +02:00
parent 2caba97bb2
commit a43fa2a296
6 changed files with 136 additions and 111 deletions
Download Patch File Download Diff File Expand all files Collapse all files
receiver/FPGAAcquisitionDevice.cpp
+20 -13
View File
@@ -156,12 +156,19 @@ ActionConfig FPGAAcquisitionDevice::ReadActionRegister() {
return cfg;
}
inline JFJochProtoBuf::FPGAFIFOStatus FIFO_check(uint32_t fifo_register, uint16_t pos_empty, uint16_t pos_full) {
inline void FIFO_check(JFJochProtoBuf::FPGAStatus &fpga_status,
const std::string &name,
uint32_t fifo_register,
uint16_t pos_empty,
uint16_t pos_full) {
auto fifo_status = fpga_status.add_fifo_status();
fifo_status->set_name(name);
if (std::bitset<32>(fifo_register).test(pos_empty))
return JFJochProtoBuf::FPGAFIFOStatus::EMPTY;
fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::EMPTY);
if (std::bitset<32>(fifo_register).test(pos_full))
return JFJochProtoBuf::FPGAFIFOStatus::FULL;
return JFJochProtoBuf::FPGAFIFOStatus::PARTIAL;
fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::FULL);
fifo_status->set_value(JFJochProtoBuf::FPGAFIFOStatusEnum::PARTIAL);
}
JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const {
@@ -182,15 +189,15 @@ JFJochProtoBuf::FPGAStatus FPGAAcquisitionDevice::GetStatus() const {
ret.set_max_modules(status.max_modules);
ret.set_git_sha1(status.git_sha1);
(*ret.mutable_fifo_status())["Conversion input (data)"] = FIFO_check(status.fifo_status, 0, 1);
(*ret.mutable_fifo_status())["Conversion input (cmd)"] = FIFO_check(status.fifo_status, 2, 3);
(*ret.mutable_fifo_status())["UDP"] = FIFO_check(status.fifo_status, 6, 7);
(*ret.mutable_fifo_status())["Work Request"] = FIFO_check(status.fifo_status, 12, 13);
(*ret.mutable_fifo_status())["Work Completion"] = FIFO_check(status.fifo_status, 14, 15);
(*ret.mutable_fifo_status())["Host mem (data)"] = FIFO_check(status.fifo_status, 8, 9);
(*ret.mutable_fifo_status())["Host mem (cmd)"] = FIFO_check(status.fifo_status, 10, 11);
(*ret.mutable_fifo_status())["Data FIFO #8"] = FIFO_check(status.fifo_status, 16, 17);
(*ret.mutable_fifo_status())["Addr FIFO #3"] = FIFO_check(status.fifo_status, 18, 19);
FIFO_check(ret, "Conversion input (data)", status.fifo_status, 0, 1);
FIFO_check(ret, "Conversion input (cmd)", status.fifo_status, 2, 3);
FIFO_check(ret, "UDP", status.fifo_status, 6, 7);
FIFO_check(ret, "Work Request", status.fifo_status, 12, 13);
FIFO_check(ret, "Work Completion", status.fifo_status, 14, 15);
FIFO_check(ret, "Host mem (data)", status.fifo_status, 8, 9);
FIFO_check(ret, "Host mem (cmd)", status.fifo_status, 10, 11);
FIFO_check(ret, "Data FIFO #8", status.fifo_status, 16, 17);
FIFO_check(ret, "Addr FIFO #3", status.fifo_status, 18, 19);
ret.set_fpga_idle(HW_IsIdle());