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FPGA: frame generator reads from HBM (work in progress)

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This commit is contained in:
leonarski_f
2023-09-26 13:14:43 +02:00
parent 0f7c14c267
commit 84bf69b8a6
21 changed files with 188 additions and 141 deletions
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tests/FPGAIntegrationTest.cpp
+9 -8
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@@ -19,6 +19,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") {
x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0);
HLSSimulatedDevice test(0, 64);
test.SetInternalGeneratorFrame();
REQUIRE_NOTHROW(test.StartAction(x));
REQUIRE_NOTHROW(test.WaitForActionComplete());
@@ -55,7 +56,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful
x.UseInternalPacketGenerator(true).ImagesPerTrigger(4).PedestalG0Frames(0);
HLSSimulatedDevice test(0, 64);
test.SetCustomInternalGeneratorFrame(test_frame);
test.SetInternalGeneratorFrame(test_frame);
REQUIRE_NOTHROW(test.StartAction(x));
REQUIRE_NOTHROW(test.WaitForActionComplete());
@@ -427,7 +428,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_convert_full_range", "[FPG
}
HLSSimulatedDevice test(0, 64);
test.SetInternalGeneratorFrame();
REQUIRE_NOTHROW(test.InitializeCalibration(x, c));
REQUIRE_NOTHROW(test.StartAction(x));
REQUIRE_NOTHROW(test.WaitForActionComplete());
@@ -489,7 +490,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_apply_pixel_mask", "[FPGA]
HLSSimulatedDevice test(0, 64);
test.SetCustomInternalGeneratorFrame(test_frame);
test.SetInternalGeneratorFrame(test_frame);
REQUIRE_NOTHROW(test.InitializeCalibration(x, c));
REQUIRE_NOTHROW(test.StartAction(x));
@@ -855,7 +856,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_15_storage_cell_convert_G0
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16000;
REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
JFCalibration c(x);
for (int i = 0; i < nstoragecells; i++) {
@@ -903,7 +904,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_8_storage_cell_convert_G0"
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16000;
REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
JFCalibration c(x);
for (int i = 0; i < nstoragecells; i++) {
@@ -951,7 +952,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_16_storage_cell_convert_G0
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16000;
REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
JFCalibration c(x);
for (int i = 0; i < nstoragecells; i++) {
@@ -991,7 +992,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G1",
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16384 | 10;
REQUIRE_NOTHROW(test.SetCustomInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
JFCalibration c(x);
for (int i = 0; i < 16; i++) {
@@ -1038,7 +1039,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_integration", "[FPGA][Full
for (int i = 2; i < RAW_MODULE_SIZE; i++)
frame[i] = 32754;
test.SetCustomInternalGeneratorFrame(frame);
test.SetInternalGeneratorFrame(frame);
std::vector<uint16_t> integration_map(nmodules * RAW_MODULE_SIZE, 54);
for (int i = 0; i < RAW_MODULE_SIZE/2; i++) {