FPGAIntegrationTest: Use blocking mode for one remaining test

2023-09-14 23:48:02 +02:00
parent 0a152f7b5a
commit 7a026b89d0
1 changed files with 1 additions and 1 deletions
--- a/tests/FPGAIntegrationTest.cpp
+++ b/tests/FPGAIntegrationTest.cpp
@@ -961,7 +961,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_16_storage_cell_convert_G0
    REQUIRE(x.GetImageNum() == ntrigger * nstoragecells);

    HLSSimulatedDevice test(0, ntrigger * nstoragecells);
-
+    test.SetFPGANonBlockingMode(false);
    std::vector<double> tmp(3 * RAW_MODULE_SIZE, 50);
    JFModuleGainCalibration gain(tmp);