FPGA: spot_finder added

fpga/hls/host_writer.cpp

@@ -75,6 +75,7 @@ inline ap_uint<1> read_request(hls::stream<ap_uint<32> > &s_axis_work_request,
 
 void host_writer(STREAM_512 &data_in,
                  hls::stream<ap_uint<192>> &integration_in,
+                 hls::stream<ap_uint<512>> &spot_finder_in,
                  hls::stream<axis_completion > &s_axis_completion,
                  hls::stream<ap_axiu<512,1,1,1> > &host_memory_out,
                  hls::stream<axis_datamover_ctrl> &datamover_out_cmd,
@@ -86,6 +87,7 @@ void host_writer(STREAM_512 &data_in,
 #pragma HLS INTERFACE ap_ctrl_none port=return
 #pragma HLS INTERFACE register both axis port=data_in
 #pragma HLS INTERFACE register both axis port=integration_in
+#pragma HLS INTERFACE register both axis port=spot_finder_in
 #pragma HLS INTERFACE register both axis port=s_axis_completion
 #pragma HLS INTERFACE register both axis port=host_memory_out
 #pragma HLS INTERFACE register both axis port=datamover_out_cmd
@@ -124,8 +126,8 @@ void host_writer(STREAM_512 &data_in,
     s_axis_completion >> cmpl;
     while (!cmpl.last) {
         read_request(s_axis_work_request, req_handle, req_host_offset);
-        setup_datamover(datamover_out_cmd, req_host_offset, RAW_MODULE_SIZE * sizeof(uint16_t)
-                + (FPGA_INTEGRATION_BIN_COUNT)*64);
+        setup_datamover(datamover_out_cmd, req_host_offset,
+                        RAW_MODULE_SIZE * sizeof(uint16_t) * (16 + 1) / 16 + (FPGA_INTEGRATION_BIN_COUNT)*64);
 
         packet_512_t packet_out;
         packet_out.strb = UINT64_MAX;
@@ -142,6 +144,12 @@ void host_writer(STREAM_512 &data_in,
             host_memory_out << packet_out;
         }
 
+        for (int i = 0; i < RAW_MODULE_SIZE * sizeof(uint16_t) / (64 * 16); i++) {
+#pragma HLS PIPELINE II=1
+            spot_finder_in >> packet_out.data;
+            host_memory_out << packet_out;
+        }
+
         for (int i = 0; i < FPGA_INTEGRATION_BIN_COUNT; i++) {
 #pragma HLS PIPELINE II=1
             ap_uint<192> tmp;