FPGA: frame_summation_reorder_compl doesn't need ap_start

This commit is contained in:
2023-11-23 16:39:48 +01:00
parent 73cb5531b5
commit 657cf802eb
2 changed files with 2 additions and 1 deletions
@@ -6,6 +6,7 @@ void frame_summation_reorder_compl(STREAM_512 &data_in,
STREAM_512 &data_out,
hls::stream<axis_completion > &s_axis_completion,
hls::stream<axis_completion > &m_axis_completion) {
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE axis register both port=data_in
#pragma HLS INTERFACE axis register both port=data_out
#pragma HLS INTERFACE axis register both port=s_axis_completion
+1 -1
View File
@@ -250,7 +250,7 @@ proc create_hier_cell_hbm_cache { parentCell nameHier } {
connect_bd_net -net axis_hbm_handles_fifo_almost_empty [get_bd_pins hbm_handle_fifo_empty] [get_bd_pins axis_hbm_handles_fifo/almost_empty]
connect_bd_net -net axis_hbm_handles_fifo_almost_full [get_bd_pins hbm_handle_fifo_full] [get_bd_pins axis_hbm_handles_fifo/almost_full]
connect_bd_net -net hbm_size_bytes_1 [get_bd_pins hbm_size_bytes] [get_bd_pins load_from_hbm_0/hbm_size_bytes] [get_bd_pins save_to_hbm_0/hbm_size_bytes]
connect_bd_net -net m_axis_s2mm_sts_tready_1 [get_bd_pins axi_datamover_0/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_0/m_axis_s2mm_sts_tready] [get_bd_pins axi_datamover_1/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_1/m_axis_s2mm_sts_tready] [get_bd_pins frame_summation_reor_0/ap_start] [get_bd_pins one/dout]
connect_bd_net -net m_axis_s2mm_sts_tready_1 [get_bd_pins axi_datamover_0/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_0/m_axis_s2mm_sts_tready] [get_bd_pins axi_datamover_1/m_axis_mm2s_sts_tready] [get_bd_pins axi_datamover_1/m_axis_s2mm_sts_tready] [get_bd_pins one/dout]
# Restore current instance
current_bd_instance $oldCurInst