FPGA: frame_summation_reorder_compl - minor change in operation order

This commit is contained in:
2023-11-23 14:56:40 +01:00
parent d38a6baa59
commit 5e7868d17d
+5 -5
View File
@@ -11,11 +11,6 @@ void frame_summation_reorder_compl(STREAM_512 &data_in,
#pragma HLS INTERFACE axis register both port=s_axis_completion
#pragma HLS INTERFACE axis register both port=m_axis_completion
packet_512_t packet_in;
data_in >> packet_in;
ap_uint<8> sum = ACT_REG_NSUMMATION(packet_in.data); // 0..255
data_out << packet_in;
axis_completion completions[MAX_FPGA_SUMMATION * MAX_MODULES_FPGA];
ap_uint<MAX_FPGA_SUMMATION> completion_mask[MAX_MODULES_FPGA];
ap_uint<9> completion_count[MAX_MODULES_FPGA]; // must represent 256
@@ -28,6 +23,11 @@ void frame_summation_reorder_compl(STREAM_512 &data_in,
curr_frame_number_prefix[i] = 0;
}
packet_512_t packet_in;
data_in >> packet_in;
data_out << packet_in;
ap_uint<8> sum = ACT_REG_NSUMMATION(packet_in.data); // 0..255
axis_completion c;
s_axis_completion >> c;
while (!c.last) {