FPGA: transfer for image and processing results are separate DMA transactions

This commit is contained in:
2023-10-28 16:47:06 +02:00
parent 961c17c4d0
commit 2ed91c1849
7 changed files with 22 additions and 18 deletions

View File

@@ -36,7 +36,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") {
REQUIRE(imageBuf[i] == i % 65536);
}
}
REQUIRE(test.GetCompletedDescriptors() == (4 + DELAY_FRAMES_STOP_AND_QUIT - 1) * nmodules);
REQUIRE(test.GetCompletedDescriptors() == 2 * (4 + DELAY_FRAMES_STOP_AND_QUIT - 1) * nmodules);
}
TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Full]") {