FPGA: transfer for image and processing results are separate DMA transactions
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@@ -36,7 +36,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator", "[FPGA][Full]") {
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REQUIRE(imageBuf[i] == i % 65536);
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}
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}
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REQUIRE(test.GetCompletedDescriptors() == (4 + DELAY_FRAMES_STOP_AND_QUIT - 1) * nmodules);
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REQUIRE(test.GetCompletedDescriptors() == 2 * (4 + DELAY_FRAMES_STOP_AND_QUIT - 1) * nmodules);
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}
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TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Full]") {
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