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FPGA: remove limit of modules for frame_generator

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This commit is contained in:
leonarski_f
2023-11-01 14:20:43 +01:00
parent 8f2b01be80
commit 112a62fc7f
10 changed files with 62 additions and 39 deletions
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20
tests/FPGAIntegrationTest.cpp
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@@ -44,7 +44,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful
const size_t nframes = 2;
DiffractionExperiment x((DetectorGeometry(nmodules)));
std::vector<uint16_t> test_frame(FRAME_GENERATOR_MODULES*RAW_MODULE_SIZE);
std::vector<uint16_t> test_frame(nmodules*RAW_MODULE_SIZE);
std::mt19937 g1(1387);
std::uniform_int_distribution<uint16_t> dist(0, 65535);
@@ -73,7 +73,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_custom_frame", "[FPGA][Ful
auto imageBuf = (uint16_t *) test.GetDeviceOutput(image, m)->pixels;
for (int i = 0; i < RAW_MODULE_SIZE; i++) {
REQUIRE(imageBuf[i] == test_frame[(m % FRAME_GENERATOR_MODULES) * RAW_MODULE_SIZE + i]);
REQUIRE(imageBuf[i] == test_frame[m * RAW_MODULE_SIZE + i]);
}
}
}
@@ -543,7 +543,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_apply_pixel_mask", "[FPGA]
HLSSimulatedDevice test(0, 64);
test.SetInternalGeneratorFrame(test_frame);
test.SetInternalGeneratorFrameForAllModules(test_frame);
REQUIRE_NOTHROW(test.InitializeCalibration(x, c));
REQUIRE_NOTHROW(test.StartAction(x));
@@ -919,7 +919,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_15_storage_cell_convert_G0
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16000;
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrameForAllModules(data));
JFCalibration c(x);
for (int i = 0; i < nstoragecells; i++) {
@@ -967,7 +967,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_8_storage_cell_convert_G0"
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16000;
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrameForAllModules(data));
JFCalibration c(x);
for (int i = 0; i < nstoragecells; i++) {
@@ -1015,7 +1015,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_16_storage_cell_convert_G0
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16000;
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrameForAllModules(data));
JFCalibration c(x);
for (int i = 0; i < nstoragecells; i++) {
@@ -1055,7 +1055,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_storage_cell_convert_G1",
std::vector<uint16_t> data(RAW_MODULE_SIZE);
for (auto &i: data)
i = 16384 | 10;
REQUIRE_NOTHROW(test.SetInternalGeneratorFrame(data));
REQUIRE_NOTHROW(test.SetInternalGeneratorFrameForAllModules(data));
JFCalibration c(x);
for (int i = 0; i < 16; i++) {
@@ -1102,7 +1102,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_integration", "[FPGA][Full
for (int i = 2; i < RAW_MODULE_SIZE; i++)
frame[i] = 32754;
test.SetInternalGeneratorFrame(frame);
test.SetInternalGeneratorFrameForAllModules(frame);
std::vector<uint16_t> integration_map(nmodules * RAW_MODULE_SIZE, 54);
for (int i = 0; i < RAW_MODULE_SIZE/2; i++) {
@@ -1163,7 +1163,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_spot_finder_count_threshol
frame [ 89*1024 + 300] = 8;
frame [300*1024 + 0] = 9;
test.SetInternalGeneratorFrame(frame);
test.SetInternalGeneratorFrameForAllModules(frame);
test.SetSpotFinderParameters(10, 0.0);
@@ -1212,7 +1212,7 @@ TEST_CASE("HLS_C_Simulation_internal_packet_generator_spot_finder_snr_threshold"
frame [ 89*1024 + 300] = 7;
frame [300*1024 + 0] = 3;
test.SetInternalGeneratorFrame(frame);
test.SetInternalGeneratorFrameForAllModules(frame);
test.SetSpotFinderParameters(0, 10);