aarelc_infer.py: now using yaml for url and added urls to beamline config yamls

This commit is contained in:
2026-06-02 10:38:12 +02:00
parent d3912bff95
commit df60d51efb
3 changed files with 10 additions and 5 deletions
+8 -5
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@@ -7,7 +7,8 @@ import io
from PIL import Image
#from aare.common.logger_config import setup_logger
from aare.common.beamline import MXBeamline, mx_beamline
from aare.common.beamline import MXBeamline, mx_beamline, cfg_get
class AareLCInferWrapper:
def __init__(
@@ -16,11 +17,13 @@ class AareLCInferWrapper:
secret: str = "1s3ng@rd",
):
if bl == MXBeamline.X10SA:
host = "http://x10sa-spark-01:8090" #"http://sls-gpu-003:9089"
elif bl == MXBeamline.X06SA or bl == MXBeamline.X06DA:
raise NotImplemented(f"AareLCInferWrapper not implemented for {bl}")
host = cfg_get("daq.hardware.aarelc_url", "http://sls-gpu-003:9090")
elif bl == MXBeamline.X06DA:
host = cfg_get("daq.hardware.aarelc_url", "http://sls-gpu-003:9094")
elif bl == MXBeamline.X06SA:
raise NotImplementedError(f"AareLCInferWrapper not implemented for {bl}")
elif bl == MXBeamline.SIMULATED:
raise NotImplemented(f"AareLCInferWrapper not implemented for {bl}")
raise NotImplementedError(f"AareLCInferWrapper not implemented for {bl}")
else:
raise Exception(f"Unknown beamline {bl}")
+1
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@@ -22,6 +22,7 @@ daq:
tell_url: "http://x06da-tell.psi.ch:22222"
bec_url: "x06da-bec-001.psi.ch"
redis_url: "x06da-redis.psi.ch"
aarelc_url: "http://sls-gpu-003:9090"
states:
backlight_levels: {off: 0.0, half: 0.98, max: 1.2}
frontlight_levels: {off: 1.49, half: 2.0, max: 3.0}
+1
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@@ -22,6 +22,7 @@ daq:
tell_url: "http://PC17488:22222"
bec_url: "x10sa-bec-001.psi.ch"
redis_url: "x10sa-redis.psi.ch"
aarelc_url: "http://sls-gpu-003:9090"
states:
backlight_levels: {off: 0.0, half: 0.98, max: 1.2}
frontlight_levels: {off: 1.49, half: 2.0, max: 3.0}