5f640ce299
initialisation occurs in this order: - object creeation (via __init__ which should consume the cfg values it knows about) - registering each object with the dispatcher - calling init_module() on each module (for connecting to other modules, checking hw, creating threads....) - calling start_module(cb) on each module. after the module finished startup it should call cb(self) once. This is the right place to do initialisation of hw which is not needed to read from the hw. (uploading curves, polling/re-setting all parameters, etc.) Change-Id: Ieaf9df5876e764634836861241f58ab986027f44 Reviewed-on: https://forge.frm2.tum.de/review/18566 Tested-by: JenkinsCodeReview <bjoern_pedersen@frm2.tum.de> Reviewed-by: Markus Zolliker <markus.zolliker@psi.ch> Reviewed-by: Enrico Faulhaber <enrico.faulhaber@frm2.tum.de>
130 lines
4.8 KiB
Python
130 lines
4.8 KiB
Python
# -*- coding: utf-8 -*-
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# *****************************************************************************
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#
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# This program is free software; you can redistribute it and/or modify it under
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# the terms of the GNU General Public License as published by the Free Software
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# Foundation; either version 2 of the License, or (at your option) any later
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# version.
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#
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# This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
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# details.
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#
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# You should have received a copy of the GNU General Public License along with
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# this program; if not, write to the Free Software Foundation, Inc.,
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# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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#
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# Module authors:
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# Enrico Faulhaber <enrico.faulhaber@frm2.tum.de>
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#
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# *****************************************************************************
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"""Define Simulation classes"""
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import random
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from time import sleep
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from secop.modules import Module, Readable, Writable, Drivable, Parameter
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from secop.lib import mkthread
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from secop.datatypes import FloatRange
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class SimBase(object):
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def __init__(self, cfgdict):
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# spice up parameters if requested by extra property
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# hint: us a comma-separated list if mor than one extra_param
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# BIG FAT WARNING: changing extra params will NOT generate events!
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# XXX: implement default read_* and write_* methods to handle
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# read and change messages correctly
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if '.extra_params' in cfgdict:
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extra_params = cfgdict.pop('.extra_params')
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# make a copy of self.parameter
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self.accessibles = dict((k, v.copy()) for k, v in self.accessibles.items())
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for k in extra_params.split(','):
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k = k.strip()
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self.accessibles[k] = Parameter('extra_param: %s' % k.strip(),
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datatype=FloatRange(),
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default=0.0)
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def reader(maxage=0, pname=k):
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self.log.debug('simulated reading %s' % pname)
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return self.accessibles[pname].value
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setattr(self, 'read_' + k, reader)
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def writer(newval, pname=k):
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self.log.debug('simulated writing %r to %s' % (newval, pname))
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self.accessibles[pname].value = newval
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return newval
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setattr(self, 'write_' + k, writer)
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def init_module(self):
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self._sim_thread = mkthread(self._sim)
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def _sim(self):
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try:
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while not self.sim():
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pass
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except Exception as e:
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self.log.exception(e)
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self.log.info('sim thread ended')
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def sim(self):
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return True
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def read_value(self, maxage=0):
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if 'jitter' in self.accessibles:
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return self._value + self.jitter*(0.5-random.random())
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return self._value
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class SimModule(SimBase, Module):
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def __init__(self, logger, cfgdict, devname, dispatcher):
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SimBase.__init__(self, cfgdict)
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Module.__init__(self, logger, cfgdict, devname, dispatcher)
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class SimReadable(SimBase, Readable):
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def __init__(self, logger, cfgdict, devname, dispatcher):
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SimBase.__init__(self, cfgdict)
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Readable.__init__(self, logger, cfgdict, devname, dispatcher)
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self._value = self.accessibles['value'].default
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class SimWritable(SimBase, Writable):
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def __init__(self, logger, cfgdict, devname, dispatcher):
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SimBase.__init__(self, cfgdict)
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Writable.__init__(self, logger, cfgdict, devname, dispatcher)
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self._value = self.accessibles['value'].default
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def read_value(self, maxage=0):
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return self.target
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def write_target(self, value):
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self.value = value
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class SimDrivable(SimBase, Drivable):
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def __init__(self, logger, cfgdict, devname, dispatcher):
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SimBase.__init__(self, cfgdict)
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Drivable.__init__(self, logger, cfgdict, devname, dispatcher)
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self._value = self.accessibles['value'].default
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def sim(self):
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while self._value == self.target:
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sleep(0.3)
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self.status = self.Status.BUSY, 'MOVING'
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speed = 0
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if 'ramp' in self.accessibles:
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speed = self.ramp / 60. # ramp is per minute!
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elif 'speed' in self.accessibles:
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speed = self.speed
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if speed == 0:
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self._value = self.target
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speed *= 0.3
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while self._value != self.target:
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if self._value < self.target - speed:
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self._value += speed
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elif self._value > self.target + speed:
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self._value -= speed
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else:
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self._value = self.target
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sleep(0.3)
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self.status = self.Status.OK, ''
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