new dev support
This commit is contained in:
Janet B. Anderson
@@ -1,9 +1,9 @@
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/* devPtMZ8310.c.c */
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/* share/src/dev @(#)devPtMZ8310.c 1.6 6/7/91 */
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/* devMz8310.c.c */
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/* share/src/dev $Id$ */
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/* Device Support Routines for MZ8310 Pulse Generator output*/
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/* Device Support Routines for MZ8310 */
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/*
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* Original Author: Bob Daly
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* Original Author: Marty Kraimer and Bob Daly
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* Date: 6-19-91
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*
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* Experimental Physics and Industrial Control System (EPICS)
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@@ -29,363 +29,644 @@
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*
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* Modification Log:
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* -----------------
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* .01 mm-dd-yy iii Comment
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* .02 mm-dd-yy iii Comment
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* .01 10-22-91 mrk Initial Implementation
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* ...
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*/
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/* In order to understand the code in the file you must first */
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/* understand the MIZAR 8310 Users Manual. */
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/* You must also understand Chapter 1 of the */
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/* the Advanced Micro Devices Am9513 Technical Manual */
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#include <vxWorks.h>
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#include <vme.h>
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#include <types.h>
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#include <stdioLib.h>
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#include <alarm.h>
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#include <dbAccess.h>
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#include <dbRecType.h>
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#include <dbDefs.h>
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#include <dbCommon.h>
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#include <devSup.h>
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#include <link.h>
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#include <special.h>
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#include <module_types.h>
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#include <pulseCounterRecord.h>
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#include <pulseDelayRecord.h>
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#include <pulseTrainRecord.h>
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/* defines specific to mz8310 used as pulse generator */
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/* NOTE: Pulse Generator refers to use of channels 0 thru 4 */
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/* These channels are referred to as 1o1,1o2,1o3,1o4, */
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/* and 1o5 on the I/O connector and they occupy the */
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/* lower address space in the module's short addr space */
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#define SHORTADDR 0xff0000
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#define MZ8310IOAddr 0xfa00
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#define MZ8310CHIPSIZE 0x20
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#define MZ8310SIZE 0x00000100
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#define MZ8310BASE (SHORTADDR+MZ8310IOAddr)
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#define MZ8310DATA 0
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#define MZ8310CMD 3
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#define MZ8310CHANONCHIP 5
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#define MZ8310CHIPCOUNT 2
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#define MZ8310CHANCNT (MZ8310CHANONCHIP*MZ8310CHIPCOUNT)
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#define MZ8310_CMD_ADDR ((unsigned char *) MZ8310BASE + MZ8310CMD)
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#define MZ8310_DATA_ADDR ((unsigned short *) MZ8310BASE + MZ8310DATA)
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#define MZ8310VECBASE ((unsigned char *) MZ8310BASE + 0x41)
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#define MZ8310VECSIZE (0x20)
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#define MZ8310INTCNT 4
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#define TCON 0
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#define TCOFF 1
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#define TCPULSE 2
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#define F1 0x0b00
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#define F2 0x0c00
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#define F3 0x0d00
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#define F4 0x0e00
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#define F5 0x0f00
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/* The following must match the definition in choiceGbl.ascii */
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#define LINEAR 1
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/* local device variables */
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static struct mzCard_S{
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char init;
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FAST_LOCK lock;
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}mzCard;
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/* Create the dset for devPtMZ8310 */
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long init_record();
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/* Create the dsets for devMz8310 */
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long report();
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long init();
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long init_pc();
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long init_pd();
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long init_pt();
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long cmd_pc();
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long write_pd();
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long write_pt();
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long mz8310PtReport();
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short mz8310CardInit();
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short stc_init();
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short convert_pulseTrain();
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struct {
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long cmd_pc();
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typedef struct {
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long number;
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DEVSUPFUN report;
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DEVSUPFUN init;
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DEVSUPFUN init_record;
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DEVSUPFUN get_ioint_info;
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DEVSUPFUN write_pt;
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}devPtMZ8310={
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6,
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mz8310PtReport,
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NULL,
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init_record,
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NULL,
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write_pt};
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DEVSUPFUN write;} MZDSET;
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MZDSET devPcMz8310={ 5, report, init, init_pc, NULL, cmd_pc};
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MZDSET devPdMz8310={ 5, NULL, NULL, init_pd, NULL, write_pd};
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MZDSET devPtMz8310={ 5, NULL, NULL, init_pt, NULL, write_pt};
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/* defs for gsrc and csrc fields */
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#define INTERNAL 0
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#define EXTERNAL 1
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#define SOFTWARE 1
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/* defs for counter commands */
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#define CTR_READ 0
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#define CTR_CLEAR 1
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#define CTR_START 2
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#define CTR_STOP 3
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#define CTR_SETUP 4
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/* defines specific to mz8310*/
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static long mz8310PtReport(ppt)
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struct pulseTrainRecord *ppt;
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#define MAXCARDS 4
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#define BASE 0xf800
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#define CARDSIZE 0x00000100
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#define CHIPSIZE 0x20
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#define CHANONCHIP 5
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#define NCHIP 2
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/*static*/
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unsigned short *shortaddr;
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int mz8310Debug=0;
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#define PCMDREG(CARD,CHIP) \
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( (unsigned char *)\
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((unsigned char*)shortaddr + BASE + (CARD)*CARDSIZE + (CHIP)*CHIPSIZE + 3))
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#define PDATAREG(CARD,CHIP) \
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( (unsigned short *)\
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((unsigned char*)shortaddr + BASE + (CARD)*CARDSIZE + (CHIP)*CHIPSIZE))
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/* Internal clock rate and rate divisor */
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#define INT_CLOCK_RATE 4e6
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#define CLOCK_RATE_DIV 16e0
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#define MAX_CLOCK_RATE 7e6
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/* desired master mode */
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/* Binary Division, Enable Inc, 16-bit bus, FOUT on, */
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/* FOUT divide by 1, Source F1, TOD Disabled */
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#define MASTERMODE 0x2100
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/* define command codes */
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#define LDPCOUNTER 0x00
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#define LDPMASTER 0x17
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#define LDPSTATUS 0x1f
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#define ARM 0x20
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#define LOAD 0x40
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#define LOADARM 0x60
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#define DISARMSAVE 0x80
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#define SAVE 0xa0
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#define DISARM 0xc0
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#define SETTOGOUT 0xe8
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#define CLRTOGOUT 0xe0
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#define STEP 0xf0
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#define DISDPS 0xe8
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#define GATEOFFFOUT 0xee
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#define BUS16 0xef
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#define ENADPS 0xe0
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#define GATEONFOUT 0xe6
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#define BUS8 0xe7
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#define ENAPRE 0xf8
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#define DISPRE 0xf9
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#define RESET 0xff
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/* Count Source Selection */
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#define SRC1 0x0100
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#define SRC2 0x0200
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#define SRC3 0x0300
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#define SRC4 0x0400
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#define SRC5 0x0500
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static unsigned short externalCountSource[] = {SRC1,SRC2,SRC3,SRC4,SRC5};
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#define F1 0x0b00
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#define F2 0x0c00
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#define F3 0x0d00
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#define F4 0x0e00
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#define F5 0x0f00
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static unsigned short internalCountSource[] = {F1,F2,F3,F4,F5};
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/*static*/
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int ncards=0;
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/*static*/
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struct mz8310_info {
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short present;
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struct {
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short used;
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short type;
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} chan_info[NCHIP][CHANONCHIP];
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}mz8310_info[MAXCARDS];
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/*The following are used to communicate with the mz8310. */
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/*The mz8310 can not keep up when commands are sent as rapidly as possible.*/
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putCmd(preg,cmd)
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unsigned char *preg;
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unsigned char cmd;
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{
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register unsigned char *pcmd = MZ8310_CMD_ADDR;
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register unsigned short *pdata =MZ8310_DATA_ADDR;
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short mode,load,hold,channel,dummy;
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*preg = cmd;
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if(mz8310Debug) printf("mz8310:putCmd: pcmdreg=%x cmd=%x %d\n",preg,cmd,cmd);
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}
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if( (vxMemProbe(pcmd, READ, sizeof(*pcmd), &dummy) != OK) ||
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(vxMemProbe(pdata, READ, sizeof(*pdata), &dummy) != OK) )
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{
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logMsg("\n***\nMZ8310 Pulse Generator Card not found at %x address\n***\n",*pcmd);
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return ERROR;
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}
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logMsg("\n***");
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logMsg("\nMZ8310 Pulse Generator Card found at %x address\n",*pcmd);
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/* read the mode load and hold values from chip registers */
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for(channel=0; channel<MZ8310CHANONCHIP; channel++)
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{
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*pcmd = channel+1; /* xfer regs to mode load hold vars for channel */
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mode = *pdata;
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load = *pdata;
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hold = *pdata;
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logMsg("CHANNEL:%d....\tMODE: %x\tLOAD: %x\tHOLD: %x\n",
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channel,mode,load,hold);
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}
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logMsg("***\n");
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return(OK);
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putData(preg,data)
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unsigned short *preg;
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unsigned short data;
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{
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*preg = data;
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if(mz8310Debug) printf("mz8310:putData: preg=%x data=%x %d\n",preg,data,data);
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}
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getCmd(preg,pcmd)
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unsigned char *preg;
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unsigned char *pcmd;
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{
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*pcmd = *preg;
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if(mz8310Debug) printf("mx8310:getCmd: pcmdreg=%x cmd=%x %d\n",preg,*pcmd,*pcmd);
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}
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getData(preg,pdata)
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unsigned short *preg;
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unsigned short *pdata;
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{
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*pdata = *preg;
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if(mz8310Debug) printf("mz8310:getData: preg=%x data=%x %d\n",preg,*pdata,*pdata);
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}
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static long init_record(ppt)
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struct pulseTrainRecord *ppt;
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static long init()
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{
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struct vmeio *pvmeio = (struct vmeio *)(&ppt->out.value);
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struct dbCommon *pdbCommon = (struct dbCommon *)ppt;
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struct ptDpvt *dpvt;
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int card,chip,channel;
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/*volatile*/
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unsigned char *pcmd;
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/*volatile*/
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unsigned short *pdata;
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unsigned short data;
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int dummy;
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char message[100];
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static firstTime = TRUE;
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static aOK = TRUE;
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if(sysBusToLocalAdrs(VME_AM_USR_SHORT_IO, 0, &shortaddr)) {
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logMsg("devMz8310: sysBusToLocalAdrs failed\n");
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exit(1);
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}
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for(card=0; card<MAXCARDS; card++) {
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mz8310_info[card].present = FALSE;
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for(chip=0; chip<NCHIP; chip ++) {
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pcmd = PCMDREG(card,chip); pdata = PDATAREG(card,chip);
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if(vxMemProbe(pcmd, READ, sizeof(*pcmd), &dummy) != OK)continue;
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if(vxMemProbe(pdata, READ, sizeof(*pdata), &dummy) != OK)continue;
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mz8310_info[card].present = TRUE;
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if(mz8310Debug) printf("mz8310: Found card %d chip %d\n",card,chip);
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putCmd(pcmd,BUS16);
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putCmd(pcmd,LDPMASTER);
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getData(pdata,&data);
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if(data != MASTERMODE) { /* need to reinitialize */
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putCmd(pcmd,RESET);
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putCmd(pcmd,BUS16);
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putCmd(pcmd,LDPMASTER);
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putData(pdata,MASTERMODE);
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putCmd(pcmd,(LOAD | 0x001F)); /* issue load command for all channels*/
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if(mz8310Debug) {
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printf("reading back master mode register\n");
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putCmd(pcmd,LDPMASTER);
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getData(pdata,&data);
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}
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}
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}
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}
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return OK;
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}
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static long report(fp,interest)
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FILE *fp;
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int interest;
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{
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int card,chip,channel,type;
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char *pstr;
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/* pt.out must be an VME_IO */
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switch (ppt->out.type) {
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for(card=0; card<MAXCARDS; card++) {
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if(!mz8310_info[card].present) continue;
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fprintf(fp,"mz8310: card %d\n",card);
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if(interest==0)continue;
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for(chip=0; chip<NCHIP; chip++) {
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for(channel=0; channel<CHANONCHIP; channel++) {
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short used;
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used = mz8310_info[card].chan_info[chip][channel].used;
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if(used==0) continue;
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type = mz8310_info[card].chan_info[chip][channel].type;
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pstr = GET_PRECTYPE(type);
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if(!pstr) fprintf(fp," Illegal record type\n");
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else fprintf(fp," chip: %d channel: %d used: %d recType: %s\n",
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chip,channel,used,pstr);
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}
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}
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}
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}
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static long init_common(pdbCommon,pout,nchan)
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struct dbCommon *pdbCommon;
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struct link *pout;
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int nchan;
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{
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struct vmeio *pvmeio = (struct vmeio *)(&pout->value);
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unsigned int card,signal,chip,channel;
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/* out must be an VME_IO */
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switch (pout->type) {
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case (VME_IO) :
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break;
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default :
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strcpy(message,pdbCommon->name);
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strcat(message,": devPtMZ8310 (init_record) Illegal OUT field");
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errMessage(S_db_badField,message);
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return(S_db_badField);
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recGblRecordError(S_dev_badBus,pdbCommon,
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"devMz8310 (init_record) Illegal OUT Bus Type");
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return(S_dev_badBus);
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}
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/* only one card supported i.e card 0 */
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if(pvmeio->card != 0)
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{
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strcpy(message,pdbCommon->name);
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strcat(message,": devPtMZ8310 (init_record) Illegal CARD field");
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errMessage(S_db_badField,message);
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return(S_db_badField);
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}
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/* only 5 channels on card supported */
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if(pvmeio->signal >= 5)
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{
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strcpy(message,pdbCommon->name);
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strcat(message,": devPtMZ8310 (init_record) Illegal SIGNAL field");
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errMessage(S_db_badField,message);
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return(S_db_badField);
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}
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/* make sure card was initialized OK */
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if(!aOK)
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{
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strcpy(message,pdbCommon->name);
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strcat(message,": devPtMZ8310 (init_record) CARD not OK");
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errMessage(S_db_badField,message);
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return(S_db_badField);
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}
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/* do first time things */
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if(firstTime)
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{
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firstTime = FALSE;
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FASTLOCKINIT(&mzCard.lock);
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if(mz8310CardInit(pvmeio->card) == ERROR)
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{
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aOK = FALSE;
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strcpy(message,pdbCommon->name);
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strcat(message,": devPtMZ8310 (init_record) CARD INIT error(missing?)");
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errMessage(S_db_badField,message);
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return(S_db_badField);
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}
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}
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card = pvmeio->card;
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signal = pvmeio->signal;
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if(card>=MAXCARDS){
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recGblRecordError(S_dev_badCard,pdbCommon,
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"devMz8310 (init_record) exceeded maximum supported cards");
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return(S_dev_badCard);
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}
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if(!mz8310_info[card].present){
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recGblRecordError(S_dev_badCard,pdbCommon,
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"devMz8310 (init_record) VME card not found");
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return(S_dev_badCard);
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}
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if(signal >= NCHIP*CHANONCHIP
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|| (nchan==2 && (signal==4 || signal==9))) {
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recGblRecordError(S_dev_badSignal,pdbCommon,
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"devMz8310 (init_record) Illegal SIGNAL field");
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return(S_dev_badSignal);
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}
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chip = (signal>=CHANONCHIP ? 1 : 0);
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channel = signal - chip*CHANONCHIP;
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if((mz8310_info[card].chan_info[chip][channel].used +=1)>1)
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recGblRecordError(S_dev_Conflict,pdbCommon,
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"devMz8310 (init_record) signal already used");
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mz8310_info[card].chan_info[chip][channel].type = pdbCommon->pdba->record_type;
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if(nchan==2) {
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if((mz8310_info[card].chan_info[chip][channel+1].used +=1)>1)
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recGblRecordError(S_dev_Conflict,pdbCommon,
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"devMz8310 (init_record) signal already used");
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mz8310_info[card].chan_info[chip][channel+1].type
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= pdbCommon->pdba->record_type;
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}
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return(0);
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}
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static short mz8310CardInit(card)
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register int card; /* 0 through ... */
|
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static long init_pc(pr)
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struct pulseCounterRecord *pr;
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{
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/*
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BCD division
|
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data ptr seq enbl
|
||||
16 bit bus
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||||
FOUT on
|
||||
FOUT divide by one
|
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FOUT source (F1)
|
||||
Time of day disabled
|
||||
*/
|
||||
register unsigned short master_mode = 0xa100;
|
||||
return(stc_init(MZ8310_CMD_ADDR, MZ8310_DATA_ADDR, master_mode)) ;
|
||||
long status;
|
||||
status = init_common((struct dbCommon *)pr,&pr->out,2);
|
||||
if(status) return(status);
|
||||
/*just use dpvt as flag that initialization succeeded*/
|
||||
pr->dpvt = (void *)pr;
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
static short stc_init(pcmd, pdata, master_mode)
|
||||
register unsigned char *pcmd;
|
||||
register unsigned short *pdata;
|
||||
unsigned short master_mode;
|
||||
static long init_pd(pr)
|
||||
struct pulseDelayRecord *pr;
|
||||
{
|
||||
int dummy;
|
||||
int channel;
|
||||
|
||||
if(vxMemProbe(pcmd, READ, sizeof(*pcmd), &dummy) != OK)
|
||||
return ERROR;
|
||||
if(vxMemProbe(pdata, READ, sizeof(*pdata), &dummy) != OK)
|
||||
return ERROR;
|
||||
|
||||
*pcmd = 0xef; /* 16 BIT MODE */
|
||||
*pcmd = 0x17; /* next access will be to master mode register */
|
||||
if(master_mode != *pdata) /* reset master mode if not what is wanted */
|
||||
{
|
||||
*pcmd = 0xff; /* RESET */
|
||||
*pcmd = 0xef; /* return to 16 BIT MODE after reset*/
|
||||
*pcmd = 0x17; /* next data write is to master mode register */
|
||||
*pdata = master_mode; /* set up master mode register */
|
||||
for(channel=0; channel<MZ8310CHANONCHIP; channel++)
|
||||
*pcmd = 0x40 | 1<< channel; /* LOAD must be done after reset */
|
||||
}
|
||||
/* set the initial output states of TC to LOW */
|
||||
|
||||
for(channel=0; channel<MZ8310CHANONCHIP; channel++)
|
||||
{
|
||||
*pcmd = channel+1; /* xfer to mode load hold registers for channel */
|
||||
*pdata = 0x0b62;
|
||||
*pdata = 0;
|
||||
*pdata = 0;
|
||||
*pcmd = 0xe0 | channel+1; /* clear the TC toggle output*/
|
||||
}
|
||||
|
||||
return OK;
|
||||
long status;
|
||||
status = init_common((struct dbCommon *)pr,&pr->out,1);
|
||||
if(status) return(status);
|
||||
/*just use dpvt as flag that initialization succeeded*/
|
||||
pr->dpvt = (void *)pr;
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
static long write_pt(ppt)
|
||||
struct pulseTrainRecord *ppt;
|
||||
static long init_pt(pr)
|
||||
struct pulseTrainRecord *pr;
|
||||
{
|
||||
struct vmeio *pvmeio;
|
||||
int status;
|
||||
unsigned short load,hold,mode;
|
||||
short tcMode; /*TCON = 0,TCOFF =1,TCPULSE =2*/
|
||||
register unsigned char *pcmd = MZ8310_CMD_ADDR;
|
||||
register unsigned short *pdata = MZ8310_DATA_ADDR;
|
||||
short channel;
|
||||
long status;
|
||||
status = init_common((struct dbCommon *)pr,&pr->out,1);
|
||||
if(status) return(status);
|
||||
/*just use dpvt as flag that initialization succeeded*/
|
||||
pr->dpvt = (void *)pr;
|
||||
return(0);
|
||||
}
|
||||
|
||||
static long cmd_pc(pr)
|
||||
struct pulseCounterRecord *pr;
|
||||
{
|
||||
/*volatile*/
|
||||
unsigned char *pcmd;
|
||||
/*volatile*/
|
||||
unsigned short *pdata;
|
||||
struct vmeio *pvmeio;
|
||||
int card,chip,channel,signal;
|
||||
unsigned short load,hold,mode;
|
||||
|
||||
pvmeio = (struct vmeio *)&(ppt->out.value);
|
||||
if (ppt->out.type != VME_IO) {
|
||||
if(ppt->nsev<VALID_ALARM) {
|
||||
ppt->nsta = WRITE_ALARM;
|
||||
ppt->nsev = VALID_ALARM;
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
if(!pr->dpvt) return(S_dev_NoInit);
|
||||
pvmeio = (struct vmeio *)&(pr->out.value);
|
||||
card = pvmeio->card;
|
||||
signal = pvmeio->signal;
|
||||
chip = (signal>=CHANONCHIP ? 1 : 0);
|
||||
channel = signal - chip*CHANONCHIP;
|
||||
pcmd = PCMDREG(card,chip);
|
||||
pdata = PDATAREG(card,chip);
|
||||
switch (pr->cmd) {
|
||||
case CTR_READ:
|
||||
putCmd(pcmd,(SAVE | (3<<channel)));
|
||||
{
|
||||
unsigned short low,high;
|
||||
|
||||
if(convert_pulseTrain(ppt,&load,&hold,&mode,&tcMode)==ERROR){
|
||||
if(ppt->nsev<VALID_ALARM) {
|
||||
ppt->nsta = WRITE_ALARM;
|
||||
ppt->nsev = VALID_ALARM;
|
||||
putCmd(pcmd,(LDPCOUNTER | 0x10 | (channel+1)));
|
||||
getData(pdata,&low);
|
||||
putCmd(pcmd,(LDPCOUNTER | 0x10 | (channel+2)));
|
||||
getData(pdata,&high);
|
||||
pr->val = high<<16 | low;
|
||||
}
|
||||
break;
|
||||
case CTR_CLEAR:
|
||||
putCmd(pcmd,(DISARM | (3<<channel)));
|
||||
putCmd(pcmd,(LOADARM | (3<<channel)));
|
||||
break;
|
||||
case CTR_START:
|
||||
putCmd(pcmd,(ARM | (3<<channel)));
|
||||
break;
|
||||
case CTR_STOP:
|
||||
putCmd(pcmd,(DISARM | (3<<channel)));
|
||||
break;
|
||||
case CTR_SETUP:
|
||||
/* setup counter i */
|
||||
mode = 0x0028; /*Count Repeatedly, Count Up*/
|
||||
if(pr->edge==1) mode |= 0x1000; /*count on falling edge*/
|
||||
/* If necessary set gate control Active High Level Gate N */
|
||||
if(pr->gsrc==INTERNAL && pr->gate!=0) {
|
||||
unsigned short gate = (unsigned short)pr->gate;
|
||||
|
||||
if(gate>5) recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : illegal gate value");
|
||||
else mode |= gate<<13;
|
||||
}
|
||||
/*set count source selection*/
|
||||
if(pr->clks<0 || pr->clks>15) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
ppt->udf=FALSE;
|
||||
channel = pvmeio->signal;
|
||||
/* disarm the channel */
|
||||
*pcmd = 0xc0 | channel+1;
|
||||
/* clear TC so starts out with same level each change */
|
||||
*pcmd = 0xe0 | channel+1;
|
||||
/* check if duty cycle = 0 ... if so clear tc i.e do nothing */
|
||||
if(tcMode == TCOFF){
|
||||
return(OK);
|
||||
}
|
||||
/* if GATE OFF ...then clear tc i.e. do nothing*/
|
||||
if(ppt->gate != 0){
|
||||
return(OK);
|
||||
}
|
||||
/* if duty cycle = 100%...then set tc*/
|
||||
if(tcMode == TCON){
|
||||
*pcmd = 0xe8 | channel+1;
|
||||
return(OK);
|
||||
}
|
||||
/*got here so must be variable duty cycle with gate on*/
|
||||
/*xfer the mode,hold, and load values to registers & arm*/
|
||||
logMsg("write_pt...gate on...var duty cycle & freq");
|
||||
*pcmd = channel+1;
|
||||
*pdata = mode;
|
||||
*pdata = load;
|
||||
*pdata = hold;
|
||||
*pcmd = 0x20 | 1<< channel;
|
||||
return(OK);
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : illegal clks value");
|
||||
return(1);
|
||||
}
|
||||
mode |= (pr->clks << 8);
|
||||
putCmd(pcmd,(DISARM | (3<<channel)));
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
putData(pdata,mode);
|
||||
putData(pdata,0x0000);
|
||||
/* now setup high order portion of counter*/
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+2)));
|
||||
putData(pdata,0x0008);
|
||||
putData(pdata,0x0000);
|
||||
/* Load each counter */
|
||||
putCmd(pcmd,(LOAD | (3<<channel)));
|
||||
pr->udf = FALSE;
|
||||
break;
|
||||
default:
|
||||
if(pr->nsev<MAJOR_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = MAJOR_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : illegal command");
|
||||
return(0);
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
static short convert_pulseTrain(ppt,pload,phold,pmode,ptcMode)
|
||||
struct pulseTrainRecord *ppt;
|
||||
unsigned short *phold,*pload,*pmode,*ptcMode;
|
||||
static long write_pd(pr)
|
||||
struct pulseDelayRecord *pr;
|
||||
{
|
||||
int totalPulses;
|
||||
int timeScale[] = {1,1000,1000000};/*micro,milli,sec in micro*/
|
||||
int periodInMicroSec;
|
||||
/*volatile*/
|
||||
unsigned char *pcmd;
|
||||
/*volatile*/
|
||||
unsigned short *pdata;
|
||||
struct vmeio *pvmeio;
|
||||
int card,chip,channel,signal;
|
||||
unsigned short load,hold,mode;
|
||||
double clockRate,holdCount,loadCount;
|
||||
int clockDiv;
|
||||
|
||||
if(!pr->dpvt) return(S_dev_NoInit);
|
||||
pvmeio = (struct vmeio *)&(pr->out.value);
|
||||
card = pvmeio->card;
|
||||
signal = pvmeio->signal;
|
||||
chip = (signal>=CHANONCHIP ? 1 : 0);
|
||||
channel = signal - chip*CHANONCHIP;
|
||||
pcmd = PCMDREG(card,chip);
|
||||
pdata = PDATAREG(card,chip);
|
||||
|
||||
if(ppt->dcy == 0)
|
||||
{
|
||||
*ptcMode = TCOFF;
|
||||
return(OK);
|
||||
/* compute hold count and load count */
|
||||
clockRate = (pr->csrc==INTERNAL ? INT_CLOCK_RATE : pr->clkr);
|
||||
if(clockRate<=0 || clockRate>MAX_CLOCK_RATE) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : computed illegal clock rate");
|
||||
return(1);
|
||||
}
|
||||
holdCount = clockRate*pr->wide;
|
||||
if(holdCount<1e0) holdCount = 1e0;
|
||||
loadCount = clockRate*pr->dly;
|
||||
if(pr->csrc==INTERNAL) {
|
||||
clockDiv = 0;
|
||||
while(clockDiv<=5 && (loadCount>65536.0 || holdCount>65535.0)) {
|
||||
clockDiv++;
|
||||
clockRate /= CLOCK_RATE_DIV;
|
||||
holdCount = clockRate*pr->wide;
|
||||
if(holdCount<1e0) holdCount = 1e0;
|
||||
loadCount = clockRate*pr->dly;
|
||||
if(loadCount<1e0) loadCount = 1e0;
|
||||
}
|
||||
}
|
||||
if(loadCount>65536.0 || holdCount>65535.0) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : computed illegal clock rate");
|
||||
return(1);
|
||||
}
|
||||
load = loadCount + .5;
|
||||
hold = holdCount + .5;
|
||||
|
||||
if(ppt->dcy == 100)
|
||||
{
|
||||
*ptcMode = TCON;
|
||||
return(OK);
|
||||
/* compute mode */
|
||||
mode = 0x0062; /* MODE L Waveform */
|
||||
if(pr->gedg==0) mode |=0xc000;/*gate on high edge*/
|
||||
else mode |= 0xe000; /*gate on low edge*/
|
||||
if(pr->edge==1) mode |= 0x1000; /*count on falling edge*/
|
||||
/*set count source selection*/
|
||||
if(pr->csrc==INTERNAL) {
|
||||
mode |= internalCountSource[clockDiv];
|
||||
} else {/*external clock. Determine source*/
|
||||
if(pr->clks<0 || pr->clks>15) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : illegal clks value");
|
||||
return(1);
|
||||
}
|
||||
/* check period to set Fx */
|
||||
periodInMicroSec = ppt->per*timeScale[ppt->timu];
|
||||
if(periodInMicroSec <= 10) return(ERROR); /* must be > 10 usec */
|
||||
if(periodInMicroSec > 100000000) return(ERROR); /* must be < 100 sec */
|
||||
*ptcMode = TCPULSE;
|
||||
mode |= (pr->clks << 8);
|
||||
}
|
||||
|
||||
if(periodInMicroSec < 10000) { /*10 millisec*/
|
||||
*pmode = 0x0062 | F1; /* 4 MHz Count Source */
|
||||
totalPulses = (periodInMicroSec*4);
|
||||
*phold = ((totalPulses*ppt->dcy)/100)+1; /*+1..-1 (on TC) = 0*/
|
||||
*pload = totalPulses-*phold+2;
|
||||
return(OK);
|
||||
}
|
||||
if(periodInMicroSec < 100000) { /*100 millisec*/
|
||||
*pmode = 0x0062 | F2; /* .4 MHz Count Source */
|
||||
totalPulses = (periodInMicroSec/10)*4;
|
||||
*phold = ((totalPulses*ppt->dcy)/100)+1; /*+1..-1 (on TC) = 0*/
|
||||
*pload = totalPulses-*phold+2;
|
||||
return(OK);
|
||||
}
|
||||
|
||||
if(periodInMicroSec < 1000000) {/* 1 sec */
|
||||
*pmode = 0x0062 | F3; /*.04Mhz Count Source */
|
||||
totalPulses = (periodInMicroSec/100)*4;
|
||||
*phold = ((totalPulses*ppt->dcy)/100)+1; /*+1..-1 (on TC) = 0*/
|
||||
*pload = totalPulses-*phold+2;
|
||||
return(OK);
|
||||
}
|
||||
|
||||
if(periodInMicroSec < 10000000) {/* 10 sec */
|
||||
*pmode = 0x0062 | F4; /* .004MHz Count Source */
|
||||
totalPulses = (periodInMicroSec/1000)*4;
|
||||
*phold = ((totalPulses*ppt->dcy)/100)+1; /*+1..-1 (on TC) = 0*/
|
||||
*pload = totalPulses-*phold+2;
|
||||
return(OK);
|
||||
}
|
||||
|
||||
if(periodInMicroSec < 100000000) {/* 100 sec */
|
||||
*pmode = 0x0062 | F5;
|
||||
totalPulses = (periodInMicroSec/10000)*4;
|
||||
*phold = ((totalPulses*ppt->dcy)/100)+1; /*+1..-1 (on TC) = 0*/
|
||||
*pload = totalPulses-*phold+2;
|
||||
return(OK);
|
||||
}
|
||||
/* setup counter */
|
||||
putCmd(pcmd,(DISARM | (1<<channel)));
|
||||
/* Set initial state of output */
|
||||
putCmd(pcmd,((pr->llow==0 ? CLRTOGOUT : SETTOGOUT) | (channel+1)));
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
putData(pdata,mode);
|
||||
putData(pdata,load);
|
||||
putData(pdata,hold);
|
||||
if(mz8310Debug){
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
printf("reading mode,load,hold\n");
|
||||
getData(pdata,&mode);
|
||||
getData(pdata,&load);
|
||||
getData(pdata,&hold);
|
||||
}
|
||||
/* Load, Step, and Arm Counter */
|
||||
putCmd(pcmd,(LOAD | (1<<channel)));
|
||||
putCmd(pcmd,(STEP | (channel+1)));
|
||||
putCmd(pcmd,(ARM | (1<<channel)));
|
||||
pr->udf = FALSE;
|
||||
return(OK);
|
||||
}
|
||||
|
||||
static long write_pt(pr)
|
||||
struct pulseTrainRecord *pr;
|
||||
{
|
||||
/*volatile*/
|
||||
unsigned char *pcmd;
|
||||
/*volatile*/
|
||||
unsigned short *pdata;
|
||||
struct vmeio *pvmeio;
|
||||
int card,chip,channel,signal;
|
||||
unsigned short load,hold,mode;
|
||||
double clockRate,periodInClockUnits,holdCount,loadCount;
|
||||
int clockDiv;
|
||||
|
||||
if(!pr->dpvt) return(S_dev_NoInit);
|
||||
pvmeio = (struct vmeio *)&(pr->out.value);
|
||||
card = pvmeio->card;
|
||||
signal = pvmeio->signal;
|
||||
chip = (signal>=CHANONCHIP ? 1 : 0);
|
||||
channel = signal - chip*CHANONCHIP;
|
||||
pcmd = PCMDREG(card,chip);
|
||||
pdata = PDATAREG(card,chip);
|
||||
|
||||
/* Should we just set on or off */
|
||||
if(pr->dcy<=0e0 || (pr->gsrc==SOFTWARE && pr->gate!=0)) {
|
||||
pr->udf = FALSE;
|
||||
putCmd(pcmd,(DISARM | (1<<channel)));
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
putData(pdata,(pr->llow==0 ? 0x0000 : 0x0004));
|
||||
return(0);
|
||||
}
|
||||
if(pr->dcy>=100.0) {
|
||||
pr->udf = FALSE;
|
||||
putCmd(pcmd,(DISARM | (1<<channel)));
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
putData(pdata,(pr->llow==0 ? 0x0004 : 0x0000));
|
||||
return(0);
|
||||
}
|
||||
|
||||
/* compute hold count and load count */
|
||||
clockRate = (pr->csrc==INTERNAL ? INT_CLOCK_RATE : pr->clkr);
|
||||
periodInClockUnits = pr->per * clockRate;
|
||||
if(clockRate<=0 || clockRate>MAX_CLOCK_RATE || periodInClockUnits<=1) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : computed illegal clock rate");
|
||||
return(1);
|
||||
}
|
||||
holdCount = periodInClockUnits*pr->dcy/100.0;
|
||||
if(holdCount<1e0) holdCount = 1e0;
|
||||
loadCount = periodInClockUnits - holdCount;
|
||||
if(pr->csrc==INTERNAL) {
|
||||
clockDiv = 0;
|
||||
while(clockDiv<5 && (loadCount>65536.0 || holdCount>65535.0)) {
|
||||
clockDiv++;
|
||||
periodInClockUnits /= CLOCK_RATE_DIV;
|
||||
holdCount = periodInClockUnits*pr->dcy/100.0;
|
||||
if(holdCount<1e0) holdCount = 1e0;
|
||||
loadCount = periodInClockUnits - holdCount;
|
||||
}
|
||||
}
|
||||
if(loadCount>65536.0 || holdCount>65535.0) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : computed illegal clock rate");
|
||||
return(1);
|
||||
}
|
||||
load = loadCount + .5;
|
||||
hold = holdCount + .5;
|
||||
|
||||
/* compute mode */
|
||||
mode = 0x0062; /*MODE J: reload load or hold, count repeatedly, TC toggled*/
|
||||
if(pr->edge==1) mode |= 0x1000; /*count on falling edge*/
|
||||
/* If necessary set gate control MODE K: Active High Level Gate N */
|
||||
if(pr->gsrc==INTERNAL && pr->gate!=0) {
|
||||
unsigned short gate = (unsigned short)pr->gate;
|
||||
|
||||
if(gate>5) recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : illegal gate value");
|
||||
else mode |= gate<<13;
|
||||
}
|
||||
/*set count source selection*/
|
||||
if(pr->csrc==INTERNAL) {
|
||||
mode |= internalCountSource[clockDiv];
|
||||
} else {/*external clock. Determine source*/
|
||||
if(pr->clks<0 || pr->clks>15) {
|
||||
if(pr->nsev<VALID_ALARM) {
|
||||
pr->nsta = WRITE_ALARM;
|
||||
pr->nsev = VALID_ALARM;
|
||||
}
|
||||
recGblRecordError(S_db_badField,pr,
|
||||
"devMz8310 : illegal clks value");
|
||||
return(1);
|
||||
}
|
||||
mode |= (pr->clks << 8);
|
||||
}
|
||||
|
||||
/* setup counter */
|
||||
putCmd(pcmd,(DISARM | (1<<channel)));
|
||||
/* Set initial state of output */
|
||||
putCmd(pcmd,((pr->llow==0 ? CLRTOGOUT : SETTOGOUT) | (channel+1)));
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
putData(pdata,mode);
|
||||
putData(pdata,load);
|
||||
putData(pdata,hold);
|
||||
if(mz8310Debug){
|
||||
putCmd(pcmd,(LDPCOUNTER | (channel+1)));
|
||||
printf("reading mode,load,hold\n");
|
||||
getData(pdata,&mode);
|
||||
getData(pdata,&load);
|
||||
getData(pdata,&hold);
|
||||
}
|
||||
/* Load and arm counter*/
|
||||
putCmd(pcmd,(LOADARM | (1<<channel)));
|
||||
pr->udf = FALSE;
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user