bswap16/32 as functions
Turn bswap16() and bswap32() into functions to avoid evaluating the argument more than once.
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@@ -12,6 +12,8 @@
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#define EPICSMMIO_H
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#include <epicsEndian.h>
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#include <epicsTypes.h>
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#include <compilerSpecific.h>
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#if defined(_ARCH_PPC) || defined(__PPC__) || defined(__PPC)
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# include <libcpu/io.h>
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@@ -39,6 +41,24 @@
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# define nat_iowrite16 be_iowrite16
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# define nat_iowrite32 be_iowrite32
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static EPICS_ALWAYS_INLINE
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epicsUInt16
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bswap16(epicsUInt16 value)
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{
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return (((epicsUInt16)(value) & 0x00ff) << 8) |
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(((epicsUInt16)(value) & 0xff00) >> 8);
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}
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static EPICS_ALWAYS_INLINE
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epicsUInt32
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bswap32(epicsUInt32 value)
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{
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return (((epicsUInt32)(value) & 0x000000ff) << 24) |
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(((epicsUInt32)(value) & 0x0000ff00) << 8) |
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(((epicsUInt32)(value) & 0x00ff0000) >> 8) |
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(((epicsUInt32)(value) & 0xff000000) >> 24);
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}
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#elif defined(i386) || defined(__i386__) || defined(__i386) || defined(__m68k__)
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/* X86 does not need special handling for read/write width.
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@@ -90,15 +90,23 @@ nat_iowrite32(volatile void* addr, epicsUInt32 val)
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*@{
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*/
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#define bswap16(value) ((epicsUInt16) ( \
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(((epicsUInt16)(value) & 0x00ff) << 8) | \
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(((epicsUInt16)(value) & 0xff00) >> 8)))
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static EPICS_ALWAYS_INLINE
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epicsUInt16
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bswap16(epicsUInt16 value)
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{
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return (((epicsUInt16)(value) & 0x00ff) << 8) |
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(((epicsUInt16)(value) & 0xff00) >> 8);
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}
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#define bswap32(value) ( \
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(((epicsUInt32)(value) & 0x000000ff) << 24) | \
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(((epicsUInt32)(value) & 0x0000ff00) << 8) | \
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(((epicsUInt32)(value) & 0x00ff0000) >> 8) | \
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(((epicsUInt32)(value) & 0xff000000) >> 24))
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static EPICS_ALWAYS_INLINE
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epicsUInt32
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bswap32(epicsUInt32 value)
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{
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return (((epicsUInt32)(value) & 0x000000ff) << 24) |
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(((epicsUInt32)(value) & 0x0000ff00) << 8) |
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(((epicsUInt32)(value) & 0x00ff0000) >> 8) |
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(((epicsUInt32)(value) & 0xff000000) >> 24);
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}
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# define be_ioread16(A) nat_ioread16(A)
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# define be_ioread32(A) nat_ioread32(A)
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@@ -37,6 +37,7 @@
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#include <epicsTypes.h> /* EPICS Common Type Definitions */
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#include <epicsEndian.h> /* EPICS Byte Order Definitions */
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#include <compilerSpecific.h>
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/*=====================
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* vxAtomicLib.h (which defines the memory barrier macros)
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@@ -49,15 +50,23 @@
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# include <vxAtomicLib.h>
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#endif
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#define bswap16(value) ((epicsUInt16) ( \
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(((epicsUInt16)(value) & 0x00ff) << 8) | \
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(((epicsUInt16)(value) & 0xff00) >> 8)))
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static EPICS_ALWAYS_INLINE
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epicsUInt16
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bswap16(epicsUInt16 value)
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{
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return (((epicsUInt16)(value) & 0x00ff) << 8) |
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(((epicsUInt16)(value) & 0xff00) >> 8);
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}
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#define bswap32(value) ( \
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(((epicsUInt32)(value) & 0x000000ff) << 24) | \
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(((epicsUInt32)(value) & 0x0000ff00) << 8) | \
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(((epicsUInt32)(value) & 0x00ff0000) >> 8) | \
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(((epicsUInt32)(value) & 0xff000000) >> 24))
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static EPICS_ALWAYS_INLINE
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epicsUInt32
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bswap32(epicsUInt32 value)
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{
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return (((epicsUInt32)(value) & 0x000000ff) << 24) |
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(((epicsUInt32)(value) & 0x0000ff00) << 8) |
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(((epicsUInt32)(value) & 0x00ff0000) >> 8) |
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(((epicsUInt32)(value) & 0xff000000) >> 24);
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}
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#if EPICS_BYTE_ORDER == EPICS_ENDIAN_BIG
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# define be16_to_cpu(X) (epicsUInt16)(X)
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