Initial revision
This commit is contained in:
Marty Kraimer
244
src/drv/module_types.c
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244
src/drv/module_types.c
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/* module_types.c */
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/* module_types.c */
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/* share/epicsH $Id$ */
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/*
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* Author: Marty Kraimer
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* Date: 08-23-93
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*
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* Experimental Physics and Industrial Control System (EPICS)
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*
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* Copyright 1991, the Regents of the University of California,
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* and the University of Chicago Board of Governors.
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*
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* This software was produced under U.S. Government contracts:
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* (W-7405-ENG-36) at the Los Alamos National Laboratory,
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* and (W-31-109-ENG-38) at Argonne National Laboratory.
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*
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* Initial development by:
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* The Controls and Automation Group (AT-8)
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* Ground Test Accelerator
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* Accelerator Technology Division
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* Los Alamos National Laboratory
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*
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* Co-developed with
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* The Controls and Computing Group
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* Accelerator Systems Division
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* Advanced Photon Source
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* Argonne National Laboratory
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*
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* Modification Log:
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* -----------------
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* .01 08-23-93 mrk Initial Version
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*/
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#include <module_types.h>
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module_types()
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{
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ai_num_cards[AB1771IL] = 12;
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ai_num_cards[AB1771IFE] = 12;
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ai_num_cards[AB1771IXE] = 12;
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ai_num_cards[XY566SE] = 4;
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ai_num_cards[XY566DI] = 4;
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ai_num_cards[XY566DIL] = 6;
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ai_num_cards[VXI_AT5_AI] = 32;
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ai_num_cards[AB1771IFE_SE] = 12;
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ai_num_cards[AB1771IFE_4to20MA] = 12;
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ai_num_cards[DVX2502] = 1;
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ai_num_cards[AB1771IFE_0to5V] = 12;
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ai_num_cards[KSCV215] = 32;
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ai_num_channels[AB1771IL] = 8;
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ai_num_channels[AB1771IFE] = 8;
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ai_num_channels[AB1771IXE] = 8;
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ai_num_channels[XY566SE] = 32;
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ai_num_channels[XY566DI] = 16;
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ai_num_channels[XY566DIL] = 16;
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ai_num_channels[VXI_AT5_AI] = 8;
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ai_num_channels[AB1771IFE_SE] = 16;
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ai_num_channels[AB1771IFE_4to20MA] = 8;
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ai_num_channels[DVX2502] = 127;
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ai_num_channels[AB1771IFE_0to5V] = 8;
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ai_num_channels[KSCV215] = 32;
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ai_addrs[AB1771IL] = 0;
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ai_addrs[AB1771IFE] = 0;
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ai_addrs[AB1771IXE] = 0;
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ai_addrs[XY566SE] = 0x6000;
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ai_addrs[XY566DI] = 0x7000;
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ai_addrs[XY566DIL] = 0xe000;
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ai_addrs[VXI_AT5_AI] = 0xc014;
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ai_addrs[AB1771IFE_SE] = 0;
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ai_addrs[AB1771IFE_4to20MA] = 0;
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ai_addrs[DVX2502] = 0xff00;
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ai_addrs[AB1771IFE_0to5V] = 0;
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ai_addrs[KSCV215] = 0;
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ai_memaddrs[AB1771IL] = 0;
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ai_memaddrs[AB1771IFE] = 0;
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ai_memaddrs[AB1771IXE] = 0;
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ai_memaddrs[XY566SE] = 0x000000;
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ai_memaddrs[XY566DI] = 0x040000;
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ai_memaddrs[XY566DIL] = 0x0c0000;
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ai_memaddrs[VXI_AT5_AI] = 0;
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ai_memaddrs[AB1771IFE_SE] = 0;
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ai_memaddrs[AB1771IFE_4to20MA] = 0;
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ai_memaddrs[DVX2502] = 0x100000;
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ai_memaddrs[AB1771IFE_0to5V] = 0;
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ai_memaddrs[KSCV215] = 0;
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ao_num_cards[AB1771OFE] = 12;
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ao_num_cards[VMI4100] = 4;
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ao_num_cards[ZIO085] = 1;
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ao_num_cards[VXI_AT5_AO] = 32;
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ao_num_channels[AB1771OFE] = 4;
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ao_num_channels[VMI4100] = 16;
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ao_num_channels[ZIO085] = 32;
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ao_num_channels[VXI_AT5_AO] = 16;
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ao_addrs[AB1771OFE] = 0;
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ao_addrs[VMI4100] = 0x4100;
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ao_addrs[ZIO085] = 0x0800;
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ao_addrs[VXI_AT5_AO] = 0xc000;
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bi_num_cards[ABBI_08_BIT] = 12;
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bi_num_cards[ABBI_16_BIT] = 12;
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bi_num_cards[BB910] = 4;
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bi_num_cards[XY210] = 4;
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bi_num_cards[VXI_AT5_BI] = 32;
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bi_num_cards[HPE1368A_BI] = 32;
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bi_num_cards[AT8_FP10S_BI] = 8;
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bi_num_cards[XY240_BI] = 2;
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bi_num_channels[ABBI_08_BIT] = 8;
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bi_num_channels[ABBI_16_BIT] = 16;
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bi_num_channels[BB910] = 32;
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bi_num_channels[XY210] = 32;
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bi_num_channels[VXI_AT5_BI] = 32;
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bi_num_channels[HPE1368A_BI] = 16;
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bi_num_channels[AT8_FP10S_BI] = 32;
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bi_num_channels[XY240_BI] = 32;
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bi_addrs[ABBI_08_BIT] = 0;
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bi_addrs[ABBI_16_BIT] = 0;
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bi_addrs[BB910] = 0xb800;
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bi_addrs[XY210] = 0xa000;
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bi_addrs[VXI_AT5_BI] = 0xc000;
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bi_addrs[HPE1368A_BI] = 0xc000;
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bi_addrs[AT8_FP10S_BI] = 0x0e00;
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bi_addrs[XY240_BI] = 0xd000;
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bo_num_cards[ABBO_08_BIT] = 12;
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bo_num_cards[ABBO_16_BIT] = 12;
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bo_num_cards[BB902] = 4;
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bo_num_cards[XY220] = 1;
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bo_num_cards[VXI_AT5_BO] = 32;
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bo_num_cards[HPE1368A_BO] = 32;
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bo_num_cards[AT8_FP10M_BO] = 2;
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bo_num_cards[XY240_BO] = 2;
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bo_num_channels[ABBO_08_BIT] = 8;
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bo_num_channels[ABBO_16_BIT] = 16;
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bo_num_channels[BB902] = 32;
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bo_num_channels[XY220] = 32;
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bo_num_channels[VXI_AT5_BO] = 32;
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bo_num_channels[HPE1368A_BO] = 16;
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bo_num_channels[AT8_FP10M_BO] = 32;
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bo_num_channels[XY240_BO] = 32;
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bo_addrs[ABBO_08_BIT] = 0;
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bo_addrs[ABBO_16_BIT] = 0;
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bo_addrs[BB902] = 0xd800;
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bo_addrs[XY220] = 0xc800;
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bo_addrs[VXI_AT5_BO] = 0xc000;
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bo_addrs[HPE1368A_BO] = 0xc000;
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bo_addrs[AT8_FP10M_BO] = 0x0c00;
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bo_addrs[XY240_BO] = 0xd000;
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sm_num_cards[CM57_83E] = 8;
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sm_num_cards[OMS_6AXIS] = 8;
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sm_num_channels[CM57_83E] = 1;
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sm_num_channels[OMS_6AXIS] = 6;
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sm_addrs[CM57_83E] = 0x8000;
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sm_addrs[OMS_6AXIS] = 0xfc00;
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wf_num_cards[XY566WF] = 4;
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wf_num_cards[CAMAC_THING] = 4;
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wf_num_cards[JGVTR1] = 8;
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wf_num_cards[COMET] = 4;
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wf_num_channels[XY566WF] = 1;
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wf_num_channels[CAMAC_THING] = 1;
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wf_num_channels[JGVTR1] = 1;
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wf_num_channels[COMET] = 4;
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wf_addrs[XY566WF] = 0x9000;
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wf_addrs[CAMAC_THING] = 0;
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wf_addrs[JGVTR1] = 0xB000;
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wf_addrs[COMET] = 0xbc00;
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wf_armaddrs[XY566WF] = 0x5400;
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wf_armaddrs[CAMAC_THING]= 0;
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wf_armaddrs[JGVTR1] = 0;
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wf_armaddrs[COMET] = 0;
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wf_memaddrs[XY566WF] = 0x080000;
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wf_memaddrs[CAMAC_THING]= 0;
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wf_memaddrs[JGVTR1] = 0xb80000;
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wf_memaddrs[COMET] = 0xe0000000;
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tm_num_cards[MZ8310] = 4;
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tm_num_cards[DG535] = 1;
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tm_num_cards[VXI_AT5_TIME] = 32;
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tm_num_channels[MZ8310] = 10;
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tm_num_channels[DG535] = 1;
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tm_num_channels[VXI_AT5_TIME] = 10;
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tm_addrs[MZ8310] = 0xf800;
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tm_addrs[DG535] = 0;
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tm_addrs[VXI_AT5_TIME] = 0xc000;
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AT830X_1_addrs = 0x0400;
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AT830X_1_num_cards = 2;
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AT830X_addrs = 0xaa0000;
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AT830X_num_cards = 2;
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xy010ScA16Base = 0x0000;
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EPICS_VXI_LA_COUNT = 32;
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EPICS_VXI_A24_BASE = (char *) 0x900000;
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EPICS_VXI_A24_SIZE = 0x100000;
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EPICS_VXI_A32_BASE = (char *) 0x90000000;
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EPICS_VXI_A32_SIZE = 0x10000000;
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AI566_VNUM = 0xf8;
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DVX_IVEC0 = 0xd0;
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MD_INT_BASE = 0xf0;
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MZ8310_INT_VEC_BASE = 0xe8;
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AB_VEC_BASE = 0x60;
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JGVTR1_INT_VEC = 0xe0;
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AT830X_1_IVEC0 = 0xd4;
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AT830X_IVEC0 = 0xd6;
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AT8FP_IVEC_BASE = 0xa2;
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AT8FPM_IVEC_BASE= 0xaa;
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BB_SHORT_OFF = 0x1800;
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BB_IVEC_BASE = 0xa0;
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BB_IRQ_LEVEL = 5;
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PEP_BB_SHORT_OFF= 0x1c00;
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PEP_BB_IVEC_BASE= 0xe8;
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NIGPIB_SHORT_OFF = 0x5000;
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NIGPIB_IVEC_BASE = 100;
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NIGPIB_IRQ_LEVEL = 5;
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MVME162_EXT_OFF = 0x40000000;
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MVME162_IVEC_BASE = 104;
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MVME162_IRQ_LEVEL = 5;
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}
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