moved stuff to src/libCom/osi/os/vxWorks

This commit is contained in:
Marty Kraimer
2003-08-05 18:38:19 +00:00
parent 087f0afafb
commit da00278de6
18 changed files with 18 additions and 5798 deletions

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@@ -7,16 +7,26 @@
# and higher are distributed subject to a Software License Agreement found
# in file LICENSE that is included with this distribution.
#*************************************************************************
#
# $Id$
#
TOP = ../..
TOP=../..
include $(TOP)/configure/CONFIG
DIRS += src
DIRS += iocCore
iocCore_OBJS += $(INSTALL_BIN)/ComLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/caLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/dbStaticIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/registryIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/dbIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/asIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/miscIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/dbtoolsIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/rsrvIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/iocshLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/vxComLibrary.o
iocCore_SRCS += registerRecordDeviceDriver.c
include $(TOP)/configure/RULES_DIRS
OBJLIB_vxWorks = iocCore
OBJLIB_OBJS += $(iocCore_OBJS)
OBJLIB_SRCS += registerRecordDeviceDriver.c
include $(TOP)/configure/RULES

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@@ -1,32 +0,0 @@
#*************************************************************************
# Copyright (c) 2002 The University of Chicago, as Operator of Argonne
# National Laboratory.
# Copyright (c) 2002 The Regents of the University of California, as
# Operator of Los Alamos National Laboratory.
# EPICS BASE Versions 3.13.7
# and higher are distributed subject to a Software License Agreement found
# in file LICENSE that is included with this distribution.
#*************************************************************************
TOP=../../..
include $(TOP)/configure/CONFIG
iocCore_OBJS += $(INSTALL_BIN)/ComLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/caLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/dbStaticIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/registryIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/dbIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/asIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/miscIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/dbtoolsIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/rsrvIocLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/iocshLibrary.o
iocCore_OBJS += $(INSTALL_BIN)/vxComLibrary.o
iocCore_SRCS += registerRecordDeviceDriver.c
OBJLIB_vxWorks = iocCore
OBJLIB_OBJS += $(iocCore_OBJS)
OBJLIB_SRCS += registerRecordDeviceDriver.c
include $(TOP)/configure/RULES

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@@ -1,31 +0,0 @@
#*************************************************************************
# Copyright (c) 2002 The University of Chicago, as Operator of Argonne
# National Laboratory.
# Copyright (c) 2002 The Regents of the University of California, as
# Operator of Los Alamos National Laboratory.
# EPICS BASE Versions 3.13.7
# and higher are distributed subject to a Software License Agreement found
# in file LICENSE that is included with this distribution.
#*************************************************************************
TOP=../../..
include $(TOP)/configure/CONFIG
INC += camacLib.h
INC += fast_lock.h
INC += drvTS.h
INC += devLib.h
INC += epicsDynLink.h
INC += module_types.h
INC += task_params.h
SRCS += drvTS.c
SRCS += devLib.c
SRCS += devLibVxWorks.c
SRCS += veclist.c
SRCS += epicsDynLink.c
SRCS += logMsgToErrlog.cpp
OBJLIB_vxWorks += vxCom
OBJLIB_SRCS = $(SRCS)
include $(TOP)/configure/RULES

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@@ -1,475 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META NAME="GENERATOR" CONTENT="Mozilla/4.06 [en] (X11; U; SunOS 5.6 sun4u) [Netscape]">
<TITLE>Synchronized Time Stamp Support</TITLE>
</HEAD>
<BODY>
<H1>
Synchronized Time Stamp Support</H1>
Author: Jim Kowalkowski
<H2>
MODIFICATION: 04AUG1998 (Marty Kraimer)</H2>
The routine TSsetClockFromUnix was made global. Calling it forces a resynchronization
with a host time server. This is useful to force a master timing ioc to
resynchronize.
<H2>
Introduction</H2>
<H3>
Purpose</H3>
New software has been added to IOC core to maintain time stamps. The new
software has the ability to maintain time stamps over all IOCs on a network.
The purpose of this paper is to explain how EPICS will synchronize the
time stamps. In addition, this paper will explain how to configure and
use the new EPICS time stamp support software.
<H3>
Definitions</H3>
Time Stamp: Two long words representing the time in seconds/nanoseconds
past an epoch. The first long word represents the seconds past the epoch,
the second long word represents the nanoseconds within the second. The
EPICS epoch is currently January 1, 1990. A commonly used Unix epoch in
January 1,1900 or in vxWorks case, January 1,1970.
<P>Event System: A hardware based subsystem for delivering events to all
IOCs on a network. Typical events are the "tick" event and the "reset counter"
event.
<P>Event System Synchronized Time: Time stamps maintained using an event
system. The clock pulses which increment the time stamps are provided by
a single source, all IOCs increment time stamps using the single source
pulse.
<P>Soft Time: Each IOC increments the time stamps using it's own internal
clock.
<P>Master Timing IOC: The IOC which knows the actual time and is the source
of the actual time to all those who inquire.
<P>Slave IOC: An IOC which relies on a master IOC to provide the actual
time. This IOC will keep it's time stamp in sync with a master.
<P>Soft Slave: An IOC which uses Soft Time and synchronizes it's time stamp
with a master.
<P>Event Slave: An IOC which uses Event System Synchronized Time to maintain
it's time stamp. This type of IOC uses the master to verify that it's time
stamp is correct.
<P>Soft Master: A Master Timing IOC that maintains it's time stamp using
a private clock.
<P>Event Master: An IOC which uses Event System Synchronized Time and is
a Master Timing IOC. In addition, this IOC is the source of the clock pulses.
<H3>
Overview</H3>
Time stamps are maintained across IOCs using UDP with a master/slave relationship.
A master timing IOC is responsible for knowing the actual time. A slave
IOC uses the master to verify it's own time stamps. Time stamps are maintained
in two fashions: using an event system or using IOC tick counters. Both
differ radically and require some explanation.
<H4>
Event System Support</H4>
The time stamp software has special requirements in order to provide event
system synchronized time. The time stamp software assumes that hardware
is present which has finite counters for counting pulses or ticks delivered
to it from some master tick generator. The software further assumes that
every so other, before the finite counters overflow, a signal or event
will occur to reset the counters to zero. The software requires access
to these counters at any time and notification when the "counter reset"
arrives. The combination of hardware tick counters and reset event notification
gives the software the ability to maintain time. If the event system supports
other events, it is required that the software be notified of the occurrence
of each event. The event time will be recorded in a table which holds one
time stamp for each possible event so that a user can inquire as to when
the event occurred.
<H4>
Soft Time Support</H4>
If no event system is present, the time stamp software can operate in a
software timing mode. In this mode, no events are available, only the current
time can be retrieved. An IOC using soft time will increment a time stamp
using the system clock (usually updated at 60Hz). The master/slave relationship
allows a slave to periodically ask a master for the correct time. At this
point the slave's time stamp can be adjusted to match the masters.
<H4>
Role of a Master Timing IOC</H4>
A master timing IOC has difference responsibilities depending on if it
is an event master or a soft master. An event master will be an event generator
(create "tick" and "counter reset" events). When the event master detects
a "counter reset", it broadcasts the time the event occurred to all event
slaves on the network. The slaves can use the time stamp data to verify
their own time. A soft timing master does not have any events, so no broadcasting
is done. Both soft and event masters have the ability to be queried at
any time by slaves for the current time.
<H4>
Role of a Slave Timing IOC</H4>
A slave timing IOC also has difference responsibilities depending on if
it is an event slave or a soft slave. An event slave contains hardware
to manage "tick" and "counter reset" events. The time stamp support software
uses this information to maintain time. An event slave will listen for
broadcasts from the event master timing IOC and use the information to
verify it's time. A soft slave periodically queries a master timing IOC
to get the current time.
<H3>
Design Specifications Summary</H3>
<H4>
Event System Synchronized Time</H4>
All IOCs will have identical event times. In addition, all IOCs will maintain
the same current time.
<P>The minimum events which must be supported is two. One must be used
as a "tick" event and one must be used as a "reset hardware tick counter"
event. The second will be used to update the time stamp representing the
current time.
<P>An optional event can be used as a "heartbeat" event. This event can
be used to signal errors.
<H4>
Soft Time</H4>
All IOCs of this type will maintain time stamps which are within two clocks
ticks or 1/30th of a second of a master. The master may be a designated
IOC or the Unix boot server. A Unix boot server master or the server pointed
to by the EPICS environment variable EPICS_TS_NTP_INET must have NTP available
for polling.
<H2>
User Level Interface</H2>
<H3>
General Use Functions</H3>
Three functions exist in the synchronous time stamp support software for
the user to retrieve time stamps:
<UL>
<LI>
TSgetTimeStamp(event_number, struct timespec* time_stamp)</LI>
<LI>
TScurrentTimeStamp(struct timespec* time_stamp)</LI>
<LI>
TSgetFirstOfYearVx(struct timespec* time_stamp)</LI>
<LI>
tsLocalTime(TS_STAMP*)</LI>
</UL>
To retrieve the time stamp which represents the time that an event occurred,
use <B>TSgetTimeStamp()</B>. <B>TScurrentTimeStamp()</B> can be used to
retrieve the time stamp which represents the time of day. <B>TsLocalTime()</B>
is the function for returning the current time stamp in the old time stamp
driver, the routine can still be used to retrieve this information. The
function <B>TSgetFirstOfYear()</B> attempts to give the caller a time stamp
representing January 1 of the current year relative to the vxWorks epoch
1970.
<P>An EPICS enironment variable named EPICS_TS_NTP_INET exists which can
be set to point to an NTP server. The default NTP server is the IOC boot
server.
<H4>
Test Functions</H4>
The following functions can be run from the vxWorks shell to give information
about the time stamp driver.
<UL>
<LI>
<B>TSreport()</B>: Display all the information about the current configuration
and status of this time stamp driver.</LI>
<LI>
<B>TSprintRealTime()</B>: Call the ErGetTime() function described below
(if present) and print the time stamp returned from it. Also print the
current EPICS time stamp.</LI>
<LI>
<B>TSprintTimeStamp(event_number)</B>: Print the EPICS time stamp for the
given event_number.</LI>
<LI>
<B>TSprintCurrentTime()</B>: Print the EPICS time stamp representing the
current time.</LI>
<LI>
<B>TSprintUnixTime()</B>: Send a time stamp query transaction to the boot
server or NTP server and print the time stamp returned.</LI>
<LI>
<B>TSprintMasterTime()</B>: Send a time stamp query transaction to the
master time server and print the time stamp returned.</LI>
</UL>
<H4>
Debugging Information</H4>
A global variable exists named <B>TSdriverDebug</B>. Setting this variable
to a positive value in the vxWorks start up script will inform the time
stamp driver to print information about what it is doing. The greater the
value, the more information the driver will print. The number can be set
and adjusted to any value any time while the IOC is running.
<H3>
Record Support</H3>
Record support will have the ability to tie the record processing time
to an event. This means that a user can specify that processing of a record
is due to an event (from the event system). When the record gets processed,
the time in the TIME field of the record will be the time when the event
occurred. In order to support the event times from record support, two
new fields will be added to dbCommon. The fields will be Time Stamp Event
(TSE), and Time Stamp Event Link (TSEL). The TSE field will be the actual
event time the user is interested in. The TSEL field will be a link used
to populate the TSE.
<P>To facilitate the use of the time stamp support software, a new record
support function will be added:
<UL>
<LI>
recGblGetTimeStamp((dbCommon*)prec).</LI>
</UL>
This routine uses TSgetTimeStamp(prec->tse, &amp;prec->time) to set the
processing time of the record. The new recGblGetTimeStamp() will replace
the existing call to tsLocalTime(). If the TSE field is zero (the default),
then TSgetTimeStamp() will report the current time. It is important to
remember that if a TSE field is set, then the processing time (in field
TIME) will always reflect the last time the event occurred.
<H2>
Driver Configuration</H2>
The synchronous time stamp support software is configured by calling TSconfigure()
from the "startup.cmd" file. The parameters to this routine are:
<UL>
<LI>
<B>master_indicator</B>: 1=master timing IOC, 0=slave timing IOC, default
is slave.</LI>
<LI>
<B>sync_rate_seconds</B>: The clock sync rate in seconds. This rate tells
how often the synchronous time stamp support software will confirm that
an IOC clock is synchronized. The default is 10 seconds.</LI>
<LI>
<B>clock_rate_hz</B>: The frequency in hertz of the clock, the default
is 1000Hz for the event system. The value will be set to the IOC's internal
clock rate when soft timing is used.</LI>
<LI>
<B>master_port</B>: The UDP port which a master timing IOC will use to
receive time stamp requests. The default is 18233.</LI>
<LI>
<B>slave_port</B>: The UDP port which a slave will use to receive time
stamp information from a master.</LI>
<LI>
<B>time_out</B>: UDP information request time out in milliseconds, if zero
is entered here, the default will be used which is 250ms.</LI>
<LI>
<B>type</B>: 0=normal operation, 1=force soft timing type.</LI>
</UL>
This routine must be run before iocInit(). The synchronous time stamp support
software is initialized as part of iocInit. Running <B>TSreport()</B> after
iocInit() will produce a report which shows the current state of the driver.
<H2>
Event System interface</H2>
The event system interface consists of seven function which can be provided
by an event system. The synchronous time stamp support software uses a
card number of zero on all functions that require a card number. The functions
are as follows:
<UL>
<LI>
long ErHaveReceiver(int event_card_number)</LI>
<LI>
long ErGetTicks(int event_card_number, unsigned long* ticks)</LI>
<LI>
long ErRegisterEventHandler(int event_card_num,EVENT_FUNC event_func)</LI>
<LI>
long ErRegisterErrorHandler(int event_card_num,ERROR_FUNC error_func)</LI>
<LI>
long ErForceSync(int event_card_number)</LI>
<LI>
long ErGetTime(struct timespec* time_stamp)</LI>
<LI>
long ErSyncEvent()</LI>
<LI>
long ErDirectTime()</LI>
<LI>
long ErDriverInit()</LI>
</UL>
The definition are as follows:
<UL>
<LI>
<B>ErHaveReceiver()</B>: Returns -1 if no event (timing) hardware present,
else returns the number of supported events.</LI>
<LI>
<B>ErGetTicks()</B>: Returns the number of ticks since the last hardware
tick counter reset.</LI>
<LI>
<B>ErRegisterEventHandler()</B>: Informs the event system of a function
to call when an event occurs, the format of the function will be defined
below.</LI>
<LI>
<B>ErRegisterErrorHandler()</B>: Informs the event system of a function
to call when an error occurs, the format of the function will be defined
below.</LI>
<LI>
<B>ErForceSync()</B>: This function will force an event generator to generate
a tick reset event and send it.</LI>
<LI>
<B>ErGetTime()</B>: This function returns the actual time. The intention
here is that this function will retrieve the actual time from GPS system
or equivalent and return is in time stamp format.</LI>
<LI>
<B>ErSyncEvent()</B>: Return the event number for the tick reset event.</LI>
<LI>
<B>ErDirectTime()</B>: Return 0 for normal operation, return value not
= 0 for systems that has direct time access, such as a GPS.</LI>
<LI>
<B>ErDriverInit()</B>: The time stamp driver initialization function will
call this user supplied function before it returns and after it sets up
the vxWorks clock and attempts to set up the TIMEZONE variable. This can
be useful to initialize a system such as a GPS (the year can be determined
using the vxWorks ansiTime library).</LI>
</UL>
All of these routines are checked to exist when the time stamp support
code initializes. All have some kind of default routine provided if they
are not found, most of which just return an error condition. The functions
which the time stamp support software registers (event and error) have
the following format:
<UL>
<LI>
TSeventHandler(int Card,int EventNum,unsigned long Ticks)</LI>
<LI>
TSerrorHandler(int Card, int ErrorNum)</LI>
</UL>
Here the Card is the event system board of interest (always zero), the
EventNum is the event that occurred, and the Ticks is the number of ticks
since the last board tick counter reset.
<P>In addition to the above functions, a global variable exists on the
IOC which can be used to indicate that direct time is available. Setting
the variable <B>TSdirectTimeVar</B> to a nonzero value has the same effect
as providing the ErDirectTime() function.
<H3>
Creating Direct Time Support</H3>
Most of the above interface functions apply only when special event hardware
is present. A much simpler configuration is when a GPS is present and time
stamps are distributed using IRIG-B to all or most of the IOCs. The easiest
way to implement this scenario is to define ErDirectTime() to return the
value one and define ErGetTime(). The job of ErGetTime() will be to actually
be to generate and return the time stamp representing the current time
(from the EPICS epoch). At system initialization, the actual time is retrieved
from a Unix server through NTP or the Unix time protocol, so that year
will be valid in the vxWorks time clock. At the GPS driver initialization,
the vxWorks function clock_gettime() can be used to calculate the year.
Record support will internally eventually call ErGetTime() each time the
record is processed. The GPS driver should be included as part of drvSup.ascii,
so it initialized in the proper order.
<H2>
Operation</H2>
An IOC can be configured to run in one of four ways: synchronous-master,
soft-master, synchronous-slave, soft-slave. Each mode maintains time differently.
When the time stamp support code initializes, it determines the mode which
it will operate in based on configuration parameters and event system function
information.
<H3>
Synchronous Time</H3>
Synchronous timing is determined by the presence of event system hardware.
The function ErHaveReceiver() gives this information. All IOCs using synchronous
time will have the exact same time stamps. The "tick" event increments
all IOC's event system tick counters, the "reset tick counter" resets the
counter to zero and posts the event to the time stamp support software.
The time stamp support software system knows the current time by looking
at the last "tick reset event" time and querying the event system with
ErGetTicks() for the number of ticks which have elapsed since the last
reset. Since the event handler function gets called with the "ticks since
last reset", an event time is the last "tick reset event" time plus the
ticks count in the call.
<H4>
Master</H4>
A synchronous master is determined by the first parameter to TSconfigure()
and the presence of event hardware. A master must have an event generator
and an event receiver. Since the event system is configured from EPICS
database records, the database must have records in it to initialize the
event system. The master is responsible for providing the "tick" event
and the "reset tick counter" event.
<P>When the time stamp support software's event handler function on a master
timing IOC receives a "reset tick counter" event, a time stamp message
is broadcast out on the slave_port (configured by TSconfigure()). The master
timing IOC is also listening on the master_port (also configured by TSconfigure())
for incoming requests for time stamp information.
<P>At boot time, a master will set the vxWorks clock from the Unix boot
server time. The time is retrieved from the boot server using NTP or the
time protocol, or the server pointed to by the EPICS environment variable
EPICS_TS_NTP_INET using NTP. The GPS module takes an unknown period of
time to sync to the correct time, so it can not be used until it's time
is valid. The event system is not up and running until record support initialization
is complete, therefore the event system time stamps are not ticking until
the event system initializes. At the time of the first sync, the event
system is known to be up, and the "reset tick counter" or "sync" event
is set to the current time (vxWorks clock).
<H4>
Slave</H4>
A synchronous slave is determined by the first parameter to TSconfigure()
and the presence of event hardware. This mode is automatically selected
if no TSconfigure() call is used in the "startup.cmd" file. This type of
slave must have an event receiver. The EPICS database must be configured
to initialize the event system.
<P>When a synchronous slave configuration is determined, the IOC broadcasts
a request for master on the master_port port. If a master is found, then
all current time, sync rate, and clock are extracted from the master's
response (the sync rate and clock rate from the TSconfigure() are overwritten
to match the master's configuration). If a master is not found, the slave
IOC goes into a polling mode to try to find a master every two minutes.
While a slave has no master, The IOC's clock is initialized from the Unix
boot server and TSgetTimeStamp() returns the vxWorks time clock value.
<P>The slave experiences the same problems as the master upon boot.
<H3>
Soft Time</H3>
Soft time IOCs use the 60 hertz clock available from vxWorks to maintain
a time stamp. The IOC will increment a time stamp at a 60 hertz rate. Soft
time is determined by the absence of event system hardware. All soft timing
IOC's will not have the same time stamps.
<H4>
Master</H4>
A soft master is determined by the first parameter of TSconfigure() and
the absence of event hardware. Upon boot, the master soft timing IOC retrieves
the current time from the Unix boot server. The IOC sets up a soft time-stamp
counter using a one tick watch dog and sets the vxWorks clock. From this
point on, the master runs using the soft time-stamp counter. The master
listens on the master_port port for requests for the master's current time.
<H4>
Slave</H4>
A soft slave is determined by the first parameter of TSconfigure() and
the absence of the event hardware. This mode is automatically selected
if no TSconfigure() is present in the "startup.cmd" file. The basic operation
of a soft slave is to synchronize the time stamp with a master when possible
or to the Unix boot server if no master is available. Upon initialization
the time stamp support code determines if a master is present on the network,
and if NTP support is available from the Unix boot server or the server
pointed to by the EPICS environment variable EPICS_TS_NTP_INET. The slave
will request time stamps from a master or unix server at sync_rate_in_seconds
rate from TSconfigure(). If the time stamp on the slave is found to be
off, the clock will be incrementally adjusted so that by the next sync,
the clock will be corrected to match the master's time stamp. A soft slave
will automatically switch between a master and the unix boot server depending
on if the master is available or not. In order to sync with the unix boot
server, NTP must be available there for query only.&nbsp;
<HR>
<P>Home page for <A HREF="http://www.aps.anl.gov/asd/controls/hideos/jimk.html">Jim
Kowalkowski</A> .
<BR>Argonne National Laboratory <A HREF="http://www.aps.anl.gov/asd/controls/epics_copyright.html">Copyright</A>
Information
<ADDRESS>
jbk@aps.anl.gov (Jim Kowalkowski)</ADDRESS>
<BR>updated 8/10/95
</BODY>
</HTML>

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/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/* camacLib.h -- Prototypes for camacLib.o
*
* Marty Wise
* 10/11/93
*
*/
static char ht2992_h_RCSID[] = "$Header$";
/********************************/
/* GLOBAL DATA */
/********************************/
extern int debug_hook;
extern struct glob_dat {
int total;
int read_error[5];
int write_error[5];
int cmd_error[5];
int total_err;
int lam_count[12];
} debug_dat;
/********************************/
/* FUNCTION PROTOTYPES */
/********************************/
void cdreg(int *ext, int b, int c, int n, int a);
void cfsa(int f, int ext, int *dat, int *q);
void cssa(int f, int ext, short *dat, int *q);
void ccci(int ext, int l);
void cccz(int ext);
void cccc(int ext);
void ccinit(int b);
void ctci(int ext, int *l);
void cgreg(int ext, int *b, int *c, int *n, int *a);
void cfmad(int f, int extb[2], int *intc, int cb[4]);
void cfubc(int f, int ext, int *intc, int cb[4]);
void cfubc(int f, int ext, int *intc, int cb[4]);
void csmad(int f, int extb[2], short *intc, int cb[4]);
void ctcd(int ext, int *l);
void cccd(int ext, int l);
void csga(int fa[], int exta[], unsigned short intc[], int qa[], int cb[4]);
void cfga(int fa[], int exta[], int intc[], int qa[], int cb[4]);
void cfubr(int f, int ext, int intc[], int cb[4]);
void csubc(int f, int ext, unsigned short *intc, int cb[4]);
void csubr(int f, int ext, int intc[], int cb[4]);
void print_reg(int ext);

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/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/* devLib.h */
/* $Id$ */
/*
* Original Author: Marty Kraimer
* Author: Jeff Hill
* Date: 03-10-93
*
* Notes:
* ------
* .01 03-23-93 joh We will only have problems with mod .03
* above if the CPU maintains the different
* address modes in different address spaces
* and we have a card or a user that insists
* on not using the default address type
* .02 06-14-93 joh needs devAllocInterruptVector() routine
*/
#ifndef INCdevLibh
#define INCdevLibh 1
#include <dbDefs.h>
/*
* epdevAddressType & EPICStovxWorksAddrType
* devLib.c must change in unison
*/
typedef enum {
atVMEA16,
atVMEA24,
atVMEA32,
atISA, /* memory mapped ISA access (until now only on PC) */
atLast /* atLast must be the last enum in this list */
} epicsAddressType;
/*
* pointer to an array of strings for each of
* the above address types
*/
extern const char *epicsAddressTypeName[];
long devAddressMap(void); /* print an address map */
/*
* devReadProbe()
*
* a bus error safe "wordSize" read at the specified address which returns
* unsuccessful status if the device isnt present
*/
long devReadProbe (unsigned wordSize, volatile const void *ptr, void *pValueRead);
/*
* devNoResponseProbe()
*
* Verifies that no devices respond at naturally aligned words
* within the specified address range. Return success if no devices
* respond. Returns an error if a device does respond or if
* a physical address for a naturally aligned word cant be mapped.
* Checks all naturally aligned word sizes between char and long for
* the entire specified range of bytes.
*/
long devNoResponseProbe(
epicsAddressType addrType,
size_t base,
size_t size
);
/*
* devWriteProbe
*
* a bus error safe "wordSize" write at the specified address which returns
* unsuccessful status if the device isnt present
*/
long devWriteProbe (unsigned wordSize, volatile void *ptr, const void *pValueWritten);
long devRegisterAddress(
const char *pOwnerName,
epicsAddressType addrType,
size_t logicalBaseAddress,
size_t size, /* bytes */
volatile void **pPhysicalAddress);
long devUnregisterAddress(
epicsAddressType addrType,
size_t logicalBaseAddress,
const char *pOwnerName);
/*
* allocate and register an unoccupied address block
*/
long devAllocAddress(
const char *pOwnerName,
epicsAddressType addrType,
size_t size,
unsigned alignment, /*n ls bits zero in addr*/
volatile void **pLocalAddress);
/*
* connect ISR to a VME interrupt vector
*/
long devConnectInterruptVME(
unsigned vectorNumber,
void (*pFunction)(void *),
void *parameter);
/*
* connect ISR to an ISA interrupt level
* (not implemented)
* (API should be reviewed)
*/
long devConnectInterruptISA(
unsigned interruptLevel,
void (*pFunction)(void *),
void *parameter);
/*
* connect ISR to a PCI interrupt
* (not implemented)
* (API should be reviewed)
*/
long devConnectInterruptPCI(
unsigned bus,
unsigned device,
unsigned function,
void (*pFunction)(void *),
void *parameter);
/*
* disconnect ISR from a VME interrupt vector
*
* The parameter pFunction should be set to the C function pointer that
* was connected. It is used as a key to prevent a driver from inadvertently
* removing an interrupt handler that it didn't install
*/
long devDisconnectInterruptVME(
unsigned vectorNumber,
void (*pFunction)(void *));
/*
* disconnect ISR from an ISA interrupt level
* (not implemented)
* (API should be reviewed)
*
* The parameter pFunction should be set to the C function pointer that
* was connected. It is used as a key to prevent a driver from inadvertently
* removing an interrupt handler that it didn't install
*/
long devDisconnectInterruptISA(
unsigned interruptLevel,
void (*pFunction)(void *));
/*
* disconnect ISR from a PCI interrupt
* (not implemented)
* (API should be reviewed)
*
* The parameter pFunction should be set to the C function pointer that
* was connected. It is used as a key to prevent a driver from inadvertently
* removing an interrupt handler that it didn't install
*/
long devDisconnectInterruptPCI(
unsigned bus,
unsigned device,
unsigned function,
void (*pFunction)(void *));
/*
* determine if a VME interrupt vector is in use
*
* returns boolean
*/
int devInterruptInUseVME (unsigned vectorNumber);
/*
* determine if an ISA interrupt level is in use
* (not implemented)
*
* returns boolean
*/
int devInterruptLevelInUseISA (unsigned interruptLevel);
/*
* determine if a PCI interrupt is in use
* (not implemented)
*
* returns boolean
*/
int devInterruptInUsePCI (unsigned bus, unsigned device,
unsigned function);
typedef enum {intVME, intVXI, intISA} epicsInterruptType;
/*
* enable VME interrupt level
*/
long devEnableInterruptLevelVME (unsigned level);
/*
* enable ISA interrupt level
*/
long devEnableInterruptLevelISA (unsigned level);
/*
* not implemented - API needs to be reviewed
*/
long devEnableInterruptLevelPCI (unsigned level,
unsigned bus, unsigned device, unsigned function);
/*
* disable VME interrupt level
*/
long devDisableInterruptLevelVME (unsigned level);
/*
* disable ISA interrupt level
*/
long devDisableInterruptLevelISA (unsigned level);
/*
* not implemented - API needs to be reviewed
*/
long devDisableInterruptLevelPCI (unsigned level,
unsigned bus, unsigned device, unsigned function);
/*
* Routines to allocate and free memory in the A24 memory region.
*
*/
void *devLibA24Malloc(size_t);
void *devLibA24Calloc(size_t);
void devLibA24Free(void *pBlock);
/*
* Normalize a digital value and convert it to type TYPE
*
* Ex:
* float f;
* int d;
* f = devNormalizeDigital(d,12)
*
*/
#define devCreateMask(NBITS) ((1<<(NBITS))-1)
#define devDigToNml(DIGITAL,NBITS) \
(((double)(DIGITAL))/devCreateMask(NBITS))
#define devNmlToDig(NORMAL,NBITS) \
(((long)(NORMAL)) * devCreateMask(NBITS))
/*
*
* Alignment mask
* (for use when testing to see if the proper number of least
* significant bits are zero)
*
*/
#define devCreateAlignmentMask(CTYPE)\
(sizeof(CTYPE)>sizeof(double)?sizeof(double)-1:sizeof(CTYPE)-1)
/*
* pointer aligned test
* (returns true if the pointer is on the worst case alignemnt
* boundary for its type)
*/
#define devPtrAlignTest(PTR) (!(devCreateAlignmentMask(*PTR)&(long)(PTR)))
/*
* virtual OS layer for devLib.c
*/
struct devLibVirtualOS {
/*
* maps logical address to physical address, but does not detect
* two device drivers that are using the same address range
*/
long (*pDevMapAddr) (epicsAddressType addrType, unsigned options,
size_t logicalAddress, size_t size, volatile void **ppPhysicalAddress);
/*
* a bus error safe "wordSize" read at the specified address which returns
* unsuccessful status if the device isnt present
*/
long (*pDevReadProbe) (unsigned wordSize, volatile const void *ptr, void *pValueRead);
/*
* a bus error safe "wordSize" write at the specified address which returns
* unsuccessful status if the device isnt present
*/
long (*pDevWriteProbe) (unsigned wordSize, volatile void *ptr, const void *pValueWritten);
/*
* connect ISR to a VME interrupt vector
* (required for backwards compatibility)
*/
long (*pDevConnectInterruptVME) (unsigned vectorNumber,
void (*pFunction)(), void *parameter);
/*
* disconnect ISR from a VME interrupt vector
* (required for backwards compatibility)
*/
long (*pDevDisconnectInterruptVME) (unsigned vectorNumber,
void (*pFunction)(void *));
/*
* enable VME interrupt level
*/
long (*pDevEnableInterruptLevelVME) (unsigned level);
/*
* disable VME interrupt level
*/
long (*pDevDisableInterruptLevelVME) (unsigned level);
};
/*
* error codes (and messages) associated with devLib.c
*/
#define S_dev_success 0
#define S_dev_vectorInUse (M_devLib| 1) /*interrupt vector in use*/
#define S_dev_vecInstlFail (M_devLib| 2) /*interrupt vector install failed*/
#define S_dev_uknIntType (M_devLib| 3) /*Unrecognized interrupt type*/
#define S_dev_vectorNotInUse (M_devLib| 4) /*Interrupt vector not in use by caller*/
#define S_dev_badA16 (M_devLib| 5) /*Invalid VME A16 address*/
#define S_dev_badA24 (M_devLib| 6) /*Invalid VME A24 address*/
#define S_dev_badA32 (M_devLib| 7) /*Invalid VME A32 address*/
#define S_dev_uknAddrType (M_devLib| 8) /*Unrecognized address space type*/
#define S_dev_addressOverlap (M_devLib| 9) /*Specified device address overlaps another device*/
#define S_dev_identifyOverlap (M_devLib| 10) /*This device already owns the address range*/
#define S_dev_addrMapFail (M_devLib| 11) /*unable to map address*/
#define S_dev_intDisconnect (M_devLib| 12) /*Interrupt at vector disconnected from an EPICS device*/
#define S_dev_internal (M_devLib| 13) /*Internal failure*/
#define S_dev_intEnFail (M_devLib| 14) /*unable to enable interrupt level*/
#define S_dev_intDissFail (M_devLib| 15) /*unable to disable interrupt level*/
#define S_dev_noMemory (M_devLib| 16) /*Memory allocation failed*/
#define S_dev_addressNotFound (M_devLib| 17) /*Specified device address unregistered*/
#define S_dev_noDevice (M_devLib| 18) /*No device at specified address*/
#define S_dev_wrongDevice (M_devLib| 19) /*Wrong device type found at specified address*/
#define S_dev_badSignalNumber (M_devLib| 20) /*Signal number (offset) to large*/
#define S_dev_badSignalCount (M_devLib| 21) /*Signal count to large*/
#define S_dev_badRequest (M_devLib| 22) /*Device does not support requested operation*/
#define S_dev_highValue (M_devLib| 23) /*Parameter to high*/
#define S_dev_lowValue (M_devLib| 24) /*Parameter to low*/
#define S_dev_multDevice (M_devLib| 25) /*Specified address is ambiguous (more than one device responds)*/
#define S_dev_badSelfTest (M_devLib| 26) /*Device self test failed*/
#define S_dev_badInit (M_devLib| 27) /*Device failed during initialization*/
#define S_dev_hdwLimit (M_devLib| 28) /*Input exceeds Hardware Limit*/
#define S_dev_deviceDoesNotFit (M_devLib| 29) /*Unable to locate address space for device*/
#define S_dev_deviceTMO (M_devLib| 30) /*device timed out*/
#define S_dev_badFunction (M_devLib| 31) /*bad function pointer*/
#define S_dev_badVector (M_devLib| 32) /*bad interrupt vector*/
#define S_dev_badArgument (M_devLib| 33) /*bad function argument*/
#define S_dev_vxWorksIntEnFail S_dev_intEnFail
/*
* NOTE: this routine has been deprecated. It exists
* for backwards compatibility purposes only.
*
* Please use one of devConnectInterruptVME, devConnectInterruptPCI,
* devConnectInterruptISA etc. devConnectInterrupt will be removed
* in a future release.
*/
long devConnectInterrupt(
epicsInterruptType intType,
unsigned vectorNumber,
void (*pFunction)(),
void *parameter);
/*
* NOTE: this routine has been deprecated. It exists
* for backwards compatibility purposes only.
*
* Please use one of devDisconnectInterruptVME, devDisconnectInterruptPCI,
* devDisconnectInterruptISA etc. devDisconnectInterrupt will be removed
* in a future release.
*/
long devDisconnectInterrupt(
epicsInterruptType intType,
unsigned vectorNumber,
void (*pFunction)());
/*
* NOTE: this routine has been deprecated. It exists
* for backwards compatibility purposes only.
*
* Please use one of devEnableInterruptLevelVME, devEnableInterruptLevelPCI,
* devEnableInterruptLevelISA etc. devEnableInterruptLevel will be removed
* in a future release.
*/
long devEnableInterruptLevel(epicsInterruptType intType, unsigned level);
/*
* NOTE: this routine has been deprecated. It exists
* for backwards compatibility purposes only.
*
* Please use one of devDisableInterruptLevelVME, devDisableInterruptLevelISA,
* devDisableInterruptLevelPCI etc. devDisableInterruptLevel will be removed
* in a future release.
*/
long devDisableInterruptLevel (epicsInterruptType intType, unsigned level);
/*
* NOTE: this routine has been deprecated. It exists
* for backwards compatibility purposes only.
*
* Please use devNoResponseProbe(). locationProbe() will be removed
* in a future release.
*/
long locationProbe (epicsAddressType addrType, char *pLocation);
#endif /* devLib.h*/

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@@ -1,431 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/*
* devLibVxWorks.c
* @(#)$Id$
*
* Archictecture dependent support for common device driver resources
*
* Author: Jeff Hill
* Date: 10-30-98
*/
static char *sccsID = "@(#) $Id$";
#include <vxWorks.h>
#include <types.h>
#include <iv.h>
#include <vme.h>
#include <sysLib.h>
#include <memLib.h>
#include <intLib.h>
#include <logLib.h>
#include <vxLib.h>
#include "devLib.h"
#include "epicsDynLink.h"
/*
* A list of the names of the unexpected interrupt handlers
* ( some of these are provided by wrs )
*/
LOCAL char *defaultHandlerNames[] = {
"_excStub",
"_excIntStub",
"_unsolicitedHandlerEPICS"};
typedef void myISR (void *pParam);
LOCAL myISR *defaultHandlerAddr[NELEMENTS(defaultHandlerNames)];
LOCAL myISR *isrFetch(unsigned vectorNumber);
/*
* this routine needs to be in the symbol table
* for this code to work correctly
*/
void unsolicitedHandlerEPICS(int vectorNumber);
/*
* this is in veclist.c
*/
int cISRTest(void (*)(), void (**)(), void **);
/*
* we use a translation between an EPICS encoding
* and a vxWorks encoding here
* to reduce dependency of drivers on vxWorks
*
* we assume that the BSP are configured to use these
* address modes by default
*/
#define EPICSAddrTypeNoConvert -1
int EPICStovxWorksAddrType[]
= {
VME_AM_SUP_SHORT_IO,
VME_AM_STD_SUP_DATA,
VME_AM_EXT_SUP_DATA,
EPICSAddrTypeNoConvert
};
LOCAL void initHandlerAddrList(void);
/*
* maps logical address to physical address, but does not detect
* two device drivers that are using the same address range
*/
LOCAL long vxDevMapAddr (epicsAddressType addrType, unsigned options,
size_t logicalAddress, size_t size, volatile void **ppPhysicalAddress);
/*
* a bus error safe "wordSize" read at the specified address which returns
* unsuccessful status if the device isnt present
*/
long vxDevReadProbe (unsigned wordSize, volatile const void *ptr, void *pValue);
/*
* a bus error safe "wordSize" write at the specified address which returns
* unsuccessful status if the device isnt present
*/
long vxDevWriteProbe (unsigned wordSize, volatile void *ptr, const void *pValue);
/*
* used by dynamic bind in devLib.c
*/
const struct devLibVirtualOS devLibVirtualOS =
{vxDevMapAddr, vxDevReadProbe, vxDevWriteProbe,
devConnectInterruptVME, devDisconnectInterruptVME,
devEnableInterruptLevelVME, devDisableInterruptLevelVME};
#define SUCCESS 0
/*
* devConnectInterruptVME
*
* wrapper to minimize driver dependency on vxWorks
*/
long devConnectInterruptVME (
unsigned vectorNumber,
void (*pFunction)(),
void *parameter)
{
int status;
if (devInterruptInUseVME(vectorNumber)) {
return S_dev_vectorInUse;
}
status = intConnect(
(void *)INUM_TO_IVEC(vectorNumber),
pFunction,
(int) parameter);
if (status<0) {
return S_dev_vecInstlFail;
}
return SUCCESS;
}
/*
*
* devDisconnectInterruptVME()
*
* wrapper to minimize driver dependency on vxWorks
*
* The parameter pFunction should be set to the C function pointer that
* was connected. It is used as a key to prevent a driver from removing
* an interrupt handler that was installed by another driver
*
*/
long devDisconnectInterruptVME (
unsigned vectorNumber,
void (*pFunction)()
)
{
void (*psub)();
int status;
# if CPU_FAMILY == PPC
return S_dev_vecInstlFail;
# endif
/*
* If pFunction not connected to this vector
* then they are probably disconnecting from the wrong vector
*/
psub = isrFetch(vectorNumber);
if(psub != pFunction){
return S_dev_vectorNotInUse;
}
status = intConnect(
(void *)INUM_TO_IVEC(vectorNumber),
unsolicitedHandlerEPICS,
(int) vectorNumber);
if(status<0){
return S_dev_vecInstlFail;
}
return SUCCESS;
}
/*
* enable VME interrupt level
*/
long devEnableInterruptLevelVME (unsigned level)
{
# if CPU_FAMILY != I80X86
int s;
s = sysIntEnable (level);
if (s!=OK) {
return S_dev_intEnFail;
}
return SUCCESS;
# else
return S_dev_intEnFail;
# endif
}
/*
* enable ISA interrupt level
*/
long devEnableInterruptLevelISA (unsigned level)
{
# if CPU_FAMILY == I80X86
int s;
s = sysIntEnablePIC (level);
if (s!=OK) {
return S_dev_intEnFail;
}
return SUCCESS;
# else
return S_dev_intEnFail;
# endif
}
/*
* disable ISA interrupt level
*/
long devDisableInterruptLevelISA (unsigned level)
{
# if CPU_FAMILY == I80X86
int s;
s = sysIntDisablePIC (level);
if (s!=OK) {
return S_dev_intEnFail;
}
# else
return S_dev_intEnFail;
# endif
return SUCCESS;
}
/*
* disable VME interrupt level
*/
long devDisableInterruptLevelVME (unsigned level)
{
# if CPU_FAMILY != I80X86
int s;
s = sysIntDisable (level);
if (s!=OK) {
return S_dev_intDissFail;
}
return SUCCESS;
# else
return S_dev_intEnFail;
# endif
}
/*
* vxDevMapAddr ()
*/
LOCAL long vxDevMapAddr (epicsAddressType addrType, unsigned options,
size_t logicalAddress, size_t size, volatile void **ppPhysicalAddress)
{
long status;
if (ppPhysicalAddress==NULL) {
return S_dev_badArgument;
}
if (EPICStovxWorksAddrType[addrType] == EPICSAddrTypeNoConvert)
{
*ppPhysicalAddress = (void *) logicalAddress;
}
else
{
status = sysBusToLocalAdrs (EPICStovxWorksAddrType[addrType],
(char *) logicalAddress, (char **)ppPhysicalAddress);
if (status) {
return S_dev_addrMapFail;
}
}
return SUCCESS;
}
/*
* a bus error safe "wordSize" read at the specified address which returns
* unsuccessful status if the device isnt present
*/
long vxDevReadProbe (unsigned wordSize, volatile const void *ptr, void *pValue)
{
long status;
/*
* this global variable exists in the nivxi library
*/
status = vxMemProbe ((char *)ptr, VX_READ, wordSize, (char *) pValue);
if (status!=OK) {
return S_dev_noDevice;
}
return SUCCESS;
}
/*
* a bus error safe "wordSize" write at the specified address which returns
* unsuccessful status if the device isnt present
*/
long vxDevWriteProbe (unsigned wordSize, volatile void *ptr, const void *pValue)
{
long status;
/*
* this global variable exists in the nivxi library
*/
status = vxMemProbe ((char *)ptr, VX_READ, wordSize, (char *) pValue);
if (status!=OK) {
return S_dev_noDevice;
}
return SUCCESS;
}
/*
* isrFetch()
*/
LOCAL myISR *isrFetch(unsigned vectorNumber)
{
myISR *psub;
myISR *pCISR;
void *pParam;
int s;
/*
* fetch the handler or C stub attached at this vector
*/
psub = (myISR *) intVecGet((FUNCPTR *)INUM_TO_IVEC(vectorNumber));
if ( psub ) {
/*
* from libvxWorks/veclist.c
*
* checks to see if it is a C ISR
* and if so finds the function pointer and
* the parameter passed
*/
s = cISRTest(psub, &pCISR, &pParam);
if(!s){
psub = pCISR;
}
}
return psub;
}
/*
* determine if a VME interrupt vector is in use
*/
int devInterruptInUseVME (unsigned vectorNumber)
{
static int init;
int i;
myISR *psub;
# if CPU_FAMILY == PPC
return FALSE;
# else
if (!init) {
initHandlerAddrList();
init = TRUE;
}
psub = isrFetch (vectorNumber);
/*
* its a C routine. Does it match a default handler?
*/
for (i=0; i<NELEMENTS(defaultHandlerAddr); i++) {
if (defaultHandlerAddr[i] == psub) {
return FALSE;
}
}
return TRUE;
# endif
}
/*
* unsolicitedHandlerEPICS()
* what gets called if they disconnect from an
* interrupt and an interrupt arrives on the
* disconnected vector
*
*/
void unsolicitedHandlerEPICS(int vectorNumber)
{
/*
* call logMsg() and not errMessage()
* so we are certain that printf()
* does not get called at interrupt level
*/
logMsg(
"%s: line=%d: Interrupt to EPICS disconnected vector = 0X %X",
(int)__FILE__,
__LINE__,
vectorNumber,
NULL,
NULL,
NULL);
}
/*
*
* initHandlerAddrList()
* init list of interrupt handlers to ignore
*
*/
LOCAL
void initHandlerAddrList(void)
{
int i;
SYM_TYPE type;
int status;
for (i=0; i<NELEMENTS(defaultHandlerNames); i++) {
status = symFindByNameEPICS (sysSymTbl,
defaultHandlerNames[i],
(char **)&defaultHandlerAddr[i],
&type);
if (status != OK) {
errPrintf(
S_dev_internal,
__FILE__,
__LINE__,
"initHandlerAddrList() %s not in sym table",
defaultHandlerNames[i]);
}
}
}

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/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
#ifndef __DRVTS_h__
#define __DRVTS_h__
/**************************************************************************
*
* Author: Jim Kowalkowski
*
***********************************************************************/
#include <vxWorks.h>
#include <timers.h>
#include <semLib.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include "epicsTime.h"
#ifdef TS_DRIVER
#define TS_EXTERN
#else
#define TS_EXTERN extern
#endif
#define ER_EVENT_RESET_TICK 0x7d /* Reset the tick counter */
#define TS_MAGIC ('T'<<24|'S'<<16|'d'<<8|'r')
#define TS_SLAVE_PORT 18322
#define TS_MASTER_PORT 18323
#define TS_RETRY_COUNT 4
#define TS_TIME_OUT_MS 250
#define TS_SECS_ASYNC_TRY_MASTER (60*5) /* every five minutes */
#define TS_SECS_SYNC_TRY_MASTER (60*1) /* every one minute */
#define UDP_TIME_PORT 37
#define UDP_NTP_PORT 123
#define TS_BILLION 1000000000
#define TS_SYNC_RATE_SEC 10
#define TS_CLOCK_RATE_HZ 1000
#define TS_TOTAL_EVENTS 128
/*Following is (SEC_IN_YEAR*90)+(22*SEC_IN_DAY) */
/*22 is leap years from 1900 to 1990*/
#define TS_1900_TO_EPICS_EPOCH 2840140800UL
/*Following is (SEC_IN_YEAR*70)+(17*SEC_IN_DAY) */
/*17 is leap years from 1900 to 1970*/
#define TS_1900_TO_VXWORKS_EPOCH 2208988800UL
/*Following is (SEC_IN_YEAR*20)+(5*SEC_IN_DAY) */
/*5 is leap years from 1970 to 1990*/
#define TS_VXWORKS_TO_EPICS_EPOCH 631152000UL
#define TS_STAMP_SERVER_PRI 70
#define TS_SYNC_SERVER_PRI 70
#define TS_SYNC_CLIENT_PRI 70
#define TS_ASYNC_CLIENT_PRI 70
typedef enum { TS_time_request, TS_sync_request, TS_sync_msg } TStype;
typedef enum { TS_master_alive, TS_master_dead } TSstate;
typedef enum { TS_async_none, TS_async_private,
TS_async_ntp, TS_async_time } TStime_protocol;
typedef enum { TS_sync_master, TS_async_master,
TS_sync_slave, TS_async_slave,
TS_direct_master, TS_direct_slave} TStime_type;
struct TSstampTransStruct {
unsigned long magic; /* identifier */
TStype type; /* transaction type */
struct timespec master_time; /* master time stamp - last sync time */
struct timespec current_time; /* master current time stamp 1990 epoch */
struct timespec unix_time; /* time using 1900 epoch */
unsigned long sync_rate; /* master sends sync at this rate */
unsigned long clock_hz; /* master clock this frequency (tick rate) */
};
typedef struct TSstampTransStruct TSstampTrans;
struct TSinfoStruct {
TSstate state;
TStime_type type;
TStime_protocol async_type;
int ts_sync_valid;
struct timespec *event_table; /* timestamp table */
unsigned long sync_rate; /* master send sync at this rate */
unsigned long clock_hz; /* master clock is this frequency */
unsigned long clock_conv;/* conversion factor for tick_rate->ns */
unsigned long time_out; /* udp packet time-out in milliseconds */
int master_timing_IOC; /* 1=master, 0=slave */
int master_port; /* port that master listens on */
int slave_port; /* port that slave listens on */
int total_events; /* this is the total event in the event system*/
int sync_event; /* this is the sync event number */
int has_event_system; /* 1=has event system, 0=no event system */
int has_direct_time; /* 1=has direct time, 0=no direct time */
int UserRequestedType; /* let user force the setting of type */
SEM_ID sync_occurred;
struct sockaddr hunt; /* broadcast address info */
struct sockaddr master; /* socket info for contacting master */
};
typedef struct TSinfoStruct TSinfo;
/* global functions */
#ifdef __cplusplus
extern "C" {
#endif
TS_EXTERN long TSinit(void);
TS_EXTERN long TSgetTimeStamp(int event_number,struct timespec* ts);
TS_EXTERN unsigned long TSepochNtpToUnix(struct timespec* ts);
TS_EXTERN unsigned long TSfractionToNano(unsigned long fraction);
TS_EXTERN unsigned long TSepochNtpToEpics(struct timespec* ts);
TS_EXTERN unsigned long TSepochUnixToEpics(struct timespec* ts);
TS_EXTERN unsigned long TSepochEpicsToUnix(struct timespec* ts);
TS_EXTERN long TScurrentTimeStamp(struct timespec* ts);
TS_EXTERN long TSaccurateTimeStamp(struct timespec* ts);
TS_EXTERN long TSgetFirstOfYearVx(struct timespec* ts);
TS_EXTERN void TSconfigure(int master, int sync_rate_sec, int clock_rate_hz,
int master_port, int slave_port,
unsigned long millisecond_request_time_out, int type);
TS_EXTERN long TSsetClockFromUnix(void);
#ifndef TS_DRIVER
TS_EXTERN TSinfo TSdata;
TS_EXTERN TSdirectTimeVar; /* set to !=0 to indicate direct time available*/
TS_EXTERN TSgoodTimeStamps; /* force best time stamps by setting != 0 */
#endif
#ifdef __cplusplus
};
#endif
/* NTP information - all this is backwards and documentation only */
#define VN_SHIFT 2 /* Version - 3 bits */
#define VN_version 3<<VN_SHIFT
#define LI_SHIFT 0 /* Leap Indicator LI - 2 bits */
#define LI_no_warning (0x00<<LI_SHIFT)
#define LI_61_sec_minute (0x01<<LI_SHIFT)
#define LI_59_sec_minute (0x02<<LI_SHIFT)
#define LI_alarm_condition (0x03<<LI_SHIFT)
#define MODE_SHIFT 5 /* Mode MODE - 3 bits */
#define MODE_reserved (0x00<<MODE_SHIFT)
#define MODE_sym_active (0x01<<MODE_SHIFT)
#define MODE_sym_passive (0x02<<MODE_SHIFT)
#define MODE_client (0x03<<MODE_SHIFT)
#define MODE_server (0x04<<MODE_SHIFT)
#define MODE_broadcast (0x05<<MODE_SHIFT)
#define MODE_reserved_NTP (0x06<<MODE_SHIFT)
#define MODE_reserved_pvt (0x07<<MODE_SHIFT)
#define STRAT_SHIFT 8 /* Stratum STRAT - 8 bits */
#define STRAT_unspecified (0x00<<STRAT_SHIFT)
#define STRAT_ascii (0x00<<STRAT_SHIFT)
#define STRAT_GPS (0x01<<STRAT_SHIFT)
#define STRAT_ATOM (0x01<<STRAT_SHIFT)
#define STRAT_address (0x02<<STRAT_SHIFT)
#define POLL_SHIFT 16 /* eight bits */
#define PREC_SHIFT 24 /* eight bits */
struct TS_ntp {
/* unsigned int info; */
unsigned char info[4];
unsigned int root_delay;
unsigned int root_disp;
unsigned int reference_id;
struct timespec reference_ts;
struct timespec originate_ts;
struct timespec receive_ts;
struct timespec transmit_ts;
/* char authenticator[96]; (optional) */
};
typedef struct TS_ntp TS_NTP;
/* debug macro creation */
#ifdef NODEBUG
#define Debug(l,f,v) ;
#else
#ifdef MAKE_DEBUG
volatile int MAKE_DEBUG = 0;
#define Debug(l,f,v) { if(l<= MAKE_DEBUG ) \
{ printf("%s:%d: ",__FILE__,__LINE__); printf(f,v); }}
#define Debug0(l,f) { if(l<= MAKE_DEBUG ) \
{ printf("%s:%d: ",__FILE__,__LINE__); printf(f); }}
#else
#define Debug(l,f,v) { if(l) \
{ printf("%s:%d: ",__FILE__,__LINE__); printf(f,v); }}
#define Debug0(l,f) { if(l) \
{ printf("%s:%d: ",__FILE__,__LINE__); printf(f); }}
#endif
#endif
#endif

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@@ -1,92 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/* $Id $
*
* Comments from original version:
* On the MIPS processor, all symbols do not have the prepended underscore.
* Here we redefine symFindByName to look at the second character of the
* name string.
*
* On various RISC processors (at least MIPS and PPC), symbols do not have
* the prepended underscore. Here we redefine symFindByName so that, if the
* name lookup fails and if the first character of the name is "_", the
* lookup is repeated starting at the second character of the name string.
*
* 01a,08apr97,bdg created.
* 02a,03apr97,npr changed from mips.h into symFindByNameMips.c
* 03a,03jun98,wfl changed Mips -> EPICS and avoid architecture knowledge
*/
#include "epicsDynLink.h"
STATUS symFindByNameEPICS(
SYMTAB_ID symTblId,
char *name,
char **ppvalue,
SYM_TYPE *pType )
{
static int leadingUnderscore = 1;
static int init = 0;
STATUS status = ERROR;
if (!init) {
char *pSymValue;
SYM_TYPE type;
status = symFindByName ( symTblId, "symFindByNameEPICS", &pSymValue, &type );
if (status==OK) {
leadingUnderscore = 0;
}
init = 1;
}
if (name[0] != '_' || leadingUnderscore) {
status = symFindByName ( symTblId, name, ppvalue, pType );
}
else {
status = symFindByName ( symTblId, (name+1), ppvalue, pType );
}
return status;
}
STATUS symFindByNameAndTypeEPICS(
SYMTAB_ID symTblId,
char *name,
char **ppvalue,
SYM_TYPE *pType,
SYM_TYPE sType,
SYM_TYPE mask )
{
static int leadingUnderscore = 1;
static int init = 0;
STATUS status = ERROR;
if (!init) {
char *pSymValue;
SYM_TYPE type;
status = symFindByName (symTblId, "symFindByNameAndTypeEPICS", &pSymValue, &type );
if (status==OK) {
leadingUnderscore = 0;
}
init = 1;
}
if (name[0] != '_' || leadingUnderscore) {
status = symFindByNameAndType ( symTblId, name, ppvalue, pType, sType, mask );
}
else if (leadingUnderscore) {
status = symFindByNameAndType ( symTblId, (name+1), ppvalue, pType, sType, mask );
}
return status;
}

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@@ -1,42 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/*
* These routines will eventually need to be made OS independent
* (currently this is vxWorks specific)
*/
#ifndef epicsDynLinkh
#define epicsDynLinkh
#ifdef symFindByName
#undef symFindByName
#endif
#include "vxWorks.h"
#include "symLib.h"
#include "sysSymTbl.h"
STATUS symFindByNameEPICS(
SYMTAB_ID symTblId,
char *name,
char **pvalue,
SYM_TYPE *pType);
STATUS symFindByNameAndTypeEPICS(
SYMTAB_ID symTblId,
char *name,
char **pvalue,
SYM_TYPE *pType,
SYM_TYPE sType,
SYM_TYPE mask);
#endif /* ifdef epicsDynLinkh */

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@@ -1,65 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/* fast_lock.h */
/* share/epicsH $Id$ */
/*
* Author: Jeff Hill
* Date: 4-11-89
*/
/*
*
*
* Macros and data structures for a much faster (than vrtx semaphore)
* mutual exclusion lock/unlock.
* (semaphore in this case is only used to wait for unlock)
*
* On a 68020 the following times include lock and unlock
*
* FASTLOCK-FASTUNLOCK 8 microsecs
* semTake-semGive(Macro) 80 microsecs
* semTake-semGive 92 microsecs
*
*/
#ifndef INCLfast_lockh
#define INCLfast_lockh
#ifndef INCLsemLibh
#include <semLib.h>
#endif
#ifndef INCLvxLibh
#include <vxLib.h>
#endif
#define FAST_LOCK SEM_ID
#define FASTLOCKINIT(PFAST_LOCK)\
(*(PFAST_LOCK) = \
semMCreate(SEM_DELETE_SAFE|SEM_INVERSION_SAFE|SEM_Q_PRIORITY))
#define FASTLOCKFREE(PFAST_LOCK)\
semDelete(*(PFAST_LOCK))
#define FASTLOCK(PFAST_LOCK)\
semTake(*(PFAST_LOCK), WAIT_FOREVER);
#define FASTUNLOCK(PFAST_LOCK)\
semGive(*(PFAST_LOCK))
#define FASTLOCKNOWAIT(PFAST_LOCK) \
(semTake(*(PFAST_LOCK),NO_WAIT)==0) ? TRUE : FALSE)
#define FASTLOCKTEST(PFAST_LOCK) \
(\
(semTake(*(PFAST_LOCK),NO_WAIT)==0 )\
? (semGive(*(PFAST_LOCK),FALSE)\
: TRUE) \
)
#endif /* Nothing after this endif */

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@@ -1,99 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/*
* $Id$
*
* route vxWorks logMsg messages into the EPICS logging system
*
* Author: Jeff Hill
*
*/
#include <string.h>
#include <stdlib.h>
#include <errnoLib.h>
#include <iosLib.h>
#include <logLib.h>
#include "errlog.h"
static class errlogDevTimeInit
{
public:
errlogDevTimeInit ();
} errlogDevInstance;
static int errlogOpen ( DEV_HDR *, const char *, int )
{
return OK;
}
static int errlogWrite ( DEV_HDR *, const char * pInBuf, int nbytes )
{
errlogPrintf ( "%.*s", nbytes, pInBuf );
return nbytes;
}
errlogDevTimeInit::errlogDevTimeInit ()
{
int errlogNo = iosDrvInstall (
0, // create not supported
0, // remove not supported
reinterpret_cast < FUNCPTR > ( errlogOpen ),
0, // close is a noop
0, // read not supported
reinterpret_cast < FUNCPTR > ( errlogWrite ),
0 // ioctl not supported
);
if ( errlogNo == ERROR ) {
errlogPrintf (
"Unable to install driver routing the vxWorks "
"logging system to the EPICS logging system because \"%s\"\n",
strerror ( errno ) );
return;
}
DEV_HDR * pDev = static_cast < DEV_HDR * > ( calloc ( 1, sizeof ( *pDev ) ) );
if ( ! pDev ) {
errlogPrintf (
"Unable to create driver data structure for routing the vxWorks "
"logging system to the EPICS logging system because \"%s\"\n",
strerror ( errno ) );
return;
}
int status = iosDevAdd ( pDev, "/errlog/", errlogNo );
if ( status < 0 ) {
errlogPrintf (
"Unable to install device routing the vxWorks "
"logging system to the EPICS logging system because \"%s\"\n",
strerror ( errno ) );
free ( pDev );
return;
}
int fd = open ( "/errlog/any", O_WRONLY, 0 );
if ( fd < 0 ) {
errlogPrintf (
"Unable to open fd routing the vxWorks "
"logging system to the EPICS logging system because \"%s\"\n",
strerror ( errno ) );
return;
}
status = logFdAdd ( fd );
if ( status != OK) {
errlogPrintf (
"Unable to install fd routing the vxWorks "
"logging system to the EPICS logging system because \"%s\"\n",
strerror ( errno ) );
close ( fd );
return;
}
}

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@@ -1,495 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/* module_types.h */
/* base/include $Id$ */
/*
* Author: Bob Dalesio
* Date: 12-07-88
*/
#ifndef INCLmodule_typesh
#define INCLmodule_typesh
/* Device module types */
/*
* all devices have corresponding entries in ~operator/db/src/menus.c
* changes must be made in both areas to keep the database and drivers in sync
*/
/* & in comment indicates tested with card 0 */
/* % in comment indicates tested with card other than card 0 */
/* # in comment indicates that the Nth card has been tested */
/* !! never been tested */
/*
* @# If any changes are made to this file, check the procedures
* ab_card, and vme_card in signallist.c, and get_address in sigmenu.c.
*/
#ifdef MODULE_TYPES_INIT
#define MODULE_TYPES_DEF(MT_DEF_PARM) MT_DEF_PARM
#else
#define MODULE_TYPES_DEF(MT_DEF_PARM) extern MT_DEF_PARM;
#endif
/* Number of columns used in io_report. */
#define IOR_MAX_COLS 4
/* I/O types */
#define IO_AI 0
#define IO_AO 1
#define IO_BI 2
#define IO_BO 3
#define IO_SM 4
#define IO_WF 5
#define IO_TIMER 6
#define MAX_IO_TYPE IO_TIMER
/* bus types */
/* must correspond to the values in link types */
/* these defines are in ~gta/dbcon/h/link.h */
/* equates for the Allen-Bradley cards. */
#define AB_BASE_ADDR 0xc00000 /* base addr of first AB6008SV */
#define AB_MAX_LINKS 2 /* number of serial links from VME */
#define AB_MAX_ADAPTERS 8 /* number of physical adapters on a link */
#define AB_MAX_CARDS 16 /* max number of IO cards per adapter */
#define AB_CARD_ADAPTER 16 /* cards per logical adapter */
#define AB_CHAN_CARD 16 /* max channels per card */
/* analog inputs */
#define AB1771IL 0 /* &% Allen-Bradley low level analog input */
#define AB1771IFE 1 /* &% Allen-Bradley low level analog input */
#define AB1771IXE 2 /* &% Allen-Bradley millivolt input */
#define XY566SE 3 /* & Xycom 12-bit Single Ended Scanned*/
#define XY566DI 4 /* &% Xycom 12-bit Differential Scanned */
#define XY566DIL 5 /* &% Xycom 12-bit Differential Latched */
#define VXI_AT5_AI 6 /* % AT-5 VXI module's Analog Inputs */
#define AB1771IFE_SE 7 /* % A-B IFE in 16 single-ended input mode */
#define AB1771IFE_4to20MA 8 /* % A-B IFE in 8 double-ended 4to20Ma */
#define DVX2502 9 /* &% DVX_2502 128 chan 16 bit differential */
#define AB1771IFE_0to5V 10 /* % A-B IFE in 8 double-ended 4to20Ma */
#define KSCV215 11 /* % KSC V215 VXI 16 bit differential */
#define AB1771IrPlatinum 12 /* % A-B RTD Platinum */
#define AB1771IrCopper 13 /* % A-B RTD Copper */
#define MAX_AI_TYPES AB1771IrCopper
MODULE_TYPES_DEF(short ai_num_cards[MAX_AI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={12,12,12, 4, 4, 6,32,12,12, 1, 12, 32, 12,12};
#endif
MODULE_TYPES_DEF(short ai_num_channels[MAX_AI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 8, 8, 8,32,16,16, 8,16, 8, 127, 8, 32,6,6};
#endif
MODULE_TYPES_DEF(short ai_interruptable[MAX_AI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, 0,0,0};
#endif
MODULE_TYPES_DEF(short ai_bus[MAX_AI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 4, 4, 4, 2, 2, 2, 2, 4, 4, 2, 4, 2,4,4};
#endif
MODULE_TYPES_DEF(unsigned short ai_addrs[MAX_AI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 0,0,0,0x6000,0x7000,0xe000, 0xc014,0,0, 0xff00, 0, 0,0,0};
#endif
MODULE_TYPES_DEF(long ai_memaddrs[MAX_AI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={0,0,0,0x000000,0x040000,0x0c0000, 0,0,0, 0x100000, 0, 0,0,0};
#endif
/* analog outputs */
#define AB1771OFE 0 /* &% Allen-Bradley 12 bit Analog Output */
#define VMI4100 1 /* & VMIC VMIVME 4100 */
#define ZIO085 2 /* & Ziomek 085 */
#define VXI_AT5_AO 3 /* !! AT-5 VXI modules analog outputs */
#define MAX_AO_TYPES VXI_AT5_AO
MODULE_TYPES_DEF(short ao_num_cards[MAX_AO_TYPES+1])
#ifdef MODULE_TYPES_INIT
= {12, 4, 1, 32};
#endif
MODULE_TYPES_DEF(short ao_num_channels[MAX_AO_TYPES+1])
#ifdef MODULE_TYPES_INIT
= { 4, 16, 32, 16};
#endif
MODULE_TYPES_DEF(short ao_interruptable[MAX_AO_TYPES+1] )
#ifdef MODULE_TYPES_INIT
= { 0, 0, 0, 1};
#endif
MODULE_TYPES_DEF(short ao_bus[MAX_AO_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 4, 2, 2, 2};
#endif
MODULE_TYPES_DEF(unsigned short ao_addrs[MAX_AO_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 0,0x4100,0x0800, 0xc000};
#endif
/* binary inputs */
#define ABBI_08_BIT 0 /* &% Allen-Bradley generic Binary In 8 bit */
#define ABBI_16_BIT 1 /* &% Allen-Bradley generic Binary In 16 bit */
#define BB910 2 /* & BURR BROWN MPV 910 (relay) */
#define XY210 3 /* &% XYcom 32 bit binary in */
#define VXI_AT5_BI 4 /* !! AT-5 VXI modules binary inputs */
#define HPE1368A_BI 5 /* !! HP E1368A video switch */
#define AT8_FP10S_BI 6 /* !! AT8 FP10 slave fast protect */
#define XY240_BI 7 /* !! Xycom 32 bit binary in / 32 bit binary out */
#define MAX_BI_TYPES XY240_BI
MODULE_TYPES_DEF(short bi_num_cards[MAX_BI_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 12, 12, 4, 4, 32, 32, 8, 2};
#endif
MODULE_TYPES_DEF(short bi_num_channels[MAX_BI_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 8, 16, 32, 32, 32, 16, 32, 32};
#endif
MODULE_TYPES_DEF(short bi_interruptable[MAX_BI_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 1, 1, 0, 0, 1, 1, 1, 1};
#endif
MODULE_TYPES_DEF(short bi_bus[MAX_BI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 4, 4, 2, 2, 2, 2, 2, 2};
#endif
MODULE_TYPES_DEF(unsigned short bi_addrs[MAX_BI_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 0,0,0xb800,0xa000, 0xc000, 0xc000, 0x0e00, 0xd000};
#endif
/* binary outputs */
#define ABBO_08_BIT 0 /* &% Allen-Bradley 8 bit binary out */
#define ABBO_16_BIT 1 /* &% Allen-Bradley 16 bit binary out */
#define BB902 2 /* &% BURR BROWN MPV 902 (relay) */
#define XY220 3 /* &% XYcom 32 bit binary out */
#define VXI_AT5_BO 4 /* !! AT-5 VXI modules binary outputs */
#define HPE1368A_BO 5 /* !! HP E1368A video switch */
#define AT8_FP10M_BO 6 /* !! AT8 FP10 master fast protect */
#define XY240_BO 7 /* !! Xycom 32 bit binary in / 32 bit binary out */
#define MAX_BO_TYPES XY240_BO
MODULE_TYPES_DEF(short bo_num_cards[MAX_BO_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={12, 12, 4, 1, 32, 32, 2, 2};
#endif
MODULE_TYPES_DEF(short bo_num_channels[MAX_BO_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 8, 16, 32, 32, 32, 16, 32, 32};
#endif
MODULE_TYPES_DEF(short bo_interruptable[MAX_BO_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 0, 0, 0, 0, 1, 0, 0, 1 };
#endif
MODULE_TYPES_DEF(short bo_bus[MAX_BO_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 4, 4, 2, 2, 2, 2, 2, 2 };
#endif
MODULE_TYPES_DEF(unsigned short bo_addrs[MAX_BO_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 0,0,0xd800,0xc800, 0xc000, 0xc000, 0x0c00, 0xd000};
#endif
/* stepper motor drivers */
#define CM57_83E 0 /* & Compumotor 57-83E motor controller */
#define OMS_6AXIS 1 /* & OMS six axis motor controller */
#define MAX_SM_TYPES OMS_6AXIS
MODULE_TYPES_DEF(short sm_num_cards[MAX_SM_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 8, 8 };
#endif
MODULE_TYPES_DEF(short sm_num_channels[MAX_SM_TYPES+1] )
#ifdef MODULE_TYPES_INIT
= { 1, 8};
#endif
MODULE_TYPES_DEF(short sm_interruptable[MAX_SM_TYPES+1] )
#ifdef MODULE_TYPES_INIT
= { 0, 0 };
#endif
MODULE_TYPES_DEF(short sm_bus[MAX_SM_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 2, 2 };
#endif
MODULE_TYPES_DEF(unsigned short sm_addrs[MAX_SM_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 0x8000, 0xfc00 };
#endif
/* waveforms */
#define XY566WF 0 /* & Xycom 566 as a waveform */
#define CAMAC_THING 1 /* !! CAMAC waveform digitizer */
#define JGVTR1 2 /* & Joerger transient recorder */
#define COMET 3 /* !! COMET transient recorder */
#define MAX_WF_TYPES COMET
MODULE_TYPES_DEF(short wf_num_cards[MAX_WF_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={4, 4, 8, 4};
#endif
MODULE_TYPES_DEF(short wf_num_channels[MAX_WF_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={1, 1, 1, 4};
#endif
MODULE_TYPES_DEF(short wf_interruptable[MAX_WF_TYPES+1] )
#ifdef MODULE_TYPES_INIT
= {0, 0, 0, 0};
#endif
MODULE_TYPES_DEF(short wf_bus[MAX_WF_TYPES+1])
#ifdef MODULE_TYPES_INIT
={2, 3, 2, 2};
#endif
MODULE_TYPES_DEF(unsigned short wf_addrs[MAX_WF_TYPES+1])
#ifdef MODULE_TYPES_INIT
={0x9000, 0, 0xB000, 0xbc00};
#endif
MODULE_TYPES_DEF(unsigned short wf_armaddrs[MAX_WF_TYPES+1])
#ifdef MODULE_TYPES_INIT
= {0x5400, 0, 0, 0};
#endif
MODULE_TYPES_DEF(long wf_memaddrs[MAX_WF_TYPES+1])
#ifdef MODULE_TYPES_INIT
={0x080000, 0, 0xb80000, 0xe0000000};
#endif
/* timing cards */
#define MZ8310 0 /* &% Mizar Timing Module */
#define DG535 1 /* !! GPIB timing instrument */
#define VXI_AT5_TIME 2 /* !! AT-5 VXI modules timing channels */
#define MAX_TM_TYPES VXI_AT5_TIME
MODULE_TYPES_DEF(short tm_num_cards[MAX_TM_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={ 4, 1, 32 };
#endif
MODULE_TYPES_DEF(short tm_num_channels[MAX_TM_TYPES+1] )
#ifdef MODULE_TYPES_INIT
={10, 1, 10};
#endif
MODULE_TYPES_DEF(short tm_interruptable[MAX_TM_TYPES+1] )
#ifdef MODULE_TYPES_INIT
= { 1, 0, 1 };
#endif
MODULE_TYPES_DEF(short tm_bus[MAX_TM_TYPES+1])
#ifdef MODULE_TYPES_INIT
={ 2, 5, 2 };
#endif
MODULE_TYPES_DEF(unsigned short tm_addrs[MAX_TM_TYPES+1])
#ifdef MODULE_TYPES_INIT
={0xf800, 0, 0xc000 };
#endif
/* AT830X clock cards */
MODULE_TYPES_DEF(long AT830X_1_addrs )
#ifdef MODULE_TYPES_INIT
= 0x0400;
#endif
MODULE_TYPES_DEF(short AT830X_1_num_cards )
#ifdef MODULE_TYPES_INIT
= 2;
#endif
MODULE_TYPES_DEF(long AT830X_addrs )
#ifdef MODULE_TYPES_INIT
= 0xaa0000;
#endif
MODULE_TYPES_DEF(short AT830X_num_cards )
#ifdef MODULE_TYPES_INIT
= 2;
#endif
/*
* system controller cards.
* (driver looks for only one card)
*/
MODULE_TYPES_DEF(long xy010ScA16Base)
#ifdef MODULE_TYPES_INIT
= 0x0000;
#endif
/*
* limit the size of the VXI logical address space
*
* <VXI LA BASE> = <VME SHORT ADDR BASE> + 0xc000
*
* LA VME address
* 0 <VXI LA BASE>
* EPICS_VXI_LA_COUNT <VXI LA BASE> + (EPICS_VXI_LA_COUNT-1)*64
*/
MODULE_TYPES_DEF(unsigned char EPICS_VXI_LA_COUNT)
#ifdef MODULE_TYPES_INIT
= 32;
#endif
/*
*
* address ranges for VXI A24 and A32 devices
*
*/
MODULE_TYPES_DEF(char *EPICS_VXI_A24_BASE)
#ifdef MODULE_TYPES_INIT
= (char *) 0x900000;
#endif
MODULE_TYPES_DEF(unsigned long EPICS_VXI_A24_SIZE)
#ifdef MODULE_TYPES_INIT
= 0x100000;
#endif
MODULE_TYPES_DEF(char *EPICS_VXI_A32_BASE)
#ifdef MODULE_TYPES_INIT
= (char *) 0x90000000;
#endif
MODULE_TYPES_DEF(unsigned long EPICS_VXI_A32_SIZE)
#ifdef MODULE_TYPES_INIT
= 0x10000000;
#endif
/******************************************************************************
*
* Interrupt vector locations used by the MV167 CPU board.
* These are defined in mv167.h
*
* PCC2_INT_VEC_BASE 0x40 PCC interrupt vector base number
* any multiple of 0x10
* UTIL_INT_VEC_BASE0 0x50 VMEchip2 utility interrupt
* vector base number
* any multiple of 0x10
* UTIL_INT_VEC_BASE1 0x60 VMEchip2 utility interrupt
* vector base number
* any multiple of 0x10
*
* INT_VEC_CD2400_A 0x90 int vec for channel A
* INT_VEC_CD2400_B 0x94 int vec for channel B
* INT_VEC_CD2400_C 0x98 int vec for channel C
* INT_VEC_CD2400_D 0x9c int vec for channel D
*
* LANC_IRQ_LEVEL 3 LNANC IRQ level
* MPCC_IRQ_LEVEL 4 serial comm IRQ level
* SYS_CLK_LEVEL 6 interrupt level for sysClk
* AUX_CLK_LEVEL 5 interrupt level for auxClk
* SCSI_IRQ_LEVEL 2 scsi interrupt level
*
******************************************************************************/
/* interrupt vector allocation - one for each XY566 DIL card */
MODULE_TYPES_DEF(int AI566_VNUM)
#ifdef MODULE_TYPES_INIT
=0xf8; /* Xycom 566 Differential Latched */
#endif
/* interrupt vector allocation - one for each DVX card */
MODULE_TYPES_DEF(int DVX_IVEC0)
#ifdef MODULE_TYPES_INIT
=0xd0;
#endif
/* stepper motor interrupt vector - one for each motor */
MODULE_TYPES_DEF(int MD_INT_BASE)
#ifdef MODULE_TYPES_INIT
=0xf0; /* base of the motor int vector */
#endif
/* I reserve from here up to num_cards * 4 interrupting chans/card - joh */
MODULE_TYPES_DEF(int MZ8310_INT_VEC_BASE)
#ifdef MODULE_TYPES_INIT
=0xe8;
#endif
/* Allen-Bradley Serial Driver - MAX_AB_LINKS number of vectors */
MODULE_TYPES_DEF(int AB_VEC_BASE)
#ifdef MODULE_TYPES_INIT
=0x60;
#endif
/* only one interrupt vector allocated for all Joerger VTR1 boards joh */
MODULE_TYPES_DEF(int JGVTR1_INT_VEC)
#ifdef MODULE_TYPES_INIT
=0xe0;
#endif
/* AT830X_1 cards have 1 intr vector for each AT830X_1_num_cards (presently 2) */
MODULE_TYPES_DEF(int AT830X_1_IVEC0)
#ifdef MODULE_TYPES_INIT
=0xd4;
#endif
/* AT830X cards have 1 intr vector for each AT830X_num_cards (presently 2) */
MODULE_TYPES_DEF(int AT830X_IVEC0)
#ifdef MODULE_TYPES_INIT
=0xd6;
#endif
/* AT8 fast protect interrupt vector base */
MODULE_TYPES_DEF(int AT8FP_IVEC_BASE)
#ifdef MODULE_TYPES_INIT
=0xa2;
#endif
MODULE_TYPES_DEF(int AT8FPM_IVEC_BASE )
#ifdef MODULE_TYPES_INIT
=0xaa;
#endif
/******************************************************************************
*
* Addresses and IRQ information used by the XVME402 bitbus cards.
*
******************************************************************************/
MODULE_TYPES_DEF(unsigned short BB_SHORT_OFF )
#ifdef MODULE_TYPES_INIT
= 0x1800; /* the first address of link 0's region */
#endif
#define BB_NUM_LINKS 4 /* max number of BB ports allowed */
MODULE_TYPES_DEF(int BB_IVEC_BASE )
#ifdef MODULE_TYPES_INIT
= 0xa0; /* vectored interrupts (2 used for each link) */
#endif
MODULE_TYPES_DEF(int BB_IRQ_LEVEL )
#ifdef MODULE_TYPES_INIT
= 5; /* IRQ level */
#endif
/******************************************************************************
*
* Information for the PEP modular Bitbus boards.
*
******************************************************************************/
MODULE_TYPES_DEF(unsigned short PEP_BB_SHORT_OFF )
#ifdef MODULE_TYPES_INIT
= 0x1c00;
#endif
MODULE_TYPES_DEF(int PEP_BB_IVEC_BASE )
#ifdef MODULE_TYPES_INIT
= 0xe8;
#endif
/******************************************************************************
*
* Addresses and IRQ information used by the NI1014 and NI1014D bitbus cards.
*
******************************************************************************/
MODULE_TYPES_DEF(unsigned short NIGPIB_SHORT_OFF)
#ifdef MODULE_TYPES_INIT
= 0x5000;/* First address of link 0's region */
#endif
/* Each link uses 0x0200 bytes */
#define NIGPIB_NUM_LINKS 4 /* Max number of NI GPIB ports allowed */
MODULE_TYPES_DEF(int NIGPIB_IVEC_BASE )
#ifdef MODULE_TYPES_INIT
= 100; /* Vectored interrupts (2 used for each link) */
#endif
MODULE_TYPES_DEF(int NIGPIB_IRQ_LEVEL )
#ifdef MODULE_TYPES_INIT
=5; /* IRQ level */
#endif
#if 0 /* JRW */
#define NI1014_LINK_NUM_BASE 0
#endif
/*
* nothing after this endif
*/
#endif /*INCLmodule_typesh*/

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@@ -1,185 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/* $Id$ */
/* Parameters for tasks on IOC */
/*
* Authors: Andy Kozubal, Jeff Hill, and Bob Dalesio
* Date: 2-24-89
*/
#ifndef INCtaskLibh
#include <taskLib.h>
#endif
#define VXTASKIDSELF 0
/* Task Names */
#define EVENTSCAN_NAME "scanEvent"
#define SCANONCE_NAME "scanOnce"
#define SMCMD_NAME "smCommand"
#define SMRESP_NAME "smResponse"
#define ABDONE_NAME "abDone"
#define ABSCAN_NAME "abScan"
#define ABCOS_NAME "abBiCosScanner"
#define MOMENTARY_NAME "momentary"
#define WFDONE_NAME "wfDone"
#define SEQUENCER_NAME "sequencer"
#define BKPT_CONT_NAME "bkptCont"
#define SCANNER_NAME "scanner"
#define REQ_SRVR_NAME "CA_TCP"
#define CA_CLIENT_NAME "CA_client"
#define CA_EVENT_NAME "CA_event"
#define CAST_SRVR_NAME "CA_UDP"
#define CA_REPEATER_NAME "CA_repeater"
#define CA_ONLINE_NAME "CA_online"
#define TASKWD_NAME "taskwd"
#define SMIOTEST_NAME "smInout"
#define SMROTTEST_NAME "smRotate"
#define EVENT_PEND_NAME "event_task"
#define XY240_NAME "xy_240_scan"
#define GPIBLINK_NAME "gpibLink"
#define BBLINK_NAME "bbLinkTask"
#define BBTXLINK_NAME "bbTx"
#define BBRXLINK_NAME "bbRx"
#define BBWDTASK_NAME "bbwd"
#define ERRLOG_NAME "errlog"
#define LOG_RESTART_NAME "logRestart"
/* Task priorities */
#define SCANONCE_PRI 129 /* scan one time */
/*DO NOT RUN ANY RECORD PROCESSING TASKS AT HIGHER PRIORITY THAN _netTask=50*/
#define CALLBACK_PRI_LOW 140 /* callback task - generall callback task */
#define CALLBACK_PRI_MEDIUM 135 /* callback task - generall callback task */
#define CALLBACK_PRI_HIGH 128 /* callback task - generall callback task */
#define EVENTSCAN_PRI 129 /* Event Scanner - Runs on a global event */
#define SMCMD_PRI 120 /* Stepper Motor Command Task - Waits for cmds */
#define SMRESP_PRI 121 /* Stepper Motor Resp Task - Waits for resps */
#define ABCOS_PRI 121 /* Allen-Bradley Binary Input COS io_event wakeup */
#define ABDONE_PRI 122 /* Allen-Bradley Resp Task - Interrupt Driven */
#define ABSCAN_PRI 123 /* Allen-Bradley Scan Task - Base Rate .1 secs */
#define BBLINK_PRI 124
#define BBWDTASK_PRI 123 /* BitBus watchdog task */
#define BBRXLINK_PRI 124 /* BitBus link task */
#define BBTXLINK_PRI 125 /* BitBus link task */
#define GPIBLINK_PRI 125 /* GPIB link task */
#define MOMENTARY_PRI 126 /* Momentary output - posted from watchdog */
#define WFDONE_PRI 127 /* Waveform Task - Base Rate of .1 second */
#define PERIODSCAN_PRI 139 /* Periodic Scanners - Slowest rate */
#define DB_CA_PRI 149 /*database to channel access*/
#define SEQUENCER_PRI 151
#define XY240_PRI 160 /* xy 240 dio scanner */
#define SCANNER_PRI 170
#define REQ_SRVR_PRI 181 /* Channel Access TCP request server*/
#define CA_CLIENT_PRI 180 /* Channel Access clients */
#define CA_REPEATER_PRI 181 /* Channel Access repeater */
#define ERRLOG_PRI CA_REPEATER_PRI /*error logger task*/
#define CAST_SRVR_PRI 182 /* Channel Access broadcast server */
#define CA_ONLINE_PRI 183 /* Channel Access server online notify */
#define TASKWD_PRI 200 /* Watchdog Scan Task - runs every 6 seconds */
#define SMIOTEST_PRI 205 /* Stepper Mtr in/out test - runs every .1 sec */
#define SMROTTEST_PRI 205 /* Stepper Mtr rotate test - runs every .1 sec */
#define LOG_RESTART_PRI 200 /* Log server connection watch dog */
/* Task delay times (seconds) */
#define TASKWD_DELAY 6
/* Task delay times (tics) */
#define ABSCAN_RATE (sysClkRateGet()/6)
#define SEQUENCER_DELAY (sysClkRateGet()/5)
#define SCANNER_DELAY (sysClkRateGet()/5)
#define CA_ONLINE_DELAY (sysClkRateGet()*15)
#define LOG_RESTART_DELAY (sysClkRateGet()*30)
/* Task creation options */
#define ERRLOG_OPT VX_FP_TASK
#define EVENTSCAN_OPT VX_FP_TASK
#define SCANONCE_OPT VX_FP_TASK
#define CALLBACK_OPT VX_FP_TASK
#define SMCMD_OPT VX_FP_TASK
#define SMRESP_OPT VX_FP_TASK
#define ABDONE_OPT VX_FP_TASK
#define ABCOS_OPT VX_FP_TASK
#define ABSCAN_OPT VX_FP_TASK
#define MOMENTARY_OPT VX_FP_TASK
#define PERIODSCAN_OPT VX_FP_TASK
#define WFDONE_OPT VX_FP_TASK
#define SEQUENCER_OPT VX_FP_TASK | VX_STDIO
#define BKPT_CONT_OPT VX_FP_TASK
#define SCANNER_OPT VX_FP_TASK
#define REQ_SRVR_OPT VX_FP_TASK
#define CAST_SRVR_OPT VX_FP_TASK
#define CA_CLIENT_OPT VX_FP_TASK
#define CA_REPEATER_OPT VX_FP_TASK
#define CA_ONLINE_OPT VX_FP_TASK
#define TASKWD_OPT VX_FP_TASK
#define SMIOTEST_OPT VX_FP_TASK
#define SMROTTEST_OPT VX_FP_TASK
#define EVENT_PEND_OPT VX_FP_TASK
#define GPIBLINK_OPT VX_FP_TASK|VX_STDIO
#define BBLINK_OPT VX_FP_TASK|VX_STDIO
#define BBTXLINK_OPT VX_FP_TASK|VX_STDIO
#define BBRXLINK_OPT VX_FP_TASK|VX_STDIO
#define BBWDTASK_OPT VX_FP_TASK|VX_STDIO
#define DB_CA_OPT (VX_FP_TASK | VX_STDIO)
#define XY_240_OPT (0) /* none */
#define LOG_RESTART_OPT (VX_FP_TASK)
/*
* Task stack sizes
*
* (original stack sizes are appropriate for the 68k)
* ARCH_STACK_FACTOR allows scaling the stacks on particular
* processor architectures
*/
#if CPU_FAMILY == MC680X0
#define ARCH_STACK_FACTOR 1
#elif CPU_FAMILY == SPARC
#define ARCH_STACK_FACTOR 2
#else
#define ARCH_STACK_FACTOR 2
#endif
#define ERRLOG_STACK (4000*ARCH_STACK_FACTOR)
#define EVENTSCAN_STACK (11000*ARCH_STACK_FACTOR)
#define SCANONCE_STACK (11000*ARCH_STACK_FACTOR)
#define CALLBACK_STACK (11000*ARCH_STACK_FACTOR)
#define SMCMD_STACK (3000*ARCH_STACK_FACTOR)
#define SMRESP_STACK (3000*ARCH_STACK_FACTOR)
#define ABCOS_STACK (3000*ARCH_STACK_FACTOR)
#define ABDONE_STACK (3000*ARCH_STACK_FACTOR)
#define ABSCAN_STACK (3000*ARCH_STACK_FACTOR)
#define MOMENTARY_STACK (2000*ARCH_STACK_FACTOR)
#define PERIODSCAN_STACK (11000*ARCH_STACK_FACTOR)
#define WFDONE_STACK (9000*ARCH_STACK_FACTOR)
#define SEQUENCER_STACK (5500*ARCH_STACK_FACTOR)
#define BKPT_CONT_STACK (11000*ARCH_STACK_FACTOR)
#define SCANNER_STACK (3048*ARCH_STACK_FACTOR)
#define RSP_SRVR_STACK (5096*ARCH_STACK_FACTOR)
#define REQ_SRVR_STACK (5096*ARCH_STACK_FACTOR)
#define CAST_SRVR_STACK (5096*ARCH_STACK_FACTOR)
#define CA_CLIENT_STACK (11000*ARCH_STACK_FACTOR)
#define CA_REPEATER_STACK (5096*ARCH_STACK_FACTOR)
#define CA_ONLINE_STACK (3048*ARCH_STACK_FACTOR)
#define TASKWD_STACK (2000*ARCH_STACK_FACTOR)
#define SMIOTEST_STACK (2000*ARCH_STACK_FACTOR)
#define SMROTTEST_STACK (2000*ARCH_STACK_FACTOR)
#define EVENT_PEND_STACK (5096*ARCH_STACK_FACTOR)
#define TIMESTAMP_STACK (4000*ARCH_STACK_FACTOR)
#define GPIBLINK_STACK (5000*ARCH_STACK_FACTOR)
#define BBLINK_STACK (5000*ARCH_STACK_FACTOR)
#define BBRXLINK_STACK (5000*ARCH_STACK_FACTOR)
#define BBTXLINK_STACK (5000*ARCH_STACK_FACTOR)
#define BBWDTASK_STACK (5000*ARCH_STACK_FACTOR)
#define DB_CA_STACK (11000*ARCH_STACK_FACTOR)
#define XY_240_STACK (4096*ARCH_STACK_FACTOR)
#define LOG_RESTART_STACK (0x1000*ARCH_STACK_FACTOR)

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@@ -1,227 +0,0 @@
/*************************************************************************\
* Copyright (c) 2002 The University of Chicago, as Operator of Argonne
* National Laboratory.
* Copyright (c) 2002 The Regents of the University of California, as
* Operator of Los Alamos National Laboratory.
* EPICS BASE Versions 3.13.7
* and higher are distributed subject to a Software License Agreement found
* in file LICENSE that is included with this distribution.
\*************************************************************************/
/*
* $Id$
* @(#)veclist.c 1.10
*
* list fuctions attached to the interrupt vector table
*
* Created 28Mar89 Jeffrey O. Hill
* johill@lanl.gov
* (505) 665 1831
*
*/
/*
*
* makefile
*
*
* V5VW = /.../vx/v502b
*
* veclist.o:
* cc68k -c -DCPU_FAMILY=MC680X0 -I$(V5VW)/h veclist.c
*
*
*/
#include "vxWorks.h"
#include "stdio.h"
#include "string.h"
#include "intLib.h"
#include "vxLib.h"
#include "iv.h"
#include "ctype.h"
#include "sysSymTbl.h"
static char *sccsID =
"@(#) $Id$";
/*
*
* VME bus dependent
*
*/
#define NVEC 0x100
static char *ignore_list[] = {"_excStub","_excIntStub"};
int veclist(int);
int cISRTest(FUNCPTR proutine, FUNCPTR *ppisr, void **pparam);
static void *fetch_pointer(unsigned char *);
/*
*
* veclist()
*
*/
int veclist(int all)
{
int vec;
int value;
SYM_TYPE type;
char name[MAX_SYS_SYM_LEN];
char function_type[10];
FUNCPTR proutine;
FUNCPTR pCISR;
int cRoutine;
void *pparam;
int status;
unsigned i;
for(vec=0; vec<NVEC; vec++){
proutine = intVecGet((FUNCPTR *)INUM_TO_IVEC(vec));
status = cISRTest(proutine, &pCISR, &pparam);
if(status == OK){
cRoutine = TRUE;
proutine = pCISR;
strcpy(function_type, "C");
}
else{
cRoutine = FALSE;
strcpy(function_type, "MACRO");
pCISR = NULL;
}
status = symFindByValue(
sysSymTbl,
(int)proutine,
name,
&value,
&type);
if(status<0 || value != (int)proutine){
sprintf(name, "0x%X", (unsigned int) proutine);
}
else if(!all){
int match = FALSE;
for(i=0; i<NELEMENTS(ignore_list); i++){
if(!strcmp(ignore_list[i],name)){
match = TRUE;
break;
}
}
if(match){
continue;
}
}
printf( "vec 0x%02X %5s ISR %s",
vec,
function_type,
name);
if(cRoutine){
printf("(0x%X)", (unsigned int) pparam);
}
printf("\n");
}
return OK;
}
/*
* cISRTest()
*
* test to see if a C routine is attached
* to this interrupt vector
*/
#define ISR_PATTERN 0xaaaaaaaa
#define PARAM_PATTERN 0x55555555
int cISRTest(FUNCPTR proutine, FUNCPTR *ppisr, void **pparam)
{
static FUNCPTR handler = NULL;
STATUS status;
unsigned char *pchk;
unsigned char *pref;
unsigned char val;
int found_isr;
int found_param;
if(handler == NULL){
#if CPU_FAMILY != PPC
handler = (FUNCPTR) intHandlerCreate(
(FUNCPTR) ISR_PATTERN,
PARAM_PATTERN);
#endif
if(handler == NULL){
return ERROR;
}
}
found_isr = FALSE;
found_param = FALSE;
pchk = (unsigned char *) proutine;
pref = (unsigned char *) handler;
for( ;
found_isr==FALSE || found_param==FALSE;
pchk++, pref++){
status = vxMemProbe(
(char *) pchk,
READ,
sizeof(val),
(char *) &val);
if(status < 0){
return ERROR;
}
if(val != *pref){
if(*pref == (unsigned char) ISR_PATTERN){
*ppisr = (FUNCPTR) fetch_pointer(pchk);
pref += sizeof(*ppisr)-1;
pchk += sizeof(*ppisr)-1;
found_isr = TRUE;
}
else if(*pref == (unsigned char) PARAM_PATTERN){
*pparam = fetch_pointer(pchk);
pref += sizeof(*pparam)-1;
pchk += sizeof(*pparam)-1;
found_param = TRUE;
}
else{
return ERROR;
}
}
}
return OK;
}
/*
* fetch_pointer()
*
* fetch pointer given low byte with correct byte ordering
*
*/
struct char_array{
unsigned char byte[4];
};
union pointer{
void *ptr_overlay;
struct char_array char_overlay;
};
LOCAL
void *fetch_pointer(unsigned char *plow_byte)
{
union pointer p;
size_t i;
for(i=0; i < sizeof(p); i++){
p.char_overlay.byte[i] = plow_byte[i];
}
return p.ptr_overlay;
}