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Trivial fixes to simmRAW for ao

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This commit is contained in:
Ralph Lange
2022-05-10 15:34:01 -07:00
parent 2f0a7c7342
commit 371cdde6df
2 changed files with 5 additions and 8 deletions
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12
modules/database/src/std/rec/aoRecord.c
View File

@@ -567,18 +567,15 @@ static long writeValue(aoRecord *prec)
case menuSimmYES:
case menuSimmRAW:
{
recGblSetSevr(prec, SIMM_ALARM, prec->sims);
if (prec->pact || (prec->sdly < 0.)) {
if(prec->simm == menuSimmYES){
if (prec->pact || (prec->sdly < 0.)) {
if (prec->simm == menuSimmYES)
/* don't convert */
status = dbPutLink(&prec->siol, DBR_DOUBLE, &prec->oval, 1);
}
else { /* prec->simm == menuSimmRAW*/
else /* prec->simm == menuSimmRAW*/
/* convert */
status = dbPutLink(&prec->siol, DBR_LONG, &prec->rval, 1);
}
prec->pact = FALSE;
prec->pact = FALSE;
} else { /* !prec->pact && delay >= 0. */
epicsCallback *pvt = prec->simpvt;
if (!pvt) {
@@ -589,7 +586,6 @@ static long writeValue(aoRecord *prec)
prec->pact = TRUE;
}
break;
}
default:
recGblSetSevr(prec, SOFT_ALARM, INVALID_ALARM);

1
modules/database/src/std/rec/aoRecord.dbd.pod
View File

@@ -265,6 +265,7 @@ The following fields are used to operate the record in simulation mode.
If SIMM (fetched through SIML, if populated) is YES, the record is put in SIMS
severity and the value is written through SIOL, without conversion.
If SIMM is RAW, the value is converted and RVAL is written.
SSCN sets a different SCAN mechanism to use in simulation mode.
SDLY sets a delay (in sec) that is used for asynchronous simulation
processing.