Marie Andrä 6e6fcec698 MY3.0:read and write Registers, frames, cycles, delay (#64)
* MY3.0:read and write Registers, frames, cycles, delay

* write pattern seems to work

* done all corrections. added default clks: run_clk=125MHz, tick_clk=20MHz (fix), sampling_clk=80MHz (from Carlos)

* clk check for aquistition time

* clk check for aquistition time

* Update slsDetectorServer_defs.h

* Update slsDetectorFunctionList.c
2019-09-30 14:36:33 +02:00

13 lines
320 B
C

/** API versions */
#define GITBRANCH "developer"
#define APILIB 0x190723
#define APIRECEIVER 0x190722
#define APIGUI 0x190723
#define APIMOENCH 0x190820
#define APICTB 0x190902
#define APIGOTTHARD 0x190902
#define APIJUNGFRAU 0x190902
#define APIEIGER 0x190902
#define APIGOTTHARD2 0x190927
#define APIMYTHEN3 0x190930