Marie Andrä 6e6fcec698 MY3.0:read and write Registers, frames, cycles, delay (#64) ...

* MY3.0:read and write Registers, frames, cycles, delay

* write pattern seems to work

* done all corrections. added default clks: run_clk=125MHz, tick_clk=20MHz (fix), sampling_clk=80MHz (from Carlos)

* clk check for aquistition time

* clk check for aquistition time

* Update slsDetectorServer_defs.h

* Update slsDetectorFunctionList.c

2019-09-30 14:36:33 +02:00

..

include

MY3.0:read and write Registers, frames, cycles, delay (#64)

2019-09-30 14:36:33 +02:00

src

Cleanup of the CmdProxy and migrated some commands (#52)

2019-08-23 14:32:44 +02:00

tests

fixed test

2019-08-23 14:43:58 +02:00

CMakeLists.txt

even more tests

2019-08-12 12:09:44 +02:00