Dhanya Thattil 3619577b69 fixed warnings, LTC2620 driver: removed power down file name as it is only for xilinx and must be combined to create it, refactored its setDAC to be maintainable, xilinx:setDAC andsetPower returns ret and calls LTC2620 directly (setDAC in xilinx is only for dac and not power regualtors anymore), validate vlimit again before calling LTC2620 setdac, fixed transceiveralignment with xilinx ctb, changed file names to not include %d because its only allowed in macros and not variables

2026-01-14 10:37:08 +01:00

..

AD9257.h

dev: jungfrau HW 1.0: adc output clock phase to 120 (#952)

2024-08-22 15:45:41 +02:00

ALTERA_PLL_CYCLONE10.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

ALTERA_PLL.h

Moench rw3 (#745)

2023-05-25 11:00:23 +02:00

arm64.h

Pattern unification & Matterhorn Changes (#1303)

2025-09-17 17:28:17 +02:00

ASIC_Driver.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

blackfin.h

refactoring code and compiling binary

2025-05-19 13:19:32 +02:00

clogger.h

Dev/detach pthreads not joining (#1019)

2024-11-07 11:24:46 +01:00

common.h

Dev/xilinx mat update (#959)

2024-09-10 16:19:03 +02:00

commonServerFunctions.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

communication_funcs_UDP.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

communication_funcs.h

Get trimbits (#462)

2022-05-24 11:08:08 +02:00

DAC6571.h

G2: reconfigure chip (#927)

2024-08-02 12:46:39 +02:00

I2C.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

INA226.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

loadPattern.h

ctb: add patternstart command, xilinx: fix frequency (#1307)

2025-09-23 12:13:46 +02:00

LTC2620_Driver.h

fixed warnings, LTC2620 driver: removed power down file name as it is only for xilinx and must be combined to create it, refactored its setDAC to be maintainable, xilinx:setDAC andsetPower returns ret and calls LTC2620 directly (setDAC in xilinx is only for dac and not power regualtors anymore), validate vlimit again before calling LTC2620 setdac, fixed transceiveralignment with xilinx ctb, changed file names to not include %d because its only allowed in macros and not variables

2026-01-14 10:37:08 +01:00

LTC2620.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

MAX1932.h

updated all .h files with license notice and copyright notice

2021-10-14 18:10:56 +02:00

nios.h

Dev/reg bit change no validate (#970)

2024-09-30 16:54:12 +02:00

programViaArm.h

Dev/xilinx mat update (#959)

2024-09-10 16:19:03 +02:00

programViaBlackfin.h

Format (#506)

2022-08-05 15:39:34 +02:00

programViaNios.h

server side fixed

2021-11-08 17:24:51 +01:00

sharedMemory.h

merge from develpoer, locking complete set of start acq steps and stop steps in eiger server as it shouldnt be interrutped, moved prepare into startstatemachine (#577)

2022-11-17 14:58:53 +01:00

slsDetectorFunctionList.h

xilinx: setDAC and setPower returns, setPower cannot set < vmin or 0, setDAC ensures dac value for power regulators cannot be power down value, remove virtual isTransceiverAligned to always return 1

2026-01-13 14:16:14 +01:00

slsDetectorServer_funcs.h

ctb: patwaittime and exptime (#1076)

2025-01-31 16:48:32 +01:00

UDPPacketHeaderGenerator.h

setting next frame number also for udp 1g itnerface

2022-01-28 11:44:12 +01:00

XILINX_FMC.h

fprintf should return 2 including terminating character as well. formatting.

2026-01-06 09:53:55 +01:00

XILINX_PLL.h

ctb: add patternstart command, xilinx: fix frequency (#1307)

2025-09-23 12:13:46 +02:00