mirror of
https://github.com/slsdetectorgroup/slsDetectorPackage.git
synced 2025-04-22 22:40:02 +02:00
159 lines
5.7 KiB
C
Executable File
159 lines
5.7 KiB
C
Executable File
#ifndef SERVER_DEFS_H
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#define SERVER_DEFS_H
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#include "sls_detector_defs.h"
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#include <stdint.h>
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#define GOODBYE (-200)
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/* Hardware Definitions */
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#define NMAXMODY (1)
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#define NMAXMODX (1)
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#define NMAXMOD (NMAXMODX * NMAXMODY)
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#define NMODY (1)
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#define NMODX (1)
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#define NMOD (NMODX * NMODY)
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#define NCHAN (256 * 256)
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#define NCHIP (8)
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#define NADC (0)
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#define NDAC (8)
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#define NCHANS (NCHAN * NCHIP * NMAXMOD)
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#define NDACS (NDAC * NMAXMOD)
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#define DYNAMIC_RANGE (16)
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#define DATA_BYTES (NMAXMOD * NCHIP * NCHAN * 2)
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#define IP_PACKETSIZE (0x0522) /**carlos?? calcChecksum*/
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#define UDP_PACKETSIZE (0x050E) /**carlos?? calcChecksum*/
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#define CLK_EXPTIME (40) /** 0x28 better name? */
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#define CLK_FC (20) /** 0x14 better name? */
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#define CLK_FREQ 156.25E+6 /**carlos used in firmware_funcs.. but needed ?*/
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/** Default Acqusition Parameters */
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#define DEFAULT_NUM_FRAMES (1*1000*1000)
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#define DEFAULT_NUM_CYCLES (0)
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#define DEFAULT_EXPTIME (10*1000)
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#define DEFAULT_PERIOD (2*1000*1000)
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#define DEFAULT_DELAY (0)
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#define DEFAULT_NUM_GATES (0)
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#define DEFAULT_HIGH_VOLTAGE (0)
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/* Other Default Values */
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//enum DACNAMES { VB_COMP, VDD_PROT, VIN_COM, VREF_PRECH, VB_PIXBUF, VB_DS, VREF_DS, VREF_COMP };
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#define DEFAULT_DAC_VALS { 1220, 3000, 1053, 1450, 750, 1000, 480, 420 };
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enum adcVals {TEMP_FPGA, TEMP_ADC};
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#define DEFAULT_SETTINGS (DYNAMICGAIN)
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#define DEFAULT_TX_UDP_PORT (0x7e9a)
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/* Defines in the Firmware */
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#define FIX_PATT_VAL (0xACDC2014)
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#define ADC_PORT_INVERT_VAL (0x453b2a9c)
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#define ADC_OFST_HALF_SPEED_VAL (0x20)
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#define ADC_OFST_QUARTER_SPEED_VAL (0x10)
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#define SAMPLE_ADC_HALF_SPEED (0x7f7c)
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#define SAMPLE_ADC_QUARTER_SPEED (0x8981)
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#define DAQ_HALF_SPEED (0x0)
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#define DAQ_QUARTER_SPEED (0xf)
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#define ADC_PHASE_HALF_SPEED (0x41)
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#define ADC_PHASE_QUARTER_SPEED (0x19)
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/* Maybe not required for jungfrau */
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#define NTRIMBITS (6)
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#define NCOUNTBITS (24)
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#define NCHIPS_PER_ADC (2)
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#define TRIM_DR (((int)pow(2,NTRIMBITS))-1)
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#define COUNT_DR (((int)pow(2,NCOUNTBITS))-1)
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#define ALLMOD (0xffff)
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#define ALLFIFO (0xffff)
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/* LTC2620 DAC DEFINES */
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#define LTC2620_DAC_CMD_OFST (20)
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#define LTC2620_DAC_CMD_MSK (0x0000000F << LTC2620_DAC_CMD_OFST)
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#define LTC2620_DAC_ADDR_OFST (16)
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#define LTC2620_DAC_ADDR_MSK (0x0000000F << LTC2620_DAC_ADDR_OFST)
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#define LTC2620_DAC_DATA_OFST (4)
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#define LTC2620_DAC_DATA_MSK (0x00000FFF << LTC2620_DAC_DATA_OFST)
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#define LTC2620_DAC_CMD_WRITE (0x00000000 << LTC2620_DAC_CMD_OFST)
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#define LTC2620_DAC_CMD_SET (0x00000003 << LTC2620_DAC_CMD_OFST)
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#define LTC2620_DAC_CMD_POWER_DOWN (0x00000004 << LTC2620_DAC_CMD_OFST)
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#define LTC2620_DAC_NUMBITS (24)
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/* MAX1932 HV DEFINES */
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#define MAX1932_HV_NUMBITS (8)
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#define MAX1932_HV_DATA_OFST (0)
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#define MAX1932_HV_DATA_MSK (0x000000FF << MAX1932_HV_DATA_OFST)
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/* AD9257 ADC DEFINES */
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#define AD9257_ADC_NUMBITS (24)
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#define AD9257_DEV_IND_2_REG (0x04)
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#define AD9257_CHAN_H_OFST (0)
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#define AD9257_CHAN_H_MSK (0x00000001 << AD9257_CHAN_H_OFST)
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#define AD9257_CHAN_G_OFST (1)
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#define AD9257_CHAN_G_MSK (0x00000001 << AD9257_CHAN_G_OFST)
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#define AD9257_CHAN_F_OFST (2)
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#define AD9257_CHAN_F_MSK (0x00000001 << AD9257_CHAN_F_OFST)
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#define AD9257_CHAN_E_OFST (3)
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#define AD9257_CHAN_E_MSK (0x00000001 << AD9257_CHAN_E_OFST)
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#define AD9257_DEV_IND_1_REG (0x05)
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#define AD9257_CHAN_D_OFST (0)
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#define AD9257_CHAN_D_MSK (0x00000001 << AD9257_CHAN_D_OFST)
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#define AD9257_CHAN_C_OFST (1)
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#define AD9257_CHAN_C_MSK (0x00000001 << AD9257_CHAN_C_OFST)
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#define AD9257_CHAN_B_OFST (2)
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#define AD9257_CHAN_B_MSK (0x00000001 << AD9257_CHAN_B_OFST)
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#define AD9257_CHAN_A_OFST (3)
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#define AD9257_CHAN_A_MSK (0x00000001 << AD9257_CHAN_A_OFST)
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#define AD9257_CLK_CH_DCO_OFST (4)
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#define AD9257_CLK_CH_DCO_MSK (0x00000001 << AD9257_CLK_CH_DCO_OFST)
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#define AD9257_CLK_CH_IFCO_OFST (5)
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#define AD9257_CLK_CH_IFCO_MSK (0x00000001 << AD9257_CLK_CH_IFCO_OFST)
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#define AD9257_POWER_MODE_REG (0x08)
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#define AD9257_POWER_INTERNAL_OFST (0)
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#define AD9257_POWER_INTERNAL_MSK (0x00000003 << AD9257_POWER_INTERNAL_OFST)
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#define AD9257_INT_RESET_VAL (0x3)
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#define AD9257_INT_CHIP_RUN_VAL (0x0)
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#define AD9257_POWER_EXTERNAL_OFST (5)
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#define AD9257_POWER_EXTERNAL_MSK (0x00000001 << AD9257_POWER_EXTERNAL_OFST)
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#define AD9257_EXT_FULL_POWER_VAL (0x0)
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#define AD9257_EXT_STANDBY_VAL (0x1)
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#define AD9257_OUT_MODE_REG (0x14)
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#define AD9257_OUT_FORMAT_OFST (0)
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#define AD9257_OUT_FORMAT_MSK (0x00000001 << AD9257_OUT_FORMAT_OFST)
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#define AD9257_OUT_BINARY_OFST_VAL (0)
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#define AD9257_OUT_TWOS_COMPL_VAL (1)
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#define AD9257_OUT_LVDS_OPT_OFST (6)
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#define AD9257_OUT_LVDS_OPT_MSK (0x00000001 << AD9257_OUT_LVDS_OPT_OFST)
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#define AD9257_OUT_LVDS_ANSI_VAL (0)
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#define AD9257_OUT_LVDS_IEEE_VAL (1)
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#define AD9257_OUT_PHASE_REG (0x16)
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#define AD9257_OUT_CLK_OFST (0)
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#define AD9257_OUT_CLK_MSK (0x0000000F << AD9257_OUT_CLK_OFST)
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#define AD9257_OUT_CLK_60_VAL (0x1)
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#define AD9257_IN_CLK_OFST (4)
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#define AD9257_IN_CLK_MSK (0x00000007 << AD9257_IN_CLK_OFST)
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#define AD9257_IN_CLK_0_VAL (0x0)
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#define AD9257_VREF_REG (0x18)
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#define AD9257_VREF_OFST (0)
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#define AD9257_VREF_MSK (0x00000003 << AD9257_VREF_OFST)
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#define AD9257_VREF_1_33_VAL (0x2)
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#define AD9257_TEST_MODE_REG (0x0D)
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#define AD9257_OUT_TEST_OFST (0)
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#define AD9257_OUT_TEST_MSK (0x0000000F << AD9257_OUT_TEST_OFST)
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#define AD9257_NONE_VAL (0x0)
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#define AD9257_MIXED_BIT_FREQ_VAL (0xC)
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#define AD9257_TEST_RESET_SHORT_GEN (4)
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#define AD9257_TEST_RESET_LONG_GEN (5)
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#define AD9257_USER_IN_MODE_OFST (6)
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#define AD9257_USER_IN_MODE_MSK (0x00000003 << AD9257_USER_IN_MODE_OFST)
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#endif
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