remove hardcoded MH02 startup

python/slsdet/detector.py

@@ -1,6 +1,5 @@
 # SPDX-License-Identifier: LGPL-3.0-or-other
 # Copyright (C) 2021 Contributors to the SLS Detector Package
-import pathlib
 from ._slsdet import CppDetectorApi
 from ._slsdet import slsDetectorDefs
 from ._slsdet import IpAddr, MacAddr
@@ -3767,13 +3766,9 @@ class Detector(CppDetectorApi):
         raise NotImplementedError("Pattern is set only")
 
     @pattern.setter
-    def pattern(self, name_or_pattern):
-        # If passed a file path, convert to string representation
-        # with the path expanded. Otherwise it's probably a sls::Pattern
-        # and we can pass it directly.
-        if isinstance(name_or_pattern, (pathlib.Path, str)):
-            name_or_pattern = ut.make_string_path(name_or_pattern)
-        ut.set_using_dict(self.setPattern, name_or_pattern)
+    def pattern(self, fname):
+        fname = ut.make_string_path(fname)
+        ut.set_using_dict(self.setPattern, fname)
 
     @property
     def patfname(self):

slsDetectorServers/xilinx_ctbDetectorServer/chip_config_xilinx.txt

@@ -1,24 +1 @@
-# Prepare MH02 configuration
-reg 0xC00C 0x00040041
-reg 0xC010 0x01200004
-
-# configure Matterhorn SPI
-setbit 0xC014 0
-
-# wait till config is done
-pollbit 0xC014 3 0
-
-# reset transceiver
-reg 0xC120 0x0
-reg 0xC120 0x1
-reg 0xC120 0x0
-
-# set MSB LSB inversions and polarity for transceiver
-reg 0xC120 0x1e0
-
-# Enable MH02 PLL clock
-pattern enable_clock_pattern.pyat
-# start the flow
-setbit 0xB030 0
-clearbit 0xB030 0
-sleep 1
+# nothing

slsDetectorServers/xilinx_ctbDetectorServer/reset_chip_xilinx.txt

@@ -1,39 +1,2 @@
 
-# turn off clock
-clearbit 0xB018 15 
-setbit 0xB010 15
-sleep 1
-
-# reset Matterhorn periphery
-setbit 0xC014 1
-sleep 1
-
-# turn on clock
-clearbit 0xB010 15
-sleep 1
-
-# reset rx transceiver datapath
-setbit 0xC120 4
-sleep 1
-
-# reset 8b10b counters
-setbit 0xC120 9
-setbit 0xC120 10
-setbit 0xC120 11
-setbit 0xC120 12
-sleep 1
-clearbit 0xC120 9
-clearbit 0xC120 10
-
-# reset buffer fifos
-reg 0x9024 0xFFFFFFFF
-reg 0x9028 0xFFFFFFFF
-reg 0x902C 0xFFFFFFFF
-reg 0x9024 0x0
-reg 0x9028 0x0
-reg 0x902C 0x0
-setbit 0xA000 18
-
-# load default pattern
-pattern readout_pattern.pyat
-
+# nothing