301 Commits

Author	SHA1	Message	Date
Dhanya Maliakal	722fb58010	bugfix:trimval gave first pixel value and not -1 if all are different	2017-08-17 12:04:54 +02:00
Dhanya Maliakal	d63933b2de	fixed 9m hv	2017-08-17 11:09:26 +02:00
Dhanya Maliakal	16fc44b3ab	update client command doc	2017-08-16 19:05:17 +02:00
Dhanya Maliakal	af079f3168	posisibility to read adnd write registers in the front end board for eiger	2017-08-10 14:49:02 +02:00
Dhanya Maliakal	389f356a3a	high voltage reflects the master only, if 2 masters reflects -1	2017-08-10 11:09:44 +02:00
Dhanya Maliakal	9d8faae375	fixed front end board temp	2017-07-25 13:55:27 +02:00
Dhanya Maliakal	a583f3d6e2	some more changes to make file for automatic versioning	2017-07-10 11:18:41 +02:00
Dhanya Maliakal	b05e9c194a	makefiles and versioning update complete	2017-06-29 17:10:10 +02:00
Dhanya Maliakal	a7d3006cda	added updateversion into makefile while compiling	2017-06-28 10:48:03 +02:00
Dhanya Maliakal	2126e2a723	added updategit	2017-06-28 10:24:49 +02:00
Dhanya Maliakal	c2980b3c44	changes for setting threshold without trimbits for eiger	2017-06-28 10:24:07 +02:00
Dhanya Maliakal	ca358e4d17	changes to the eiger and jungfrau server regarding getnumberofchans etc a typo bug resulting in could not allocate	2017-06-27 17:46:32 +02:00
Dhanya Maliakal	5dd2f273fc	eigerserver changes, need to include martins changes	2017-06-27 10:22:55 +02:00
Dhanya Maliakal	cd86c708dc	updaterev	2017-06-22 14:36:02 +02:00
Dhanya Maliakal	f66950d312	fixed the 9m master server having to be rebooted for hv to work	2017-06-22 14:32:24 +02:00
Dhanya Maliakal	3d8903b2da	updaterev	2017-06-12 18:54:58 +02:00
Dhanya Maliakal	e1eba8dec3	new servers	2017-06-12 18:53:18 +02:00
Dhanya Maliakal	3fbbeea434	update rev	2017-06-12 18:51:52 +02:00
Dhanya Maliakal	b46da37932	new server for change in cleanup of servers	2017-06-12 18:39:06 +02:00
Dhanya Maliakal	132a9bbfe9	solved many bugs, but cannot get data in eiger	2017-06-09 16:02:58 +02:00
Dhanya Maliakal	c755a8974c	done, but need to compile	2017-06-09 11:42:25 +02:00
Dhanya Maliakal	0254ff0281	cleaning up of servers	2017-06-02 19:29:34 +02:00
Dhanya Maliakal	2465eafff0	somewhere in between	2017-05-30 19:00:11 +02:00
Dhanya Maliakal	f74710998d	mannnnyyyy changes to jungfrau serverin structure, also to eiger structure a bit	2017-05-26 18:14:44 +02:00
Dhanya Maliakal	5c230e2ac5	updaterev	2017-03-23 13:48:12 +01:00
Dhanya Maliakal	9e658e7947	udpaterev	2017-03-23 13:46:02 +01:00
Dhanya Maliakal	5dcacaae2a	frame and packet counters for the delay was buggy, not looking at lsb and msb, fixed	2017-03-23 12:38:19 +01:00
Dhanya Maliakal	1ab80b0517	updaterev	2017-03-20 09:28:02 +01:00
Dhanya Maliakal	dc77b07c92	update rev	2017-03-15 15:02:22 +01:00
Dhanya Maliakal	62de278f24	bug fix: loading trimbit file should not care about settings	2017-02-27 16:05:27 +01:00
Dhanya Maliakal	111f8beab3	updaterev	2017-02-10 11:51:29 +01:00
Dhanya Maliakal	4c351ba686	updated server with version variables	2017-02-10 11:51:05 +01:00
Dhanya Maliakal	3d2264fa56	updaterev	2017-02-10 11:50:13 +01:00
Dhanya Maliakal	490e756622	added the servers	2017-02-03 12:31:33 +01:00
Dhanya Maliakal	87ce1ed736	moved tau to settings file, removed gain and offset, setting threshold loads settings file, setting threshold only sets client variable	2017-02-03 12:29:44 +01:00
Dhanya Maliakal	111856ed7b	hv should work now	2017-01-06 15:16:05 +01:00
Dhanya Maliakal	0fdbac981e	should work for serial comm hv for 9m	2017-01-05 12:58:49 +01:00
Dhanya Maliakal	790cef37ff	updaterev	2016-11-30 11:20:16 +01:00
Dhanya Maliakal	466f1506a5	bottom is defined as flippeddatax in config file, not anymore as argument for receiver	2016-11-30 10:36:34 +01:00
Dhanya Maliakal	7ffba557f6	updatereveiger	2016-11-11 14:44:42 +01:00
Dhanya Maliakal	f13a42feeb	eigerupdaterev	2016-11-11 14:43:55 +01:00
Dhanya Maliakal	b1a3a224ff	implemented high voltage for normal modules	2016-11-11 14:43:18 +01:00
Dhanya Maliakal	df3e0f3f93	updaterev	2016-11-03 12:32:59 +01:00
Dhanya Maliakal	55c35b6669	merged	2016-11-02 14:36:21 +01:00
Dhanya Maliakal	5783e3f9d2	counters frame delay	2016-11-02 11:00:51 +01:00
Dhanya Maliakal	50596d87d1	included the delay and frame counters	2016-11-02 10:56:13 +01:00
Dhanya Maliakal	4035f9263a	got rid completely of threaded proccessing	2016-11-02 07:28:29 +01:00
Dhanya Maliakal	2a7a11b80f	changes	2016-11-01 09:12:58 +01:00
Dhanya Maliakal	622e0a480e	added single module binary	2016-10-27 10:26:13 +02:00
Dhanya Maliakal	391ad67e8c	changing the mess return from acq finished eiger server:trial for 9m lag bug	2016-10-27 09:20:21 +02:00